[Hexagon] isel-fold-shl-zext.ll - regenerate test checks (#161869)

Improves codegen diff in an upcoming patch

Author: RKSimon

llvm/test/CodeGen/Hexagon/isel-fold-shl-zext.ll

@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
 ; RUN: llc -mtriple=hexagon-unknown-elf < %s | FileCheck %s
 
 ; In ISelLowering, when folding nodes (or (shl xx, s), (zext y))
@@ -11,17 +12,18 @@ target triple = "hexagon"
 ; Function Attrs: nofree nosync nounwind memory(readwrite, inaccessiblemem: none)
 define dso_local void @foo(i64* nocapture noundef %buf, i32 %a, i32 %b) local_unnamed_addr {
 ; CHECK-LABEL: foo:
-; CHECK:       // %bb.0: // %entry
+; CHECK:         .cfi_startproc
+; CHECK-NEXT:  // %bb.0: // %entry
 ; CHECK-NEXT:    {
-; CHECK-NEXT:     r[[REG0:[0-9]+]] = addasl(r2,r1,#1)
-; CHECK-NEXT:     r[[REG2:[0-9]+]] = asl(r1,#1)
+; CHECK-NEXT:     r2 = addasl(r2,r1,#1)
+; CHECK-NEXT:     r3 = asl(r1,#1)
 ; CHECK-NEXT:    }
 ; CHECK-NEXT:    {
-; CHECK-NEXT:     r[[REG1:[0-9]+]] = addasl(r[[REG0]],r1,#1)
+; CHECK-NEXT:     r2 = addasl(r2,r1,#1)
 ; CHECK-NEXT:    }
 ; CHECK-NEXT:    {
 ; CHECK-NEXT:     jumpr r31
-; CHECK-NEXT:     memd(r0+#8) = r[[REG2]]:[[REG1]]
+; CHECK-NEXT:     memd(r0+#8) = r3:2
 ; CHECK-NEXT:    }
 entry:
   %arrayidx = getelementptr inbounds i64, i64* %buf, i32 1