diff --git a/buildroot/configs/litex_vexriscv_defconfig b/buildroot/configs/litex_vexriscv_defconfig
index 14f1c44c..ba340e00 100644
--- a/buildroot/configs/litex_vexriscv_defconfig
+++ b/buildroot/configs/litex_vexriscv_defconfig
@@ -4,11 +4,18 @@ BR2_RISCV_32=y
 
 # Instruction Set Extensions
 BR2_riscv_custom=y
+# Backward compat (buildroot 2023.02.5 LTS).
 BR2_RISCV_ISA_CUSTOM_RVM=y
 BR2_RISCV_ISA_CUSTOM_RVA=y
 BR2_RISCV_ISA_CUSTOM_RVC=n
 #BR2_RISCV_ISA_CUSTOM_RVF=y  # Uncomment to enable FPU
 #BR2_RISCV_ISA_CUSTOM_RVD=y  # Uncomment to enable FPU
+# Since commit cbd91e89e4 (2023-08-18 / 2023.11).
+BR2_RISCV_ISA_RVM=y
+BR2_RISCV_ISA_RVA=y
+BR2_RISCV_ISA_RVC=n
+#BR2_RISCV_ISA_RVF=y  # Uncomment to enable FPU
+#BR2_RISCV_ISA_RVD=y  # Uncomment to enable FPU
 BR2_RISCV_ABI_ILP32=y
 
 # Patches
diff --git a/buildroot/configs/litex_vexriscv_usbhost_defconfig b/buildroot/configs/litex_vexriscv_usbhost_defconfig
index 24a837f2..9cfef187 100644
--- a/buildroot/configs/litex_vexriscv_usbhost_defconfig
+++ b/buildroot/configs/litex_vexriscv_usbhost_defconfig
@@ -4,11 +4,18 @@ BR2_RISCV_32=y
 
 # Instruction Set Extensions
 BR2_riscv_custom=y
+# Backward compat (buildroot 2023.02.5 LTS).
 BR2_RISCV_ISA_CUSTOM_RVM=y
 BR2_RISCV_ISA_CUSTOM_RVA=y
 BR2_RISCV_ISA_CUSTOM_RVC=n
 #BR2_RISCV_ISA_CUSTOM_RVF=y  # Uncomment to enable FPU
 #BR2_RISCV_ISA_CUSTOM_RVD=y  # Uncomment to enable FPU
+# Since commit cbd91e89e4 (2023-08-18 / 2023.11).
+BR2_RISCV_ISA_RVM=y
+BR2_RISCV_ISA_RVA=y
+BR2_RISCV_ISA_RVC=n
+#BR2_RISCV_ISA_RVF=y  # Uncomment to enable FPU
+#BR2_RISCV_ISA_RVD=y  # Uncomment to enable FPU
 BR2_RISCV_ABI_ILP32=y
 
 # Patches