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sdc.txt
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sdc.txt
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create_clock -name CLOCK_50 -period 20 [get_ports {CLOCK_50}]
derive_pll_clocks
derive_clock_uncertainty
set_clock_groups -asynchronous -group [get_clocks {inst6|altpll_component|auto_generated|pll1|clk[0]}] -group [get_clocks {inst6|altpll_component|auto_generated|pll1|clk[1]}]
set_clock_groups -asynchronous -group [get_clocks {inst6|altpll_component|auto_generated|pll1|clk[1]}] -group [get_clocks {inst6|altpll_component|auto_generated|pll1|clk[0]}]
set_input_delay -clock { inst6|altpll_component|auto_generated|pll1|clk[0] } 2.000 [get_ports {* newt reset}]
set_input_delay -clock { inst10|altpll_component|auto_generated|pll1|clk[0] } 2.000 [get_ports {* newt reset}]
set_output_delay -clock { inst14|altpll_component|auto_generated|pll1|clk[0] } 2 [get_ports {* yvalid follow}]
set_clock_groups -asynchronous -group [get_clocks {inst6|altpll_component|auto_generated|pll1|clk[0]}] -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[0]}]
set_clock_groups -asynchronous -group [get_clocks {inst10|altpll_component|auto_generated|pll1|clk[0]}] -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[0]}]
set_clock_groups -asynchronous -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[0]}] -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[1]}]
set_clock_groups -asynchronous -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[1]}] -group [get_clocks {inst14|altpll_component|auto_generated|pll1|clk[0]}]