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6 Open 5 Closed
6 Open 5 Closed
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Issues list

[COSIM][baseline] understand the mismatched latency between phism and csim case study
#26 opened Sep 18, 2021 by kumasento
2
[SYNTH][deriche] cannot synth exp2f bug Something isn't working wontfix This will not be worked on
#24 opened Sep 17, 2021 by kumasento
[COSIM][symm] csim interface purged some ports bug Something isn't working
#23 opened Sep 17, 2021 by kumasento
[COSIM][correlation] Weird memory port generated from C sim bug Something isn't working
#22 opened Sep 17, 2021 by kumasento
[POLYBENCH][CASE STUDY] trmm: use outer indvars as inner bounds case study
#21 opened Sep 17, 2021 by kumasento
[COSIM][2mm][SMALL] mismatched ports bug Something isn't working
#19 opened Sep 16, 2021 by kumasento
@kumasento @jianyicheng
2
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