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Top2.ucf
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Top2.ucf
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NET "i_clock" LOC="AE14";
NET "i_vga_rgb<0>" LOC="AA24";
NET "i_vga_rgb<1>" LOC="V20";
NET "i_vga_rgb<2>" LOC="AC25";
NET "i_vga_rgb<3>" LOC="AC24";
NET "i_vga_rgb<4>" LOC="W25";
NET "i_vga_rgb<5>" LOC="AB24";
NET "i_vga_rgb<6>" LOC="Y24";
NET "i_vga_rgb<7>" LOC="AB23";
NET "i_vga_rgb<8>" LOC="W26";
NET "i_vga_rgb<9>" LOC="Y26";
NET "i_vga_rgb<10>" LOC="Y25";
NET "i_vga_rgb<11>" LOC="AA26";
NET "i_vga_rgb<12>" LOC="AA23";
NET "i_vga_rgb<13>" LOC="AC21";
NET "i_vga_rgb<14>" LOC="AB26";
NET "i_vga_rgb<15>" LOC="AC23";
NET "i_vga_hsync" LOC="V21";
NET "i_vga_vsync" LOC="W22";
NET "i_clk25" LOC="V22";
#NET "i_vga_syncn" LOC="AC26";
#NET "i_vga_blankn" LOC="AD26";
NET "o_debug<0>" LOC="AD25";
NET "o_debug<1>" LOC="AB22";
NET "o_debug<2>" LOC="W21";
NET "o_debug<3>" LOC="W20";
NET "o_debug<4>" LOC="AB21";
NET "o_debug<5>" LOC="AD22";
NET "o_debug<6>" LOC="AE24";
NET "o_debug<7>" LOC="AF24";
NET "o_clk25" LOC="AF8";
#NET "o_vga_rgb<0>" LOC="C5"; #vgaB3
#NET "o_vga_rgb<1>" LOC="C7";
#NET "o_vga_rgb<2>" LOC="B7";
#NET "o_vga_rgb<3>" LOC="G8";
#NET "o_vga_rgb<4>" LOC="F8"; #vgaB7
#NET "o_vga_rgb<5>" LOC="M20"; # ### vgaG2
#NET "o_vga_rgb<6>" LOC="E4"; #vgaG3
#NET "o_vga_rgb<7>" LOC="D3";
#NET "o_vga_rgb<8>" LOC="H7";
#NET "o_vga_rgb<9>" LOC="H8";
#NET "o_vga_rgb<10>" LOC="C1"; #vgaG7
#NET "o_vga_rgb<11>" LOC="C2"; #vgaB3
#NET "o_vga_rgb<12>" LOC="G7";
#NET "o_vga_rgb<13>" LOC="F7";
#NET "o_vga_rgb<14>" LOC="E5";
#NET "o_vga_rgb<15>" LOC="E6"; #vgaB7
NET "o_r<0>" LOC="N23";
NET "o_r<1>" LOC="N24";
NET "o_r<2>" LOC="N25";
NET "o_r<3>" LOC="C2";
NET "o_r<4>" LOC="G7";
NET "o_r<5>" LOC="F7";
NET "o_r<6>" LOC="E5";
NET "o_r<7>" LOC="E6";
NET "o_g<0>" LOC="M22";
NET "o_g<1>" LOC="M23";
NET "o_g<2>" LOC="M20";
NET "o_g<3>" LOC="E4";
NET "o_g<4>" LOC="D3";
NET "o_g<5>" LOC="H7";
NET "o_g<6>" LOC="H8";
NET "o_g<7>" LOC="C1";
NET "o_b<0>" LOC="M21";
NET "o_b<1>" LOC="M26";
NET "o_b<2>" LOC="L26";
NET "o_b<3>" LOC="C5";
NET "o_b<4>" LOC="C7";
NET "o_b<5>" LOC="B7";
NET "o_b<6>" LOC="G8";
NET "o_b<7>" LOC="F8";
NET "o_vga_hsync" LOC="C10";
NET "o_vga_vsync" LOC="A8";
NET "o_vga_syncn" LOC="L23";
NET "o_vga_blankn" LOC="M24";
NET "o_vgapsave" LOC="M25";
NET "i_reset" LOC="E7";
NET "i_clk25" CLOCK_DEDICATED_ROUTE = FALSE;