Skip to content

Commit 96a71b0

Browse files
gyurcojotego
authored andcommitted
Fix jt03.qip
1 parent edfc9b1 commit 96a71b0

File tree

1 file changed

+2
-1
lines changed

1 file changed

+2
-1
lines changed

target/quartus/jt03.qip

+2-1
Original file line numberDiff line numberDiff line change
@@ -26,10 +26,11 @@ set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../h
2626
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_pm.v ]
2727
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_logsin.v ]
2828
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_reg.v ]
29+
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_reg_ch.v ]
2930
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_sh.v ]
3031
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_sh_rst.v ]
3132
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_sh24.v ]
3233
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_sumch.v ]
3334
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_timers.v ]
3435
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) ../../hdl/jt12_dout.v ]
35-
set_global_assignment -name QIP_FILE [file join $::quartus(qip_path) ../../jt49/hdl/jt49.qip ]
36+
set_global_assignment -name QIP_FILE [file join $::quartus(qip_path) ../../jt49/syn/quartus/jt49.qip ]

0 commit comments

Comments
 (0)