diff --git a/sycl/include/sycl/handler.hpp b/sycl/include/sycl/handler.hpp
index 67f21bc05857f..98742a4cd76b1 100644
--- a/sycl/include/sycl/handler.hpp
+++ b/sycl/include/sycl/handler.hpp
@@ -2200,27 +2200,54 @@ class __SYCL_EXPORT handler {
   std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value &&
                    (sizeof...(RestT) > 1)>
   parallel_for(range<1> Range, RestT &&...Rest) {
-    parallel_for<KernelName>(Range,
-                             ext::oneapi::experimental::empty_properties_t{},
-                             std::forward<RestT>(Rest)...);
+    const auto &KernelObj = (Rest, ...);
+    if constexpr (ext::oneapi::experimental::detail::
+                      HasKernelPropertiesGetMethod<
+                          decltype(KernelObj)>::value) {
+      parallel_for<KernelName>(
+          Range, KernelObj.get(ext::oneapi::experimental::properties_tag{}),
+          std::forward<RestT>(Rest)...);
+    } else {
+      parallel_for<KernelName>(Range,
+                               ext::oneapi::experimental::empty_properties_t{},
+                               std::forward<RestT>(Rest)...);
+    }
   }
 
   template <typename KernelName = detail::auto_name, typename... RestT>
   std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value &&
                    (sizeof...(RestT) > 1)>
   parallel_for(range<2> Range, RestT &&...Rest) {
-    parallel_for<KernelName>(Range,
-                             ext::oneapi::experimental::empty_properties_t{},
-                             std::forward<RestT>(Rest)...);
+    const auto &KernelObj = (Rest, ...);
+    if constexpr (ext::oneapi::experimental::detail::
+                      HasKernelPropertiesGetMethod<
+                          decltype(KernelObj)>::value) {
+      parallel_for<KernelName>(
+          Range, KernelObj.get(ext::oneapi::experimental::properties_tag{}),
+          std::forward<RestT>(Rest)...);
+    } else {
+      parallel_for<KernelName>(Range,
+                               ext::oneapi::experimental::empty_properties_t{},
+                               std::forward<RestT>(Rest)...);
+    }
   }
 
   template <typename KernelName = detail::auto_name, typename... RestT>
   std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value &&
                    (sizeof...(RestT) > 1)>
   parallel_for(range<3> Range, RestT &&...Rest) {
-    parallel_for<KernelName>(Range,
-                             ext::oneapi::experimental::empty_properties_t{},
-                             std::forward<RestT>(Rest)...);
+    const auto &KernelObj = (Rest, ...);
+    if constexpr (ext::oneapi::experimental::detail::
+                      HasKernelPropertiesGetMethod<
+                          decltype(KernelObj)>::value) {
+      parallel_for<KernelName>(
+          Range, KernelObj.get(ext::oneapi::experimental::properties_tag{}),
+          std::forward<RestT>(Rest)...);
+    } else {
+      parallel_for<KernelName>(Range,
+                               ext::oneapi::experimental::empty_properties_t{},
+                               std::forward<RestT>(Rest)...);
+    }
   }
 
   template <typename KernelName = detail::auto_name, int Dims,
@@ -2245,7 +2272,27 @@ class __SYCL_EXPORT handler {
 
   template <typename KernelName = detail::auto_name, int Dims,
             typename... RestT>
-  std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value>
+  std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value &&
+                   (sizeof...(RestT) > 1)> // variant with reductions
+  parallel_for(nd_range<Dims> Range, RestT &&...Rest) {
+    const auto &KernelObj = (Rest, ...);
+    if constexpr (ext::oneapi::experimental::detail::
+                      HasKernelPropertiesGetMethod<
+                          decltype(KernelObj)>::value) {
+      parallel_for<KernelName>(
+          Range, KernelObj.get(ext::oneapi::experimental::properties_tag{}),
+          std::forward<RestT>(Rest)...);
+    } else {
+      parallel_for<KernelName>(Range,
+                               ext::oneapi::experimental::empty_properties_t{},
+                               std::forward<RestT>(Rest)...);
+    }
+  }
+
+  template <typename KernelName = detail::auto_name, int Dims,
+            typename... RestT>
+  std::enable_if_t<detail::AreAllButLastReductions<RestT...>::value &&
+                   (sizeof...(RestT) == 1)> // variant without reductions
   parallel_for(nd_range<Dims> Range, RestT &&...Rest) {
     parallel_for<KernelName>(Range,
                              ext::oneapi::experimental::empty_properties_t{},
diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_device_has.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_device_has.cpp
index 3d1c528744afd..5f2933440b425 100644
--- a/sycl/test/check_device_code/extensions/properties/properties_kernel_device_has.cpp
+++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_device_has.cpp
@@ -1,8 +1,5 @@
-// TODO: Currently using the -Wno-deprecated-declarations flag due to issue
-// https://github.com/intel/llvm/issues/16320. Remove the flag once the issue is
-// resolved.
-// RUN: %clangxx -fsycl-device-only -S -Wno-deprecated-declarations -Xclang -emit-llvm -Xclang -disable-llvm-passes %s -o - | FileCheck %s --check-prefix CHECK-IR
-// RUN: %clangxx -fsycl -fsyntax-only -Wno-deprecated-declarations -Xclang -verify %s
+// RUN: %clangxx -fsycl-device-only -S -Xclang -emit-llvm -Xclang -disable-llvm-passes %s -o - | FileCheck %s --check-prefix CHECK-IR
+// RUN: %clangxx -fsycl -fsyntax-only -Xclang -verify %s
 // expected-no-diagnostics
 
 #include <sycl/sycl.hpp>
@@ -27,6 +24,44 @@ static constexpr auto device_has_all = device_has<
     aspect::usm_host_allocations, aspect::usm_shared_allocations,
     aspect::ext_intel_free_memory, aspect::ext_intel_device_id>;
 
+struct TestKernelHasDevice {
+  void operator()() const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_id1 {
+  void operator()(id<1>) const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_id1_1 {
+  template <typename T1> void operator()(id<1>, T1 &) const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_nd_item1 {
+  void operator()(nd_item<1>) const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_nd_item1_1 {
+  template <typename T1> void operator()(nd_item<1>, T1 &) const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_nd_item1_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<1>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
+struct TestKernelHasDevice_work_group {
+  void operator()(group<1> G) const {
+    G.parallel_for_work_item([&](h_item<1>) {});
+  }
+  auto get(properties_tag) const { return properties{device_has_all}; }
+};
+
 int main() {
   queue Q;
   event Ev;
@@ -34,99 +69,121 @@ int main() {
   range<1> R1{1};
   nd_range<1> NDR1{R1, R1};
 
-  constexpr auto Props = properties{device_has_all};
-
   auto Redu1 = reduction<int>(nullptr, plus<int>());
   auto Redu2 = reduction<float>(nullptr, multiplies<float>());
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel0(){{.*}} #[[DHAttr1:[0-9]+]]
-  Q.single_task<class WGSizeKernel0>(Props, []() {});
+  Q.single_task<class WGSizeKernel0>(TestKernelHasDevice{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel1(){{.*}} #[[DHAttr1]]
-  Q.single_task<class WGSizeKernel1>(Ev, Props, []() {});
+  Q.single_task<class WGSizeKernel1>(Ev, TestKernelHasDevice{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel2(){{.*}} #[[DHAttr1]]
-  Q.single_task<class WGSizeKernel2>({Ev}, Props, []() {});
+  Q.single_task<class WGSizeKernel2>({Ev}, TestKernelHasDevice{});
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel3(){{.*}} #[[DHAttr2:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel3>(R1, Props, [](id<1>) {});
+  Q.parallel_for<class WGSizeKernel3>(R1, TestKernelHasDevice_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel4(){{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel4>(R1, Ev, Props, [](id<1>) {});
+  Q.parallel_for<class WGSizeKernel4>(R1, Ev, TestKernelHasDevice_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel5(){{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel5>(R1, {Ev}, Props, [](id<1>) {});
+  Q.parallel_for<class WGSizeKernel5>(R1, {Ev}, TestKernelHasDevice_id1{});
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel6{{.*}}{{.*}} #[[DHAttr2:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel6>(R1, Props, Redu1, [](id<1>, auto &) {});
+  parallel_for<class WGSizeKernel6>(Q, R1, TestKernelHasDevice_id1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel7{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel7>(R1, Ev, Props, Redu1,
-                                      [](id<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeKernel7>(Q, R1, TestKernelHasDevice_id1_1{},
+                                      Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel8{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel8>(R1, {Ev}, Props, Redu1,
-                                      [](id<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeKernel8>(Q, R1, TestKernelHasDevice_id1_1{},
+                                      Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel9(){{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel9>(NDR1, Props, [](nd_item<1>) {});
+  nd_launch<class WGSizeKernel9>(Q, NDR1, TestKernelHasDevice_nd_item1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel10(){{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel10>(NDR1, Ev, Props, [](nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel10>(CGH, NDR1, TestKernelHasDevice_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel11(){{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel11>(NDR1, {Ev}, Props, [](nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel11>(CGH, NDR1, TestKernelHasDevice_nd_item1{});
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel12{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel12>(NDR1, Props, Redu1,
-                                       [](nd_item<1>, auto &) {});
+  nd_launch<class WGSizeKernel12>(Q, NDR1, TestKernelHasDevice_nd_item1_1{},
+                                  Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel13{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel13>(NDR1, Ev, Props, Redu1,
-                                       [](nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel13>(CGH, NDR1, TestKernelHasDevice_nd_item1_1{},
+                                    Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel14{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel14>(NDR1, {Ev}, Props, Redu1,
-                                       [](nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel14>(CGH, NDR1, TestKernelHasDevice_nd_item1_1{},
+                                    Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel15{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel15>(NDR1, Props, Redu1, Redu2,
-                                       [](nd_item<1>, auto &, auto &) {});
+  nd_launch<class WGSizeKernel15>(Q, NDR1, TestKernelHasDevice_nd_item1_2{},
+                                  Redu1, Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel16{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel16>(NDR1, Ev, Props, Redu1, Redu2,
-                                       [](nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel16>(CGH, NDR1, TestKernelHasDevice_nd_item1_2{},
+                                    Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel17{{.*}}{{.*}} #[[DHAttr2]]
-  Q.parallel_for<class WGSizeKernel17>(NDR1, {Ev}, Props, Redu1, Redu2,
-                                       [](nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel17>(CGH, NDR1, TestKernelHasDevice_nd_item1_2{},
+                                    Redu1, Redu2);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel18(){{.*}} #[[DHAttr1]]
   Q.submit([&](handler &CGH) {
-    CGH.single_task<class WGSizeKernel18>(Props, []() {});
+    CGH.single_task<class WGSizeKernel18>(TestKernelHasDevice{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel19(){{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel19>(R1, Props, [](id<1>) {});
+    CGH.parallel_for<class WGSizeKernel19>(R1, TestKernelHasDevice_id1{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel20{{.*}}{{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel20>(R1, Props, Redu1,
-                                           [](id<1>, auto &) {});
+    CGH.parallel_for<class WGSizeKernel20>(R1, Redu1,
+                                           TestKernelHasDevice_id1_1{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel21(){{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel21>(NDR1, Props, [](nd_item<1>) {});
+    CGH.parallel_for<class WGSizeKernel21>(NDR1,
+                                           TestKernelHasDevice_nd_item1{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel22{{.*}}{{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel22>(NDR1, Props, Redu1,
-                                           [](nd_item<1>, auto &) {});
+    CGH.parallel_for<class WGSizeKernel22>(NDR1, Redu1,
+                                           TestKernelHasDevice_nd_item1_1{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel23{{.*}}{{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel23>(NDR1, Props, Redu1, Redu2,
-                                           [](nd_item<1>, auto &, auto &) {});
+    CGH.parallel_for<class WGSizeKernel23>(NDR1, Redu1, Redu2,
+                                           TestKernelHasDevice_nd_item1_2{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel24(){{.*}} #[[DHAttr2]]
   Q.submit([&](handler &CGH) {
     CGH.parallel_for_work_group<class WGSizeKernel24>(
-        R1, Props,
-        [](group<1> G) { G.parallel_for_work_item([&](h_item<1>) {}); });
+        R1, TestKernelHasDevice_work_group{});
   });
 
   return 0;
diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp
index b48e15c555416..4c3010c5bb58f 100644
--- a/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp
+++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_sub_group_size.cpp
@@ -1,275 +1,411 @@
-// TODO: Currently using the -Wno-deprecated-declarations flag due to issue
-// https://github.com/intel/llvm/issues/16320. Remove the flag once the issue is
-// resolved.
-// RUN: %clangxx -fsycl-device-only -S -Wno-deprecated-declarations -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
-// RUN: %clangxx -fsycl -fsyntax-only -Wno-deprecated-declarations -Xclang -verify %s
+// RUN: %clangxx -fsycl-device-only -S -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
+// RUN: %clangxx -fsycl -fsyntax-only -Xclang -verify %s
 // expected-no-diagnostics
 
 #include <sycl/sycl.hpp>
 
-int main() {
-  sycl::queue Q;
-  sycl::event Ev;
+using namespace sycl;
+using namespace ext::oneapi::experimental;
+
+static constexpr auto sub_group_size_1 = properties{sub_group_size<1>};
+
+struct TestKernel {
+  void operator()() const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id1 {
+  void operator()(id<1>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id2 {
+  void operator()(id<2>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id3 {
+  void operator()(id<3>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id1_1 {
+  template <typename T1> void operator()(id<1>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id2_1 {
+  template <typename T1> void operator()(id<2>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_id3_1 {
+  template <typename T1> void operator()(id<3>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item1 {
+  void operator()(nd_item<1>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item2 {
+  void operator()(nd_item<2>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
 
-  sycl::range<1> R1{1};
-  sycl::range<2> R2{1, 2};
-  sycl::range<3> R3{1, 2, 3};
+struct TestKernel_nd_item3 {
+  void operator()(nd_item<3>) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item1_1 {
+  template <typename T1> void operator()(nd_item<1>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item2_1 {
+  template <typename T1> void operator()(nd_item<2>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item3_1 {
+  template <typename T1> void operator()(nd_item<3>, T1 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item1_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<1>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item2_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<2>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_nd_item3_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<3>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_work_group1 {
+  void operator()(group<1> G) const {
+    G.parallel_for_work_item([&](h_item<1>) {});
+  }
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_work_group2 {
+  void operator()(group<2> G) const {
+    G.parallel_for_work_item([&](h_item<2>) {});
+  }
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+struct TestKernel_work_group3 {
+  void operator()(group<3> G) const {
+    G.parallel_for_work_item([&](h_item<3>) {});
+  }
+  auto get(properties_tag) const { return sub_group_size_1; }
+};
+
+int main() {
+  queue Q;
+  event Ev;
 
-  sycl::nd_range<1> NDR1{R1, R1};
-  sycl::nd_range<2> NDR2{R2, R2};
-  sycl::nd_range<3> NDR3{R3, R3};
+  range<1> R1{1};
+  range<2> R2{1, 2};
+  range<3> R3{1, 2, 3};
 
-  constexpr auto Props = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::sub_group_size<1>};
+  nd_range<1> NDR1{R1, R1};
+  nd_range<2> NDR2{R2, R2};
+  nd_range<3> NDR3{R3, R3};
 
-  auto Redu1 = sycl::reduction<int>(nullptr, sycl::plus<int>());
-  auto Redu2 = sycl::reduction<float>(nullptr, sycl::multiplies<float>());
+  auto Redu1 = reduction<int>(nullptr, plus<int>());
+  auto Redu2 = reduction<float>(nullptr, multiplies<float>());
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel0(){{.*}} #[[SGSizeAttr0:[0-9]+]]
-  Q.single_task<class SGSizeKernel0>(Props, []() {});
+  Q.single_task<class SGSizeKernel0>(TestKernel{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel1(){{.*}} #[[SGSizeAttr0]]
-  Q.single_task<class SGSizeKernel1>(Ev, Props, []() {});
+  Q.single_task<class SGSizeKernel1>(Ev, TestKernel{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel2(){{.*}} #[[SGSizeAttr0]]
-  Q.single_task<class SGSizeKernel2>({Ev}, Props, []() {});
+  Q.single_task<class SGSizeKernel2>({Ev}, TestKernel{});
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel9(){{.*}} #[[SGSizeAttr2:[0-9]+]]
-  Q.parallel_for<class SGSizeKernel9>(R1, Props, [](sycl::id<1>) {});
+  Q.parallel_for<class SGSizeKernel9>(R1, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel10(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel10>(R1, Ev, Props, [](sycl::id<1>) {});
+  Q.parallel_for<class SGSizeKernel10>(R1, Ev, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel11(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel11>(R1, {Ev}, Props, [](sycl::id<1>) {});
+  Q.parallel_for<class SGSizeKernel11>(R1, {Ev}, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel12(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel12>(R2, Props, [](sycl::id<2>) {});
+  Q.parallel_for<class SGSizeKernel12>(R2, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel13(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel13>(R2, Ev, Props, [](sycl::id<2>) {});
+  Q.parallel_for<class SGSizeKernel13>(R2, Ev, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel14(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel14>(R2, {Ev}, Props, [](sycl::id<2>) {});
+  Q.parallel_for<class SGSizeKernel14>(R2, {Ev}, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel15(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel15>(R3, Props, [](sycl::id<3>) {});
+  Q.parallel_for<class SGSizeKernel15>(R3, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel16(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel16>(R3, Ev, Props, [](sycl::id<3>) {});
+  Q.parallel_for<class SGSizeKernel16>(R3, Ev, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel17(){{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel17>(R3, {Ev}, Props, [](sycl::id<3>) {});
+  Q.parallel_for<class SGSizeKernel17>(R3, {Ev}, TestKernel_id3{});
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel18{{.*}}{{.*}} #[[SGSizeAttr2:[0-9]+]]
-  Q.parallel_for<class SGSizeKernel18>(R1, Props, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  parallel_for<class SGSizeKernel18>(Q, R1, TestKernel_id1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel19{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel19>(R1, Ev, Props, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class SGSizeKernel19>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel20{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel20>(R1, {Ev}, Props, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class SGSizeKernel20>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel21{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel21>(R2, Props, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  parallel_for<class SGSizeKernel21>(Q, R2, TestKernel_id2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel22{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel22>(R2, Ev, Props, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class SGSizeKernel22>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel23{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel23>(R2, {Ev}, Props, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class SGSizeKernel23>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel24{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel24>(R3, Props, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  parallel_for<class SGSizeKernel24>(Q, R3, TestKernel_id3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel25{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel25>(R3, Ev, Props, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class SGSizeKernel25>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel26{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel26>(R3, {Ev}, Props, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class SGSizeKernel26>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel27(){{.*}} #[[SGSizeAttr6:[0-9]+]]
-  Q.parallel_for<class SGSizeKernel27>(NDR1, Props, [](sycl::nd_item<1>) {});
+  nd_launch<class SGSizeKernel27>(Q, NDR1, TestKernel_nd_item1{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel28(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel28>(NDR1, Ev, Props,
-                                       [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel28>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel29(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel29>(NDR1, {Ev}, Props,
-                                       [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel29>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel30(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel30>(NDR2, Props, [](sycl::nd_item<2>) {});
+  nd_launch<class SGSizeKernel30>(Q, NDR2, TestKernel_nd_item2{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel31(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel31>(NDR2, Ev, Props,
-                                       [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel31>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel32(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel32>(NDR2, {Ev}, Props,
-                                       [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel32>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel33(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel33>(NDR3, Props, [](sycl::nd_item<3>) {});
+  nd_launch<class SGSizeKernel33>(Q, NDR3, TestKernel_nd_item3{});
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel34(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel34>(NDR3, Ev, Props,
-                                       [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel34>(CGH, NDR3, TestKernel_nd_item3{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel35(){{.*}} #[[SGSizeAttr6]]
-  Q.parallel_for<class SGSizeKernel35>(NDR3, {Ev}, Props,
-                                       [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel35>(CGH, NDR3, TestKernel_nd_item3{});
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel36{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel36>(NDR1, Props, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  nd_launch<class SGSizeKernel36>(Q, NDR1, TestKernel_nd_item1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel37{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel37>(NDR1, Ev, Props, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel37>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel38{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel38>(NDR1, {Ev}, Props, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel38>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel39{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel39>(NDR2, Props, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  nd_launch<class SGSizeKernel39>(Q, NDR2, TestKernel_nd_item2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel40{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel40>(NDR2, Ev, Props, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel40>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel41{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel41>(NDR2, {Ev}, Props, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel41>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel42{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel42>(NDR3, Props, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  nd_launch<class SGSizeKernel42>(Q, NDR3, TestKernel_nd_item3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel43{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel43>(NDR3, Ev, Props, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel43>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel44{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel44>(NDR3, {Ev}, Props, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel44>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel45{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel45>(NDR1, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  nd_launch<class SGSizeKernel45>(Q, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel46{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel46>(NDR1, Ev, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel46>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel47{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel47>(NDR1, {Ev}, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel47>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel48{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel48>(NDR2, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  nd_launch<class SGSizeKernel48>(Q, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel49{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel49>(NDR2, Ev, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel49>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel50{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel50>(NDR2, {Ev}, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel50>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel51{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel51>(NDR3, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  nd_launch<class SGSizeKernel51>(Q, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel52{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel52>(NDR3, Ev, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class SGSizeKernel52>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel53{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.parallel_for<class SGSizeKernel53>(NDR3, {Ev}, Props, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class SGSizeKernel53>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel54(){{.*}} #[[SGSizeAttr0]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class SGSizeKernel54>(Props, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class SGSizeKernel54>(TestKernel{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel55(){{.*}} #[[SGSizeAttr0]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class SGSizeKernel55>(Props, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class SGSizeKernel55>(TestKernel{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel56(){{.*}} #[[SGSizeAttr0]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class SGSizeKernel56>(Props, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class SGSizeKernel56>(TestKernel{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel57(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel57>(R1, Props, [](sycl::id<1>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class SGSizeKernel57>(R1, TestKernel_id1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel58(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel58>(R2, Props, [](sycl::id<2>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class SGSizeKernel58>(R2, TestKernel_id2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel59(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel59>(R3, Props, [](sycl::id<3>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class SGSizeKernel59>(R3, TestKernel_id3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel60{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel60>(R1, Props, Redu1,
-                                           [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class SGSizeKernel60>(CGH, R1, TestKernel_id1_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel61{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel61>(R2, Props, Redu1,
-                                           [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class SGSizeKernel61>(CGH, R2, TestKernel_id2_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel62{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel62>(R3, Props, Redu1,
-                                           [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class SGSizeKernel62>(CGH, R3, TestKernel_id3_1{}, Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel63(){{.*}} #[[SGSizeAttr6]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel63>(NDR1, Props,
-                                           [](sycl::nd_item<1>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel63>(CGH, NDR1, TestKernel_nd_item1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel64(){{.*}} #[[SGSizeAttr6]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel64>(NDR2, Props,
-                                           [](sycl::nd_item<2>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel64>(CGH, NDR2, TestKernel_nd_item2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel65(){{.*}} #[[SGSizeAttr6]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel65>(NDR3, Props,
-                                           [](sycl::nd_item<3>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel65>(CGH, NDR3, TestKernel_nd_item3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel66{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel66>(NDR1, Props, Redu1,
-                                           [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel66>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel67{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel67>(NDR2, Props, Redu1,
-                                           [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel67>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel68{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel68>(NDR3, Props, Redu1,
-                                           [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel68>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel69{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel69>(
-        NDR1, Props, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel69>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel70{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel70>(
-        NDR2, Props, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel70>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}SGSizeKernel71{{.*}}{{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class SGSizeKernel71>(
-        NDR3, Props, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class SGSizeKernel71>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel72(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class SGSizeKernel72>(
-        R1, Props, [](sycl::group<1> G) {
-          G.parallel_for_work_item([&](sycl::h_item<1>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class SGSizeKernel72>(R1,
+                                                      TestKernel_work_group1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel73(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class SGSizeKernel73>(
-        R2, Props, [](sycl::group<2> G) {
-          G.parallel_for_work_item([&](sycl::h_item<2>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class SGSizeKernel73>(R2,
+                                                      TestKernel_work_group2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}SGSizeKernel74(){{.*}} #[[SGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class SGSizeKernel74>(
-        R3, Props, [](sycl::group<3> G) {
-          G.parallel_for_work_item([&](sycl::h_item<3>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class SGSizeKernel74>(R3,
+                                                      TestKernel_work_group3{});
   });
 
   return 0;
diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp
index a11202e8694a9..1b49feda94c94 100644
--- a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp
+++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size.cpp
@@ -1,291 +1,434 @@
-// TODO: Currently using the -Wno-deprecated-declarations flag due to issue
-// https://github.com/intel/llvm/issues/16320. Remove the flag once the issue is
-// resolved.
-// RUN: %clangxx -fsycl-device-only -S -Wno-deprecated-declarations -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
-// RUN: %clangxx -fsycl -fsyntax-only -Wno-deprecated-declarations -Xclang -verify %s
+// RUN: %clangxx -fsycl-device-only -S -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
+// RUN: %clangxx -fsycl -fsyntax-only -Xclang -verify %s
 // expected-no-diagnostics
 
 #include <sycl/sycl.hpp>
 
-int main() {
-  sycl::queue Q;
-  sycl::event Ev;
+using namespace sycl;
+using namespace ext::oneapi::experimental;
+
+constexpr auto Props1 = properties{work_group_size<1>};
+constexpr auto Props2 = properties{work_group_size<1, 2>};
+constexpr auto Props3 = properties{work_group_size<1, 2, 3>};
+
+struct TestKernel_1 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_2 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_3 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_id1 {
+  void operator()(id<1>) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_id2 {
+  void operator()(id<2>) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_id3 {
+  void operator()(id<3>) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_id1_1 {
+  template <typename T1> void operator()(id<1>, T1 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_id2_1 {
+  template <typename T1> void operator()(id<2>, T1 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_id3_1 {
+  template <typename T1> void operator()(id<3>, T1 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1 {
+  void operator()(nd_item<1>) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2 {
+  void operator()(nd_item<2>) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3 {
+  void operator()(nd_item<3>) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1_1 {
+  template <typename T1> void operator()(nd_item<1>, T1 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2_1 {
+  template <typename T1> void operator()(nd_item<2>, T1 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3_1 {
+  template <typename T1> void operator()(nd_item<3>, T1 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<1>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<2>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<3>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_work_group1 {
+  void operator()(group<1> G) const {
+    G.parallel_for_work_item([&](h_item<1>) {});
+  }
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_work_group2 {
+  void operator()(group<2> G) const {
+    G.parallel_for_work_item([&](h_item<2>) {});
+  }
+  auto get(properties_tag) const { return Props2; }
+};
 
-  sycl::range<1> R1{1};
-  sycl::range<2> R2{1, 2};
-  sycl::range<3> R3{1, 2, 3};
+struct TestKernel_work_group3 {
+  void operator()(group<3> G) const {
+    G.parallel_for_work_item([&](h_item<3>) {});
+  }
+  auto get(properties_tag) const { return Props3; }
+};
 
-  sycl::nd_range<1> NDR1{R1, R1};
-  sycl::nd_range<2> NDR2{R2, R2};
-  sycl::nd_range<3> NDR3{R3, R3};
+int main() {
+  queue Q;
+  event Ev;
+
+  range<1> R1{1};
+  range<2> R2{1, 2};
+  range<3> R3{1, 2, 3};
 
-  constexpr auto Props1 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size<1>};
-  constexpr auto Props2 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size<1, 2>};
-  constexpr auto Props3 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size<1, 2, 3>};
+  nd_range<1> NDR1{R1, R1};
+  nd_range<2> NDR2{R2, R2};
+  nd_range<3> NDR3{R3, R3};
 
-  auto Redu1 = sycl::reduction<int>(nullptr, sycl::plus<int>());
-  auto Redu2 = sycl::reduction<float>(nullptr, sycl::multiplies<float>());
+  auto Redu1 = reduction<int>(nullptr, plus<int>());
+  auto Redu2 = reduction<float>(nullptr, multiplies<float>());
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel0(){{.*}} #[[WGSizeAttr0:[0-9]+]]
-  Q.single_task<class WGSizeKernel0>(Props1, []() {});
+  Q.single_task<class WGSizeKernel0>(TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel1(){{.*}} #[[WGSizeAttr0]]
-  Q.single_task<class WGSizeKernel1>(Ev, Props1, []() {});
+  Q.single_task<class WGSizeKernel1>(Ev, TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel2(){{.*}} #[[WGSizeAttr0]]
-  Q.single_task<class WGSizeKernel2>({Ev}, Props1, []() {});
+  Q.single_task<class WGSizeKernel2>({Ev}, TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel3(){{.*}} #[[WGSizeAttr2:[0-9]+]]
-  Q.single_task<class WGSizeKernel3>(Props2, []() {});
+  Q.single_task<class WGSizeKernel3>(TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel4(){{.*}} #[[WGSizeAttr2]]
-  Q.single_task<class WGSizeKernel4>(Ev, Props2, []() {});
+  Q.single_task<class WGSizeKernel4>(Ev, TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel5(){{.*}} #[[WGSizeAttr2]]
-  Q.single_task<class WGSizeKernel5>({Ev}, Props2, []() {});
+  Q.single_task<class WGSizeKernel5>({Ev}, TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel6(){{.*}} #[[WGSizeAttr3:[0-9]+]]
-  Q.single_task<class WGSizeKernel6>(Props3, []() {});
+  Q.single_task<class WGSizeKernel6>(TestKernel_3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel7(){{.*}} #[[WGSizeAttr3]]
-  Q.single_task<class WGSizeKernel7>(Ev, Props3, []() {});
+  Q.single_task<class WGSizeKernel7>(Ev, TestKernel_3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel8(){{.*}} #[[WGSizeAttr3]]
-  Q.single_task<class WGSizeKernel8>({Ev}, Props3, []() {});
+  Q.single_task<class WGSizeKernel8>({Ev}, TestKernel_3{});
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel9(){{.*}} #[[WGSizeAttr4:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel9>(R1, Props1, [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeKernel9>(R1, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel10(){{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel10>(R1, Ev, Props1, [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeKernel10>(R1, Ev, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel11(){{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel11>(R1, {Ev}, Props1, [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeKernel11>(R1, {Ev}, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel12(){{.*}} #[[WGSizeAttr7:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel12>(R2, Props2, [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeKernel12>(R2, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel13(){{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel13>(R2, Ev, Props2, [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeKernel13>(R2, Ev, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel14(){{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel14>(R2, {Ev}, Props2, [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeKernel14>(R2, {Ev}, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel15(){{.*}} #[[WGSizeAttr8:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel15>(R3, Props3, [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeKernel15>(R3, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel16(){{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel16>(R3, Ev, Props3, [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeKernel16>(R3, Ev, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel17(){{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel17>(R3, {Ev}, Props3, [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeKernel17>(R3, {Ev}, TestKernel_id3{});
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel18{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel18>(R1, Props1, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  parallel_for<class WGSizeKernel18>(Q, R1, TestKernel_id1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel19{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel19>(R1, Ev, Props1, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeKernel19>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel20{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel20>(R1, {Ev}, Props1, Redu1,
-                                       [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeKernel20>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel21{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel21>(R2, Props2, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  parallel_for<class WGSizeKernel21>(Q, R2, TestKernel_id2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel22{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel22>(R2, Ev, Props2, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeKernel22>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel23{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel23>(R2, {Ev}, Props2, Redu1,
-                                       [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeKernel23>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel24{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel24>(R3, Props3, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  parallel_for<class WGSizeKernel24>(Q, R3, TestKernel_id3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel25{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel25>(R3, Ev, Props3, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeKernel25>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel26{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel26>(R3, {Ev}, Props3, Redu1,
-                                       [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeKernel26>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel27(){{.*}} #[[WGSizeAttr10:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel27>(NDR1, Props1, [](sycl::nd_item<1>) {});
+  nd_launch<class WGSizeKernel27>(Q, NDR1, TestKernel_nd_item1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel28(){{.*}} #[[WGSizeAttr10]]
-  Q.parallel_for<class WGSizeKernel28>(NDR1, Ev, Props1,
-                                       [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel28>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel29(){{.*}} #[[WGSizeAttr10]]
-  Q.parallel_for<class WGSizeKernel29>(NDR1, {Ev}, Props1,
-                                       [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel29>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel30(){{.*}} #[[WGSizeAttr11:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel30>(NDR2, Props2, [](sycl::nd_item<2>) {});
+  nd_launch<class WGSizeKernel30>(Q, NDR2, TestKernel_nd_item2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel31(){{.*}} #[[WGSizeAttr11]]
-  Q.parallel_for<class WGSizeKernel31>(NDR2, Ev, Props2,
-                                       [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel31>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel32(){{.*}} #[[WGSizeAttr11]]
-  Q.parallel_for<class WGSizeKernel32>(NDR2, {Ev}, Props2,
-                                       [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel32>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel33(){{.*}} #[[WGSizeAttr12:[0-9]+]]
-  Q.parallel_for<class WGSizeKernel33>(NDR3, Props3, [](sycl::nd_item<3>) {});
+  nd_launch<class WGSizeKernel33>(Q, NDR3, TestKernel_nd_item3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel34(){{.*}} #[[WGSizeAttr12]]
-  Q.parallel_for<class WGSizeKernel34>(NDR3, Ev, Props3,
-                                       [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel34>(CGH, NDR3, TestKernel_nd_item3{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel35(){{.*}} #[[WGSizeAttr12]]
-  Q.parallel_for<class WGSizeKernel35>(NDR3, {Ev}, Props3,
-                                       [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel35>(CGH, NDR3, TestKernel_nd_item3{});
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel36{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel36>(NDR1, Props1, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  nd_launch<class WGSizeKernel36>(Q, NDR1, TestKernel_nd_item1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel37{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel37>(NDR1, Ev, Props1, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel37>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel38{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel38>(NDR1, {Ev}, Props1, Redu1,
-                                       [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel38>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel39{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel39>(NDR2, Props2, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  nd_launch<class WGSizeKernel39>(Q, NDR2, TestKernel_nd_item2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel40{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel40>(NDR2, Ev, Props2, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel40>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel41{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel41>(NDR2, {Ev}, Props2, Redu1,
-                                       [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel41>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel42{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel42>(NDR3, Props3, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  nd_launch<class WGSizeKernel42>(Q, NDR3, TestKernel_nd_item3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel43{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel43>(NDR3, Ev, Props3, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel43>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel44{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel44>(NDR3, {Ev}, Props3, Redu1,
-                                       [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel44>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel45{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel45>(NDR1, Props1, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  nd_launch<class WGSizeKernel45>(Q, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel46{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel46>(NDR1, Ev, Props1, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel46>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel47{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.parallel_for<class WGSizeKernel47>(NDR1, {Ev}, Props1, Redu1, Redu2,
-                                       [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel47>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel48{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel48>(NDR2, Props2, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  nd_launch<class WGSizeKernel48>(Q, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel49{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel49>(NDR2, Ev, Props2, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel49>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel50{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.parallel_for<class WGSizeKernel50>(NDR2, {Ev}, Props2, Redu1, Redu2,
-                                       [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel50>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel51{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel51>(NDR3, Props3, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  nd_launch<class WGSizeKernel51>(Q, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                  Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel52{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel52>(NDR3, Ev, Props3, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeKernel52>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel53{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.parallel_for<class WGSizeKernel53>(NDR3, {Ev}, Props3, Redu1, Redu2,
-                                       [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeKernel53>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel54(){{.*}} #[[WGSizeAttr0]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeKernel54>(Props1, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeKernel54>(TestKernel_1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel55(){{.*}} #[[WGSizeAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeKernel55>(Props2, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeKernel55>(TestKernel_2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel56(){{.*}} #[[WGSizeAttr3]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeKernel56>(Props3, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeKernel56>(TestKernel_3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel57(){{.*}} #[[WGSizeAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel57>(R1, Props1, [](sycl::id<1>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeKernel57>(R1, TestKernel_id1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel58(){{.*}} #[[WGSizeAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel58>(R2, Props2, [](sycl::id<2>) {});
-  });
-  // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel59(){{.*}} #[[WGSizeAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel59>(R3, Props3, [](sycl::id<3>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeKernel58>(R2, TestKernel_id2{});
+  }); // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel59(){{.*}} #[[WGSizeAttr8]]
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeKernel59>(R3, TestKernel_id3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel60{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel60>(R1, Props1, Redu1,
-                                           [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeKernel60>(CGH, R1, TestKernel_id1_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel61{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel61>(R2, Props2, Redu1,
-                                           [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeKernel61>(CGH, R2, TestKernel_id2_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel62{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel62>(R3, Props3, Redu1,
-                                           [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeKernel62>(CGH, R3, TestKernel_id3_1{}, Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel63(){{.*}} #[[WGSizeAttr10]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel63>(NDR1, Props1,
-                                           [](sycl::nd_item<1>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel63>(CGH, NDR1, TestKernel_nd_item1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel64(){{.*}} #[[WGSizeAttr11]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel64>(NDR2, Props2,
-                                           [](sycl::nd_item<2>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel64>(CGH, NDR2, TestKernel_nd_item2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel65(){{.*}} #[[WGSizeAttr12]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel65>(NDR3, Props3,
-                                           [](sycl::nd_item<3>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel65>(CGH, NDR3, TestKernel_nd_item3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel66{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel66>(NDR1, Props1, Redu1,
-                                           [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel66>(CGH, NDR1, TestKernel_nd_item1_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel67{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel67>(NDR2, Props2, Redu1,
-                                           [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel67>(CGH, NDR2, TestKernel_nd_item2_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel68{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel68>(NDR3, Props3, Redu1,
-                                           [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel68>(CGH, NDR3, TestKernel_nd_item3_1{}, Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel69{{.*}}{{.*}} #[[WGSizeAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel69>(
-        NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel69>(CGH, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                    Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel70{{.*}}{{.*}} #[[WGSizeAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel70>(
-        NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel70>(CGH, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                    Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeKernel71{{.*}}{{.*}} #[[WGSizeAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeKernel71>(
-        NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeKernel71>(CGH, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                    Redu2);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel72(){{.*}} #[[WGSizeAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class WGSizeKernel72>(
-        R1, Props1, [](sycl::group<1> G) {
-          G.parallel_for_work_item([&](sycl::h_item<1>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class WGSizeKernel72>(R1,
+                                                      TestKernel_work_group1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel73(){{.*}} #[[WGSizeAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class WGSizeKernel73>(
-        R2, Props2, [](sycl::group<2> G) {
-          G.parallel_for_work_item([&](sycl::h_item<2>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class WGSizeKernel73>(R2,
+                                                      TestKernel_work_group2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeKernel74(){{.*}} #[[WGSizeAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for_work_group<class WGSizeKernel74>(
-        R3, Props3, [](sycl::group<3> G) {
-          G.parallel_for_work_item([&](sycl::h_item<3>) {});
-        });
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for_work_group<class WGSizeKernel74>(R3,
+                                                      TestKernel_work_group3{});
   });
 
   return 0;
diff --git a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp
index b194b44c935bd..e3b81361ee335 100644
--- a/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp
+++ b/sycl/test/check_device_code/extensions/properties/properties_kernel_work_group_size_hint.cpp
@@ -1,300 +1,444 @@
-// TODO: Currently using the -Wno-deprecated-declarations flag due to issue
-// https://github.com/intel/llvm/issues/16320. Remove the flag once the issue is
-// resolved.
-// RUN: %clangxx -fsycl-device-only -S -Wno-deprecated-declarations -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
-// RUN: %clangxx -fsycl -fsyntax-only -Wno-deprecated-declarations -Xclang -verify %s
+// RUN: %clangxx -fsycl-device-only -S -Xclang -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK-IR
+// RUN: %clangxx -fsycl -fsyntax-only -Xclang -verify %s
 // expected-no-diagnostics
 
 #include <sycl/sycl.hpp>
 
-int main() {
-  sycl::queue Q;
-  sycl::event Ev;
+using namespace sycl;
+using namespace ext::oneapi::experimental;
+
+constexpr auto Props1 = properties{work_group_size_hint<1>};
+constexpr auto Props2 = properties{work_group_size_hint<1, 2>};
+constexpr auto Props3 = properties{work_group_size_hint<1, 2, 3>};
+
+struct TestKernel_1 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_2 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_3 {
+  void operator()() const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_id1 {
+  void operator()(id<1>) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_id2 {
+  void operator()(id<2>) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_id3 {
+  void operator()(id<3>) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_id1_1 {
+  template <typename T1> void operator()(id<1>, T1 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_id2_1 {
+  template <typename T1> void operator()(id<2>, T1 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_id3_1 {
+  template <typename T1> void operator()(id<3>, T1 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1 {
+  void operator()(nd_item<1>) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2 {
+  void operator()(nd_item<2>) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3 {
+  void operator()(nd_item<3>) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1_1 {
+  template <typename T1> void operator()(nd_item<1>, T1 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2_1 {
+  template <typename T1> void operator()(nd_item<2>, T1 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3_1 {
+  template <typename T1> void operator()(nd_item<3>, T1 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_nd_item1_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<1>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_nd_item2_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<2>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props2; }
+};
+
+struct TestKernel_nd_item3_2 {
+  template <typename T1, typename T2>
+  void operator()(nd_item<3>, T1 &, T2 &) const {}
+  auto get(properties_tag) const { return Props3; }
+};
+
+struct TestKernel_work_group1 {
+  void operator()(group<1> G) const {
+    G.parallel_for_work_item([&](h_item<1>) {});
+  }
+  auto get(properties_tag) const { return Props1; }
+};
+
+struct TestKernel_work_group2 {
+  void operator()(group<2> G) const {
+    G.parallel_for_work_item([&](h_item<2>) {});
+  }
+  auto get(properties_tag) const { return Props2; }
+};
 
-  sycl::range<1> R1{1};
-  sycl::range<2> R2{1, 2};
-  sycl::range<3> R3{1, 2, 3};
+struct TestKernel_work_group3 {
+  void operator()(group<3> G) const {
+    G.parallel_for_work_item([&](h_item<3>) {});
+  }
+  auto get(properties_tag) const { return Props3; }
+};
 
-  sycl::nd_range<1> NDR1{R1, R1};
-  sycl::nd_range<2> NDR2{R2, R2};
-  sycl::nd_range<3> NDR3{R3, R3};
+int main() {
+  queue Q;
+  event Ev;
+
+  range<1> R1{1};
+  range<2> R2{1, 2};
+  range<3> R3{1, 2, 3};
 
-  constexpr auto Props1 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size_hint<1>};
-  constexpr auto Props2 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size_hint<1, 2>};
-  constexpr auto Props3 = sycl::ext::oneapi::experimental::properties{
-      sycl::ext::oneapi::experimental::work_group_size_hint<1, 2, 3>};
+  nd_range<1> NDR1{R1, R1};
+  nd_range<2> NDR2{R2, R2};
+  nd_range<3> NDR3{R3, R3};
 
-  auto Redu1 = sycl::reduction<int>(nullptr, sycl::plus<int>());
-  auto Redu2 = sycl::reduction<float>(nullptr, sycl::multiplies<float>());
+  auto Redu1 = reduction<int>(nullptr, plus<int>());
+  auto Redu2 = reduction<float>(nullptr, multiplies<float>());
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel0(){{.*}} #[[WGSizeHintAttr0:[0-9]+]]
-  Q.single_task<class WGSizeHintKernel0>(Props1, []() {});
+  Q.single_task<class WGSizeHintKernel0>(TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel1(){{.*}} #[[WGSizeHintAttr0]]
-  Q.single_task<class WGSizeHintKernel1>(Ev, Props1, []() {});
+  Q.single_task<class WGSizeHintKernel1>(Ev, TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel2(){{.*}} #[[WGSizeHintAttr0]]
-  Q.single_task<class WGSizeHintKernel2>({Ev}, Props1, []() {});
+  Q.single_task<class WGSizeHintKernel2>({Ev}, TestKernel_1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel3(){{.*}} #[[WGSizeHintAttr2:[0-9]+]]
-  Q.single_task<class WGSizeHintKernel3>(Props2, []() {});
+  Q.single_task<class WGSizeHintKernel3>(TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel4(){{.*}} #[[WGSizeHintAttr2]]
-  Q.single_task<class WGSizeHintKernel4>(Ev, Props2, []() {});
+  Q.single_task<class WGSizeHintKernel4>(Ev, TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel5(){{.*}} #[[WGSizeHintAttr2]]
-  Q.single_task<class WGSizeHintKernel5>({Ev}, Props2, []() {});
+  Q.single_task<class WGSizeHintKernel5>({Ev}, TestKernel_2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel6(){{.*}} #[[WGSizeHintAttr3:[0-9]+]]
-  Q.single_task<class WGSizeHintKernel6>(Props3, []() {});
+  Q.single_task<class WGSizeHintKernel6>(TestKernel_3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel7(){{.*}} #[[WGSizeHintAttr3]]
-  Q.single_task<class WGSizeHintKernel7>(Ev, Props3, []() {});
+  Q.single_task<class WGSizeHintKernel7>(Ev, TestKernel_3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel8(){{.*}} #[[WGSizeHintAttr3]]
-  Q.single_task<class WGSizeHintKernel8>({Ev}, Props3, []() {});
+  Q.single_task<class WGSizeHintKernel8>({Ev}, TestKernel_3{});
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel9(){{.*}} #[[WGSizeHintAttr4:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel9>(R1, Props1, [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeHintKernel9>(R1, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel10(){{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel10>(R1, Ev, Props1, [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeHintKernel10>(R1, Ev, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel11(){{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel11>(R1, {Ev}, Props1,
-                                           [](sycl::id<1>) {});
+  Q.parallel_for<class WGSizeHintKernel11>(R1, {Ev}, TestKernel_id1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel12(){{.*}} #[[WGSizeHintAttr7:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel12>(R2, Props2, [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeHintKernel12>(R2, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel13(){{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel13>(R2, Ev, Props2, [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeHintKernel13>(R2, Ev, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel14(){{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel14>(R2, {Ev}, Props2,
-                                           [](sycl::id<2>) {});
+  Q.parallel_for<class WGSizeHintKernel14>(R2, {Ev}, TestKernel_id2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel15(){{.*}} #[[WGSizeHintAttr8:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel15>(R3, Props3, [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeHintKernel15>(R3, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel16(){{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel16>(R3, Ev, Props3, [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeHintKernel16>(R3, Ev, TestKernel_id3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel17(){{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel17>(R3, {Ev}, Props3,
-                                           [](sycl::id<3>) {});
+  Q.parallel_for<class WGSizeHintKernel17>(R3, {Ev}, TestKernel_id3{});
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel18{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel18>(R1, Props1, Redu1,
-                                           [](sycl::id<1>, auto &) {});
+  parallel_for<class WGSizeHintKernel18>(Q, R1, TestKernel_id1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel19{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel19>(R1, Ev, Props1, Redu1,
-                                           [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeHintKernel19>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel20{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel20>(R1, {Ev}, Props1, Redu1,
-                                           [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeHintKernel20>(Q, R1, TestKernel_id1_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel21{{.*}}{{.*}} #[[WGSizeHintAttr7:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel21>(R2, Props2, Redu1,
-                                           [](sycl::id<2>, auto &) {});
+  parallel_for<class WGSizeHintKernel21>(Q, R2, TestKernel_id2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel22{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel22>(R2, Ev, Props2, Redu1,
-                                           [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeHintKernel22>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel23{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel23>(R2, {Ev}, Props2, Redu1,
-                                           [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeHintKernel23>(Q, R2, TestKernel_id2_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel24{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel24>(R3, Props3, Redu1,
-                                           [](sycl::id<3>, auto &) {});
+  parallel_for<class WGSizeHintKernel24>(Q, R3, TestKernel_id3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel25{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel25>(R3, Ev, Props3, Redu1,
-                                           [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on(Ev);
+    parallel_for<class WGSizeHintKernel25>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel26{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel26>(R3, {Ev}, Props3, Redu1,
-                                           [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    CGH.depends_on({Ev});
+    parallel_for<class WGSizeHintKernel26>(Q, R3, TestKernel_id3_1{}, Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel27(){{.*}} #[[WGSizeHintAttr10:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel27>(NDR1, Props1,
-                                           [](sycl::nd_item<1>) {});
+  nd_launch<class WGSizeHintKernel27>(Q, NDR1, TestKernel_nd_item1{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel28(){{.*}} #[[WGSizeHintAttr10]]
-  Q.parallel_for<class WGSizeHintKernel28>(NDR1, Ev, Props1,
-                                           [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel28>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel29(){{.*}} #[[WGSizeHintAttr10]]
-  Q.parallel_for<class WGSizeHintKernel29>(NDR1, {Ev}, Props1,
-                                           [](sycl::nd_item<1>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel29>(CGH, NDR1, TestKernel_nd_item1{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel30(){{.*}} #[[WGSizeHintAttr11:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel30>(NDR2, Props2,
-                                           [](sycl::nd_item<2>) {});
+  nd_launch<class WGSizeHintKernel30>(Q, NDR2, TestKernel_nd_item2{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel31(){{.*}} #[[WGSizeHintAttr11]]
-  Q.parallel_for<class WGSizeHintKernel31>(NDR2, Ev, Props2,
-                                           [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel31>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel32(){{.*}} #[[WGSizeHintAttr11]]
-  Q.parallel_for<class WGSizeHintKernel32>(NDR2, {Ev}, Props2,
-                                           [](sycl::nd_item<2>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel32>(CGH, NDR2, TestKernel_nd_item2{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel33(){{.*}} #[[WGSizeHintAttr12:[0-9]+]]
-  Q.parallel_for<class WGSizeHintKernel33>(NDR3, Props3,
-                                           [](sycl::nd_item<3>) {});
+  nd_launch<class WGSizeHintKernel33>(Q, NDR3, TestKernel_nd_item3{});
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel34(){{.*}} #[[WGSizeHintAttr12]]
-  Q.parallel_for<class WGSizeHintKernel34>(NDR3, Ev, Props3,
-                                           [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel34>(CGH, NDR3, TestKernel_nd_item3{});
+  });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel35(){{.*}} #[[WGSizeHintAttr12]]
-  Q.parallel_for<class WGSizeHintKernel35>(NDR3, {Ev}, Props3,
-                                           [](sycl::nd_item<3>) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel35>(CGH, NDR3, TestKernel_nd_item3{});
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel36{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel36>(NDR1, Props1, Redu1,
-                                           [](sycl::nd_item<1>, auto &) {});
+  nd_launch<class WGSizeHintKernel36>(Q, NDR1, TestKernel_nd_item1_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel37{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel37>(NDR1, Ev, Props1, Redu1,
-                                           [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel37>(CGH, NDR1, TestKernel_nd_item1_1{},
+                                        Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel38{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel38>(NDR1, {Ev}, Props1, Redu1,
-                                           [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel38>(CGH, NDR1, TestKernel_nd_item1_1{},
+                                        Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel39{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel39>(NDR2, Props2, Redu1,
-                                           [](sycl::nd_item<2>, auto &) {});
+  nd_launch<class WGSizeHintKernel39>(Q, NDR2, TestKernel_nd_item2_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel40{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel40>(NDR2, Ev, Props2, Redu1,
-                                           [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel40>(CGH, NDR2, TestKernel_nd_item2_1{},
+                                        Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel41{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel41>(NDR2, {Ev}, Props2, Redu1,
-                                           [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel41>(CGH, NDR2, TestKernel_nd_item2_1{},
+                                        Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel42{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel42>(NDR3, Props3, Redu1,
-                                           [](sycl::nd_item<3>, auto &) {});
+  nd_launch<class WGSizeHintKernel42>(Q, NDR3, TestKernel_nd_item3_1{}, Redu1);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel43{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel43>(NDR3, Ev, Props3, Redu1,
-                                           [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel43>(CGH, NDR3, TestKernel_nd_item3_1{},
+                                        Redu1);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel44{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel44>(NDR3, {Ev}, Props3, Redu1,
-                                           [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel44>(CGH, NDR3, TestKernel_nd_item3_1{},
+                                        Redu1);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel45{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel45>(
-      NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {});
+  nd_launch<class WGSizeHintKernel45>(Q, NDR1, TestKernel_nd_item1_2{}, Redu1,
+                                      Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel46{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel46>(
-      NDR1, Ev, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel46>(CGH, NDR1, TestKernel_nd_item1_2{},
+                                        Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel47{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.parallel_for<class WGSizeHintKernel47>(
-      NDR1, {Ev}, Props1, Redu1, Redu2,
-      [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel47>(CGH, NDR1, TestKernel_nd_item1_2{},
+                                        Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel48{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel48>(
-      NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {});
+  nd_launch<class WGSizeHintKernel48>(Q, NDR2, TestKernel_nd_item2_2{}, Redu1,
+                                      Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel49{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel49>(
-      NDR2, Ev, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel49>(CGH, NDR2, TestKernel_nd_item2_2{},
+                                        Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel50{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.parallel_for<class WGSizeHintKernel50>(
-      NDR2, {Ev}, Props2, Redu1, Redu2,
-      [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel50>(CGH, NDR2, TestKernel_nd_item2_2{},
+                                        Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel51{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel51>(
-      NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {});
+  nd_launch<class WGSizeHintKernel51>(Q, NDR3, TestKernel_nd_item3_2{}, Redu1,
+                                      Redu2);
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel52{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel52>(
-      NDR3, Ev, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on(Ev);
+    nd_launch<class WGSizeHintKernel52>(CGH, NDR3, TestKernel_nd_item3_2{},
+                                        Redu1, Redu2);
+  });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel53{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.parallel_for<class WGSizeHintKernel53>(
-      NDR3, {Ev}, Props3, Redu1, Redu2,
-      [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](sycl::handler &CGH) {
+    CGH.depends_on({Ev});
+    nd_launch<class WGSizeHintKernel53>(CGH, NDR3, TestKernel_nd_item3_2{},
+                                        Redu1, Redu2);
+  });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel54(){{.*}} #[[WGSizeHintAttr0]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeHintKernel54>(Props1, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeHintKernel54>(TestKernel_1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel55(){{.*}} #[[WGSizeHintAttr2]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeHintKernel55>(Props2, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeHintKernel55>(TestKernel_2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel56(){{.*}} #[[WGSizeHintAttr3]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.single_task<class WGSizeHintKernel56>(Props3, []() {});
+  Q.submit([&](handler &CGH) {
+    CGH.single_task<class WGSizeHintKernel56>(TestKernel_3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel57(){{.*}} #[[WGSizeHintAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel57>(R1, Props1, [](sycl::id<1>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeHintKernel57>(R1, TestKernel_id1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel58(){{.*}} #[[WGSizeHintAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel58>(R2, Props2, [](sycl::id<2>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeHintKernel58>(R2, TestKernel_id2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel59(){{.*}} #[[WGSizeHintAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel59>(R3, Props3, [](sycl::id<3>) {});
+  Q.submit([&](handler &CGH) {
+    CGH.parallel_for<class WGSizeHintKernel59>(R3, TestKernel_id3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel60{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel60>(R1, Props1, Redu1,
-                                               [](sycl::id<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeHintKernel60>(CGH, R1, TestKernel_id1_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel61{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel61>(R2, Props2, Redu1,
-                                               [](sycl::id<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeHintKernel61>(CGH, R2, TestKernel_id2_1{}, Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel62{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel62>(R3, Props3, Redu1,
-                                               [](sycl::id<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    parallel_for<class WGSizeHintKernel62>(CGH, R3, TestKernel_id3_1{}, Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel63(){{.*}} #[[WGSizeHintAttr10]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel63>(NDR1, Props1,
-                                               [](sycl::nd_item<1>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel63>(CGH, NDR1, TestKernel_nd_item1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel64(){{.*}} #[[WGSizeHintAttr11]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel64>(NDR2, Props2,
-                                               [](sycl::nd_item<2>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel64>(CGH, NDR2, TestKernel_nd_item2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel65(){{.*}} #[[WGSizeHintAttr12]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel65>(NDR3, Props3,
-                                               [](sycl::nd_item<3>) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel65>(CGH, NDR3, TestKernel_nd_item3{});
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel66{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel66>(NDR1, Props1, Redu1,
-                                               [](sycl::nd_item<1>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel66>(CGH, NDR1, TestKernel_nd_item1_1{},
+                                        Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel67{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel67>(NDR2, Props2, Redu1,
-                                               [](sycl::nd_item<2>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel67>(CGH, NDR2, TestKernel_nd_item2_1{},
+                                        Redu1);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel68{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel68>(NDR3, Props3, Redu1,
-                                               [](sycl::nd_item<3>, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel68>(CGH, NDR3, TestKernel_nd_item3_1{},
+                                        Redu1);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel69{{.*}}{{.*}} #[[WGSizeHintAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel69>(
-        NDR1, Props1, Redu1, Redu2, [](sycl::nd_item<1>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel69>(CGH, NDR1, TestKernel_nd_item1_2{},
+                                        Redu1, Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel70{{.*}}{{.*}} #[[WGSizeHintAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel70>(
-        NDR2, Props2, Redu1, Redu2, [](sycl::nd_item<2>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel70>(CGH, NDR2, TestKernel_nd_item2_2{},
+                                        Redu1, Redu2);
   });
   // CHECK-IR: spir_kernel void @{{.*}}MainKrn{{.*}}WGSizeHintKernel71{{.*}}{{.*}} #[[WGSizeHintAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
-    CGH.parallel_for<class WGSizeHintKernel71>(
-        NDR3, Props3, Redu1, Redu2, [](sycl::nd_item<3>, auto &, auto &) {});
+  Q.submit([&](handler &CGH) {
+    nd_launch<class WGSizeHintKernel71>(CGH, NDR3, TestKernel_nd_item3_2{},
+                                        Redu1, Redu2);
   });
 
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel72(){{.*}} #[[WGSizeHintAttr4]]
-  Q.submit([&](sycl::handler &CGH) {
+  Q.submit([&](handler &CGH) {
     CGH.parallel_for_work_group<class WGSizeHintKernel72>(
-        R1, Props1, [](sycl::group<1> G) {
-          G.parallel_for_work_item([&](sycl::h_item<1>) {});
-        });
+        R1, TestKernel_work_group1{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel73(){{.*}} #[[WGSizeHintAttr7]]
-  Q.submit([&](sycl::handler &CGH) {
+  Q.submit([&](handler &CGH) {
     CGH.parallel_for_work_group<class WGSizeHintKernel73>(
-        R2, Props2, [](sycl::group<2> G) {
-          G.parallel_for_work_item([&](sycl::h_item<2>) {});
-        });
+        R2, TestKernel_work_group2{});
   });
   // CHECK-IR: spir_kernel void @{{.*}}WGSizeHintKernel74(){{.*}} #[[WGSizeHintAttr8]]
-  Q.submit([&](sycl::handler &CGH) {
+  Q.submit([&](handler &CGH) {
     CGH.parallel_for_work_group<class WGSizeHintKernel74>(
-        R3, Props3, [](sycl::group<3> G) {
-          G.parallel_for_work_item([&](sycl::h_item<3>) {});
-        });
+        R3, TestKernel_work_group3{});
   });
 
   return 0;