diff --git a/clang/test/CodeGenSYCL/annotations-field-no-opaque.cpp b/clang/test/CodeGenSYCL/annotations-field-no-opaque.cpp deleted file mode 100644 index 75857d237a409..0000000000000 --- a/clang/test/CodeGenSYCL/annotations-field-no-opaque.cpp +++ /dev/null @@ -1,37 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -emit-llvm -no-opaque-pointers -o - %s | FileCheck %s - -// This test checks that clang emits @llvm.ptr.annotation intrinsic correctly -// when attribute annotate is applied to a struct field of integer type. - -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"v_ann_{{.}}\00", section "llvm.metadata" -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"v_ann_{{.}}\00", section "llvm.metadata" -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"w_ann_{{.}}\00", section "llvm.metadata" -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"w_ann_{{.}}\00", section "llvm.metadata" -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"f_ann_{{.}}\00", section "llvm.metadata" -// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"f_ann_{{.}}\00", section "llvm.metadata" - -struct foo { - int v __attribute__((annotate("v_ann_0"))) __attribute__((annotate("v_ann_1"))); - char w __attribute__((annotate("w_ann_0"))) __attribute__((annotate("w_ann_1"))); - float f __attribute__((annotate("f_ann_0"))) __attribute__((annotate("f_ann_1"))); -}; - -int __attribute__((sycl_device)) foo() { - struct foo f; - f.v = 1; -// CHECK: getelementptr inbounds %struct.foo, %struct.foo addrspace(4)* %{{.*}}, i32 0, i32 0 -// CHECK-NEXT: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32.p1i8({{.*}}str{{.*}}str{{.*}}i32 14, i8 addrspace(1)* null) -// CHECK-NEXT: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32.p1i8({{.*}}str{{.*}}str{{.*}}i32 14, i8 addrspace(1)* null) - f.w = 42; -// CHECK: getelementptr inbounds %struct.foo, %struct.foo addrspace(4)* %{{.*}}, i32 0, i32 1 -// CHECK-NEXT: call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8({{.*}}str{{.*}}str{{.*}}i32 15, i8 addrspace(1)* null) -// CHECK-NEXT: call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8({{.*}}str{{.*}}str{{.*}}i32 15, i8 addrspace(1)* null) - f.f = 0; -// CHECK: getelementptr inbounds %struct.foo, %struct.foo addrspace(4)* %{{.*}}, i32 0, i32 2 -// CHECK-NEXT: bitcast float addrspace(4)* %{{.*}} to i8 addrspace(4)* -// CHECK-NEXT: call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8({{.*}}str{{.*}}str{{.*}}i32 16, i8 addrspace(1)* null) -// CHECK-NEXT: bitcast i8 addrspace(4)* %{{.*}} to float addrspace(4)* -// CHECK-NEXT: bitcast float addrspace(4)* %{{.*}} to i8 addrspace(4)* -// CHECK-NEXT: call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8({{.*}}str{{.*}}str{{.*}}i32 16, i8 addrspace(1)* null) - return 0; -} diff --git a/clang/test/CodeGenSYCL/annotations-field.cpp b/clang/test/CodeGenSYCL/annotations-field.cpp new file mode 100644 index 0000000000000..3248bfe8803ab --- /dev/null +++ b/clang/test/CodeGenSYCL/annotations-field.cpp @@ -0,0 +1,34 @@ +// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -emit-llvm -o - %s | FileCheck %s + +// This test checks that clang emits @llvm.ptr.annotation intrinsic correctly +// when attribute annotate is applied to a struct field of integer type. + +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"v_ann_{{.}}\00", section "llvm.metadata" +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"v_ann_{{.}}\00", section "llvm.metadata" +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"w_ann_{{.}}\00", section "llvm.metadata" +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"w_ann_{{.}}\00", section "llvm.metadata" +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"f_ann_{{.}}\00", section "llvm.metadata" +// CHECK: private unnamed_addr addrspace(1) constant [8 x i8] c"f_ann_{{.}}\00", section "llvm.metadata" + +struct foo { + int v __attribute__((annotate("v_ann_0"))) __attribute__((annotate("v_ann_1"))); + char w __attribute__((annotate("w_ann_0"))) __attribute__((annotate("w_ann_1"))); + float f __attribute__((annotate("f_ann_0"))) __attribute__((annotate("f_ann_1"))); +}; + +int __attribute__((sycl_device)) foo() { + struct foo f; + f.v = 1; +// CHECK: getelementptr inbounds %struct.foo, ptr addrspace(4) %{{.*}}, i32 0, i32 0 +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 14, ptr addrspace(1) null) +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 14, ptr addrspace(1) null) + f.w = 42; +// CHECK: getelementptr inbounds %struct.foo, ptr addrspace(4) %{{.*}}, i32 0, i32 1 +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 15, ptr addrspace(1) null) +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 15, ptr addrspace(1) null) + f.f = 0; +// CHECK: getelementptr inbounds %struct.foo, ptr addrspace(4) %{{.*}}, i32 0, i32 2 +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 16, ptr addrspace(1) null) +// CHECK-NEXT: call ptr addrspace(4) @llvm.ptr.annotation.p4.p1({{.*}}str{{.*}}str{{.*}}i32 16, ptr addrspace(1) null) + return 0; +} diff --git a/clang/test/CodeGenSYCL/check-work-group-attributes-match.cpp b/clang/test/CodeGenSYCL/check-work-group-attributes-match.cpp index 90ed0893dcd51..3fae9e167c1a5 100644 --- a/clang/test/CodeGenSYCL/check-work-group-attributes-match.cpp +++ b/clang/test/CodeGenSYCL/check-work-group-attributes-match.cpp @@ -1,5 +1,4 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -sycl-std=2020 -opaque-pointers -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -sycl-std=2020 -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -sycl-std=2020 -emit-llvm -o - %s | FileCheck %s // Tests that work_group_size_hint and reqd_work_group_size generate the same // metadata nodes for the same arguments. diff --git a/clang/test/CodeGenSYCL/matrix.cpp b/clang/test/CodeGenSYCL/matrix.cpp index b2c0c51adba6e..3ba63e89f8919 100644 --- a/clang/test/CodeGenSYCL/matrix.cpp +++ b/clang/test/CodeGenSYCL/matrix.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -emit-llvm %s -o - -no-opaque-pointers | FileCheck %s +// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s // Test that SPIR-V codegen generates the expected LLVM struct name for the // JointMatrixINTEL type. #include diff --git a/clang/test/CodeGenSYCL/no-opaque-generated-types-initialization.cpp b/clang/test/CodeGenSYCL/no-opaque-generated-types-initialization.cpp deleted file mode 100644 index 323688db8dc45..0000000000000 --- a/clang/test/CodeGenSYCL/no-opaque-generated-types-initialization.cpp +++ /dev/null @@ -1,77 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that compiler generates correct code when kernel arguments -// are structs that contain pointers but not decomposed. - -#include "sycl.hpp" - -struct A { - float *F; -}; - -struct B { - int *F1; - A F3; - B(int *I, A AA) : F1(I), F3(AA) {}; -}; - -struct Nested { - typedef B TDA; -}; - -int main() { - sycl::queue q; - B Obj{nullptr, {nullptr}}; - - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)Obj; - }); - }); - - Nested::TDA NNSObj{nullptr, {nullptr}}; - q.submit([&](sycl::handler &h) { - h.single_task([=]() { - (void)NNSObj; - }); - }); - return 0; -} -// CHECK: define dso_local spir_kernel void @{{.*}}basic(%struct.__generated_B* noundef byval(%struct.__generated_B) align 8 %_arg_Obj) -// -// Kernel object clone. -// CHECK: %[[K:[a-zA-Z0-9_.]+]] = alloca %class.anon -// CHECK: %[[K_as_cast:[a-zA-Z0-9_.]+]] = addrspacecast %class.anon* %[[K]] to %class.anon addrspace(4)* -// -// Argument reference. -// CHECK: %[[Arg_ref:[a-zA-Z0-9_.]+]] = addrspacecast %struct.__generated_B* %_arg_Obj to %struct.__generated_B addrspace(4)* - -// Initialization. -// CHECK: %[[GEP:[a-zA-Z0-9_.]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %[[K_as_cast]], i32 0, i32 0 -// CHECK: %[[ArgBC:[a-zA-Z0-9_.]+]] = bitcast %struct.__generated_B addrspace(4)* %[[Arg_ref]] to %struct.B addrspace(4)* -// CHECK: %[[GEPBC:[a-zA-Z0-9_.]+]] = bitcast %struct.B addrspace(4)* %[[GEP]] to i8 addrspace(4)* -// CHECK: %[[ArgBC2:[a-zA-Z0-9_.]+]] = bitcast %struct.B addrspace(4)* %[[ArgBC]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 8 %[[GEPBC]], i8 addrspace(4)* align 8 %[[ArgBC2]], i64 16, i1 false) -// -// Kernel body call. -// CHECK: call spir_func void @_ZZZ4mainENKUlRN4sycl3_V17handlerEE_clES2_ENKUlvE_clEv(%class.anon addrspace(4)* noundef align 8 dereferenceable_or_null(16) %[[K_as_cast]]) - -// CHECK: define dso_local spir_kernel void @{{.*}}nns(%struct.__generated_B.0* noundef byval(%struct.__generated_B.0) align 8 %_arg_NNSObj) -// -// Kernel object clone. -// CHECK: %[[NNSK:[a-zA-Z0-9_.]+]] = alloca %class.anon.2 -// CHECK: %[[NNSK_as_cast:[a-zA-Z0-9_.]+]] = addrspacecast %class.anon.2* %[[NNSK]] to %class.anon.2 addrspace(4)* -// -// Argument reference. -// CHECK: %[[NNSArg_ref:[a-zA-Z0-9_.]+]] = addrspacecast %struct.__generated_B.0* %_arg_NNSObj to %struct.__generated_B.0 addrspace(4)* -// -// Initialization. -// CHECK: %[[NNSGEP:[a-zA-Z0-9_.]+]] = getelementptr inbounds %class.anon.2, %class.anon.2 addrspace(4)* %[[NNSK_as_cast]], i32 0, i32 0 -// CHECK: %[[NNSArgBC:[a-zA-Z0-9_.]+]] = bitcast %struct.__generated_B.0 addrspace(4)* %[[NNSArg_ref]] to %struct.B addrspace(4)* -// CHECK: %[[NNSGEPBC:[a-zA-Z0-9_.]+]] = bitcast %struct.B addrspace(4)* %[[NNSGEP]] to i8 addrspace(4)* -// CHECK: %[[NNSArgBC2:[a-zA-Z0-9_.]+]] = bitcast %struct.B addrspace(4)* %[[NNSArgBC]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 8 %[[NNSGEPBC]], i8 addrspace(4)* align 8 %[[NNSArgBC2]], i64 16, i1 false) -// -// Kernel body call. -// CHECK: call spir_func void @_ZZZ4mainENKUlRN4sycl3_V17handlerEE0_clES2_ENKUlvE_clEv(%class.anon.2 addrspace(4)* noundef align 8 dereferenceable_or_null(16) %[[NNSK_as_cast]]) diff --git a/clang/test/CodeGenSYCL/no-opaque-ptr-intel-fpga-mem-builtin.cpp b/clang/test/CodeGenSYCL/no-opaque-ptr-intel-fpga-mem-builtin.cpp deleted file mode 100644 index 5a3b3d7be9808..0000000000000 --- a/clang/test/CodeGenSYCL/no-opaque-ptr-intel-fpga-mem-builtin.cpp +++ /dev/null @@ -1,115 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-linux -std=c++11 -disable-llvm-passes -S -no-opaque-pointers -emit-llvm -x c++ %s -o - | FileCheck %s - -#define PARAM_1 1U << 7 -#define PARAM_2 1U << 8 - -// This test checks that using of __builtin_intel_fpga_mem results in correct -// generation of annotations in LLVM IR. - -// CHECK: [[STRUCT:%.*]] = type { i32, float } -struct State { - int x; - float y; -}; - -// CHECK: [[ANN1:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:0}{anchor-id:-1}{target-anchor:0}{type:0}{cycle:0} -// CHECK: [[ANN2:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:127}{anchor-id:-1}{target-anchor:0}{type:0}{cycle:0} -// CHECK: [[ANN3:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:127}{anchor-id:10}{target-anchor:20}{type:30}{cycle:40} -// CHECK: [[ANN4:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:127}{anchor-id:11}{target-anchor:12}{type:0}{cycle:0} -// CHECK: [[ANN5:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:127}{anchor-id:100}{target-anchor:0}{type:0}{cycle:0} -// CHECK: [[ANN6:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:128}{anchor-id:4}{target-anchor:7}{type:8}{cycle:0} - -// CHECK: define {{.*}}spir_func void @{{.*}}(float addrspace(4)* noundef %A, i32 addrspace(4)* noundef %B, [[STRUCT]] addrspace(4)* noundef %C, [[STRUCT]] addrspace(4)*{{.*}}%D) -void foo(float *A, int *B, State *C, State &D) { - float *x; - int *y; - State *z; - double F = 0.0; - double *f; - - // CHECK-DAG: [[Aaddr:%.*]] = alloca float addrspace(4)* - // CHECK-DAG: [[Baddr:%.*]] = alloca i32 addrspace(4)* - // CHECK-DAG: [[Caddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - // CHECK-DAG: [[Daddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - // CHECK-DAG: [[F:%.*]] = alloca double - // CHECK-DAG: [[f:%.*]] = alloca double addrspace(4)* - - // CHECK-DAG: [[A:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR1:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR1]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[B:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR2:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store i32 addrspace(4)* [[PTR2]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_fpga_mem(B, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[C:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR3:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR3]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(C, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[A2:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR4:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR4]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[B2:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR5:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store i32 addrspace(4)* [[PTR5]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_fpga_mem(B, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[C2:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR6:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR6]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(C, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[D:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Daddr]] - // CHECK-DAG: [[PTR7:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[D]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR7]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(&D, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[PTR8:%[0-9]+]] = call double addrspace(4)* @llvm.ptr.annotation{{.*}}[[F]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store double addrspace(4)* [[PTR8]], double addrspace(4)* addrspace(4)* %f - f = __builtin_intel_fpga_mem(&F, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[A3:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR9:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A3]]{{.*}}[[ANN3]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR9]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 127, 10, 20, 30, 40); - - // CHECK-DAG: [[A4:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR10:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A4]]{{.*}}[[ANN4]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR10]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 127, 11, 12); - - // CHECK-DAG: [[B3:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR11:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B3]]{{.*}}[[ANN5]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store i32 addrspace(4)* [[PTR11]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_fpga_mem(B, PARAM_1 | PARAM_2, 127, 100); - - constexpr int TestVal1 = 7; - constexpr int TestVal2 = 8; - - // CHECK-DAG: [[D1:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Daddr]] - // CHECK-DAG: [[PTR12:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[D1]]{{.*}}[[ANN6]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR12]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(&D, PARAM_1 | PARAM_2, 128, 4, TestVal1, TestVal2); -} - -// CHECK-DAG: attributes [[ATT]] = { memory(none) } - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - float *A; - int *B; - State *C; - State D; - foo(A, B, C, D); }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no-opaque-ptr-kernel_binding_decls.cpp b/clang/test/CodeGenSYCL/no-opaque-ptr-kernel_binding_decls.cpp deleted file mode 100644 index d9d23606f0588..0000000000000 --- a/clang/test/CodeGenSYCL/no-opaque-ptr-kernel_binding_decls.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -internal-isystem %S/Inputs -fsycl-is-device -std=c++20 -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -#include "sycl.hpp" - -// This test checks that we correctly capture binding declarations. - -void foo() { - sycl::handler h; - int a[2] = {1, 2}; - auto [x, y] = a; - struct S { - float b[3] = { 0, 3.0f, 4.0 }; - } s; - auto [f1, f2, f3] = s.b; - auto Lambda = [=]() { x = 10; f2 = 2.3f; }; - h.single_task(Lambda); -} - -// CHECK: %class.anon = type { i32, float } - -// Check the sycl kernel arguments - one int and one float parameter -// CHECK: define {{.*}} spir_kernel void @{{.*}}foov{{.*}}(i32 {{.*}} %_arg_x, float {{.*}} %_arg_f2) -// CHECK: entry: - -// Check alloca of the captured types -// CHECK: %_arg_x.addr = alloca i32, align 4 -// CHECK: %_arg_f2.addr = alloca float, align 4 -// CHECK: %__SYCLKernel = alloca %class.anon, align 4 - -// Copy the parameters into the alloca-ed addresses -// CHECK: store i32 %_arg_x, i32 addrspace(4)* %_arg_x.addr -// CHECK: store float %_arg_f2, float addrspace(4)* %_arg_f2.addr - -// Store the int and the float into the struct created -// CHECK: %x = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %__SYCLKernel{{.*}}, i32 0, i32 0 -// CHECK: %0 = load i32, i32 addrspace(4)* %_arg_x.addr -// CHECK: store i32 %0, i32 addrspace(4)* %x -// CHECK: %f2 = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %__SYCLKernel{{.*}}, i32 0, i32 1 -// CHECK: %1 = load float, float addrspace(4)* %_arg_f2.addr -// CHECK: store float %1, float addrspace(4)* %f2 - -// Call the lambda -// CHECK: call spir_func void @{{.*}}foo{{.*}}(%class.anon addrspace(4)* {{.*}} %__SYCLKernel{{.*}}) -// CHECK: ret void - -// Check the lambda call -// CHECK: define {{.*}} spir_func void @{{.*}}foo{{.*}}(%class.anon addrspace(4)* {{.*}} %this) -// CHECK: entry: -// CHECK: %this.addr = alloca %class.anon addrspace(4)* -// CHECK: %this.addr.ascast = addrspacecast %class.anon addrspace(4)** %this.addr to %class.anon addrspace(4)* addrspace(4)* -// CHECK: store %class.anon addrspace(4)* %this, %class.anon addrspace(4)* addrspace(4)* %this.addr.ascast -// CHECK: %this1 = load %class.anon addrspace(4)*, %class.anon addrspace(4)* addrspace(4)* %this.addr.ascast - -// Check the store of 10 into the int value -// CHECK: %x = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %this1, i32 0, i32 0 -// CHECK: store i32 10, i32 addrspace(4)* %x - -// Check the store of 2.3f into the float value -// CHECK: %f2 = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %this1, i32 0, i32 1 -// CHECK: store float 0x4002666660000000, float addrspace(4)* %f2 -// CHECK: ret void diff --git a/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-host-intelfpga-bitint.cpp b/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-host-intelfpga-bitint.cpp deleted file mode 100644 index f65d311cead68..0000000000000 --- a/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-host-intelfpga-bitint.cpp +++ /dev/null @@ -1,25 +0,0 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fsycl-is-host -fintelfpga -triple x86_64 -aux-triple spir64_fpga -emit-llvm %s -o - | FileCheck %s - -// This test checks that we generate appropriate code for division -// operations of _BitInts of size greater than 128 bits, since it -// is allowed when -fintelfpga is enabled. The test uses a value of -// 4096 for the bitsize as that is the maximum that is currently -// supported. - -// CHECK: define{{.*}} void @_Z3fooDB4096_S_(i4096* {{.*}} sret(i4096) align 8 %agg.result, i4096* {{.*}} byval(i4096) align 8 %[[ARG1:[0-9]+]], i4096* {{.*}} byval(i4096) align 8 %[[ARG2:[0-9]+]]) -signed _BitInt(4096) foo(signed _BitInt(4096) a, signed _BitInt(4096) b) { - // CHECK: %[[VAR_A:a]].addr = alloca i4096, align 8 - // CHECK: %[[VAR_B:b]].addr = alloca i4096, align 8 - // CHECK: %[[VAR_A]] = load i4096, i4096* %[[ARG1]], align 8 - // CHECK: %[[VAR_B]] = load i4096, i4096* %[[ARG2]], align 8 - // CHECK: store i4096 %[[VAR_A]], i4096* %[[VAR_A]].addr, align 8 - // CHECK: store i4096 %[[VAR_B]], i4096* %[[VAR_B]].addr, align 8 - // CHECK: %[[TEMP1:[0-9]+]] = load i4096, i4096* %[[VAR_A]].addr, align 8 - // CHECK: %[[TEMP2:[0-9]+]] = load i4096, i4096* %[[VAR_B]].addr, align 8 - // CHECK: %div = sdiv i4096 %[[TEMP1]], %[[TEMP2]] - // CHECK: store i4096 %div, i4096* %agg.result, align 8 - // CHECK: %[[RES:[0-9+]]] = load i4096, i4096* %agg.result, align 8 - // CHECK: store i4096 %[[RES]], i4096* %agg.result, align 8 - // CHECK: ret void - return a / b; -} diff --git a/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-intelfpga-bitint.cpp b/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-intelfpga-bitint.cpp deleted file mode 100644 index cb8ef1b8bfd8d..0000000000000 --- a/clang/test/CodeGenSYCL/no-opaque-ptrs-sycl-intelfpga-bitint.cpp +++ /dev/null @@ -1,33 +0,0 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fsycl-is-device -fintelfpga -triple spir64_fpga -aux-triple x86_64-unknown-linux-gnu -IInputs -emit-llvm %s -o - | FileCheck %s - -// This test checks that we generate appropriate code for division -// operations of _BitInts of size greater than 128 bits, since it -// is allowed when -fintelfpga is enabled. The test uses a value -// of 4096 for the bitsize, the max that is currently supported. - -#include "Inputs/sycl.hpp" - -// CHECK: define{{.*}} void @_Z3fooDB4096_S_(i4096 addrspace(4)* {{.*}} sret(i4096) align 8 %agg.result, i4096* {{.*}} byval(i4096) align 8 %[[ARG1:[0-9]+]], i4096* {{.*}} byval(i4096) align 8 %[[ARG2:[0-9]+]]) -signed _BitInt(4096) foo(signed _BitInt(4096) a, signed _BitInt(4096) b) { - // CHECK: %a.addr.ascast = addrspacecast i4096* %a.addr to i4096 addrspace(4)* - // CHECK: %b.addr.ascast = addrspacecast i4096* %b.addr to i4096 addrspace(4)* - // CHECK: %a = load i4096, i4096* %[[ARG1]], align 8 - // CHECK: %b = load i4096, i4096* %[[ARG2]], align 8 - // CHECK: store i4096 %a, i4096 addrspace(4)* %a.addr.ascast, align 8 - // CHECK: store i4096 %b, i4096 addrspace(4)* %b.addr.ascast, align 8 - // CHECK: %2 = load i4096, i4096 addrspace(4)* %a.addr.ascast, align 8 - // CHECK: %3 = load i4096, i4096 addrspace(4)* %b.addr.ascast, align 8 - // CHECK: %div = sdiv i4096 %2, %3 - // CHECK: store i4096 %div, i4096 addrspace(4)* %agg.result, align 8 - // CHECK: ret void - return a / b; -} - -int main() { - sycl::handler h; - auto lambda = []() { - _BitInt(4096) a, b = 3, c = 4; - a = foo(b, c); - }; - h.single_task(lambda); -} diff --git a/clang/test/CodeGenSYCL/no_opaque_accessor_inheritance.cpp b/clang/test/CodeGenSYCL/no_opaque_accessor_inheritance.cpp deleted file mode 100644 index 96f36f11c727a..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_accessor_inheritance.cpp +++ /dev/null @@ -1,97 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -#include "Inputs/sycl.hpp" - -struct Base { - int A, B; - sycl::accessor AccField; -}; - -struct Captured : Base, - sycl::accessor { - int C; -}; - -int main() { - Captured Obj; - sycl::kernel_single_task( - [=]() { - Obj.use(); - }); - return 0; -} - -// Check kernel parameters -// CHECK: %[[RANGE_TYPE:"struct.sycl::_V1::range"]] -// CHECK: %[[ID_TYPE:"struct.sycl::_V1::id"]] -// CHECK: define {{.*}}spir_kernel void @_ZTSZ4mainE6kernel -// CHECK-SAME: i32 noundef [[ARG_A:%[a-zA-Z0-9_]+]], -// CHECK-SAME: i32 noundef [[ARG_B:%[a-zA-Z0-9_]+]], -// CHECK-SAME: i8 addrspace(1)* noundef readonly align 1 [[ACC1_DATA:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC1_RANGE1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC1_RANGE2:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[ID_TYPE]]* noundef byval(%[[ID_TYPE]]) align 4 [[ACC1_ID:%[a-zA-Z0-9_]+]], -// CHECK-SAME: i8 addrspace(1)* noundef readonly align 1 [[ACC2_DATA:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC2_RANGE1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC2_RANGE2:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[ID_TYPE]]* noundef byval(%[[ID_TYPE]]) align 4 [[ACC2_ID:%[a-zA-Z0-9_]+]], -// CHECK-SAME: i32 noundef [[ARG_C:%[a-zA-Z0-9_]+]]) - -// Allocas and addrspacecasts for kernel parameters -// CHECK: [[ARG_A]].addr = alloca i32 -// CHECK: [[ARG_B]].addr = alloca i32 -// CHECK: [[ACC1_DATA]].addr = alloca i8 addrspace(1) -// CHECK: [[ACC2_DATA]].addr = alloca i8 addrspace(1)* -// CHECK: [[ARG_C]].addr = alloca i32 -// CHECK: [[KERNEL:%[a-zA-Z0-9_]+]] = alloca %class{{.*}}.anon -// CHECK: [[ARG_A]].addr.ascast = addrspacecast i32* [[ARG_A]].addr to i32 addrspace(4)* -// CHECK: [[ARG_B]].addr.ascast = addrspacecast i32* [[ARG_B]].addr to i32 addrspace(4)* -// CHECK: [[ACC1_DATA]].addr.ascast = addrspacecast i8 addrspace(1)** [[ACC1_DATA]].addr to i8 addrspace(1)* addrspace(4)* -// CHECK: [[ACC2_DATA]].addr.ascast = addrspacecast i8 addrspace(1)** [[ACC2_DATA]].addr to i8 addrspace(1)* addrspace(4)* -// CHECK: [[ARG_C]].addr.ascast = addrspacecast i32* [[ARG_C]].addr to i32 addrspace(4)* -// -// Lambda object alloca -// CHECK: [[KERNEL_OBJ:%[a-zA-Z0-9_.]+]] = addrspacecast %class{{.*}}.anon* [[KERNEL]] to %class{{.*}}.anon addrspace(4)* -// -// Kernel argument stores -// CHECK: store i32 [[ARG_A]], i32 addrspace(4)* [[ARG_A]].addr.ascast -// CHECK: store i32 [[ARG_B]], i32 addrspace(4)* [[ARG_B]].addr.ascast -// CHECK: store i8 addrspace(1)* [[ACC1_DATA]], i8 addrspace(1)* addrspace(4)* [[ACC1_DATA]].addr.ascast -// CHECK: store i8 addrspace(1)* [[ACC2_DATA]], i8 addrspace(1)* addrspace(4)* [[ACC2_DATA]].addr.ascast -// CHECK: store i32 [[ARG_C]], i32 addrspace(4)* [[ARG_C]].addr.ascast -// -// Check A and B scalar fields initialization -// CHECK: [[GEP:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[KERNEL_OBJ]], i32 0, i32 0 -// CHECK: [[BITCAST:%[a-zA-Z0-9_]+]] = bitcast %struct{{.*}}Captured addrspace(4)* [[GEP]] to %struct{{.*}}Base addrspace(4)* -// CHECK: [[FIELD_A:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}Base, %struct{{.*}}Base addrspace(4)* [[BITCAST]], i32 0, i32 0 -// CHECK: [[ARG_A_LOAD:%[a-zA-Z0-9_]+]] = load i32, i32 addrspace(4)* [[ARG_A]].addr.ascast -// CHECK: store i32 [[ARG_A_LOAD]], i32 addrspace(4)* [[FIELD_A]] -// CHECK: [[FIELD_B:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}Base, %struct{{.*}}Base addrspace(4)* [[BITCAST]], i32 0, i32 1 -// CHECK: [[ARG_B_LOAD:%[a-zA-Z0-9_]+]] = load i32, i32 addrspace(4)* [[ARG_B]].addr.ascast -// CHECK: store i32 [[ARG_B_LOAD]], i32 addrspace(4)* [[FIELD_B]] -// -// Check accessors initialization -// CHECK: [[ACC_FIELD:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}Base, %struct{{.*}}Base addrspace(4)* [[BITCAST]], i32 0, i32 2 -// Default constructor call -// CHECK: call spir_func void @_ZN4sycl3_V18accessorIcLi1ELNS0_6access4modeE1024ELNS2_6targetE2014ELNS2_11placeholderE0ENS0_3ext6oneapi22accessor_property_listIJEEEEC1Ev(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[ACC_FIELD]]) -// CHECK: [[BITCAST1:%[a-zA-Z0-9_]+]] = bitcast %struct{{.*}}Captured addrspace(4)* [[GEP]] to i8 addrspace(4)* -// CHECK: [[GEP1:%[a-zA-Z0-9_]+]] = getelementptr inbounds i8, i8 addrspace(4)* [[BITCAST1]], i64 20 -// CHECK: [[BITCAST2:%[a-zA-Z0-9_]+]] = bitcast i8 addrspace(4)* [[GEP1]] to %"class.sycl::_V1::accessor" addrspace(4)* -// Default constructor call -// CHECK: call spir_func void @_ZN4sycl3_V18accessorIcLi1ELNS0_6access4modeE1024ELNS2_6targetE2014ELNS2_11placeholderE0ENS0_3ext6oneapi22accessor_property_listIJEEEEC2Ev(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[BITCAST2]]) - -// CHECK C field initialization -// CHECK: [[FIELD_C:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}Captured, %struct{{.*}}Captured addrspace(4)* [[GEP]], i32 0, i32 2 -// CHECK: [[ARG_C_LOAD:%[a-zA-Z0-9_]+]] = load i32, i32 addrspace(4)* [[ARG_C]].addr.ascast -// CHECK: store i32 [[ARG_C_LOAD]], i32 addrspace(4)* [[FIELD_C]] -// -// Check __init method calls -// CHECK: [[GEP2:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[KERNEL_OBJ]], i32 0, i32 0 -// CHECK: [[BITCAST3:%[a-zA-Z0-9_]+]] = bitcast %struct{{.*}}Captured addrspace(4)* [[GEP2]] to %struct{{.*}}Base addrspace(4)* -// CHECK: [[ACC1_FIELD:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}Base, %struct{{.*}}Base addrspace(4)* [[BITCAST3]], i32 0, i32 2 -// CHECK: [[ACC1_DATA_LOAD:%[a-zA-Z0-9_]+]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(4)* [[ACC1_DATA]].addr.ascast -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[ACC1_FIELD]], i8 addrspace(1)* noundef [[ACC1_DATA_LOAD]] -// -// CHECK: [[GEP3:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[KERNEL_OBJ]], i32 0, i32 0 -// CHECK: [[ACC2_DATA_LOAD:%[a-zA-Z0-9_]+]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(4)* [[ACC2_DATA]].addr.ascast -// CHECK: [[BITCAST4:%[a-zA-Z0-9_]+]] = bitcast %struct{{.*}}Captured addrspace(4)* [[GEP3]] to %"class.sycl::_V1::accessor" addrspace(4)* -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[BITCAST4]], i8 addrspace(1)* noundef [[ACC2_DATA_LOAD]] diff --git a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member.cpp b/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member.cpp deleted file mode 100644 index 198407269d911..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member.cpp +++ /dev/null @@ -1,138 +0,0 @@ -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -DTEST_SCALAR -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Tests the generation of IR annotation calls from -// __sycl_detail__::add_ir_annotations_member attributes. - -#include "mock_properties.hpp" -#include "sycl.hpp" - -#ifdef TEST_SCALAR -#define TEST_T char -#else -#define TEST_T int * -#endif - -template class g { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member(Properties::name..., Properties::value...)]] -#endif - ; - - g() : x() {} - g(TEST_T _x) : x(_x) {} -}; - -class h { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] -#endif - ; - - h() : x() {} - h(TEST_T _x) : x(_x) {} -}; - -template class gh { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - Properties::name..., "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - Properties::value..., "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] -#endif - ; - - gh() : x() {} - gh(TEST_T _x) : x(_x) {} -}; - -template class hg { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", Properties::name..., - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2, Properties::value...)]] -#endif - ; - - hg() : x() {} - hg(TEST_T _x) : x(_x) {} -}; - -int main() { - sycl::queue q; - g a; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a.x; - }); - }); - h b; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)b.x; - }); - }); - gh c; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)c.x; - }); - }); - hg d; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)d.x; - }); - }); -} - -// CHECK-DAG: @[[AnnotName:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"sycl-properties\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop1\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop2Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop2\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop3Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop3\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop4Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop4\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop5Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop5\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop6Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop6\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop7Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop7\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop11Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop11\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop12Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop12\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop13Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop13\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop14Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop14\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop15Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop15\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop16Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop16\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop17Name:.*]] = private unnamed_addr addrspace(1) constant [7 x i8] c"Prop17\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Value:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"Property string\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop2_7_14Value:.*]] = private unnamed_addr addrspace(1) constant [2 x i8] c"1\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop3Value:.*]] = private unnamed_addr addrspace(1) constant [5 x i8] c"true\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop4_12_17Value:.*]] = private unnamed_addr addrspace(1) constant [2 x i8] c"2\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop11Value:.*]] = private unnamed_addr addrspace(1) constant [24 x i8] c"Another property string\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop13Value:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"false\00", section "llvm.metadata" - -// CHECK-DAG: @[[GArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]], [6 x i8] addrspace(1)* @[[Prop4Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [6 x i8] addrspace(1)* @[[Prop5Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop6Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop7Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]] }, section "llvm.metadata" -// CHECK-DAG: @[[HArgs:.*]] = private unnamed_addr addrspace(1) constant { [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [7 x i8] addrspace(1)* @[[Prop11Name]], [24 x i8] addrspace(1)* @[[Prop11Value]], [7 x i8] addrspace(1)* @[[Prop12Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [7 x i8] addrspace(1)* @[[Prop13Name]], [6 x i8] addrspace(1)* @[[Prop13Value]], [7 x i8] addrspace(1)* @[[Prop14Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [7 x i8] addrspace(1)* @[[Prop15Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop16Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop17Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]] }, section "llvm.metadata" -// CHECK-DAG: @[[GHArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]], [6 x i8] addrspace(1)* @[[Prop4Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [6 x i8] addrspace(1)* @[[Prop5Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop6Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop7Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [7 x i8] addrspace(1)* @[[Prop11Name]], [24 x i8] addrspace(1)* @[[Prop11Value]], [7 x i8] addrspace(1)* @[[Prop12Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [7 x i8] addrspace(1)* @[[Prop13Name]], [6 x i8] addrspace(1)* @[[Prop13Value]], [7 x i8] addrspace(1)* @[[Prop14Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [7 x i8] addrspace(1)* @[[Prop15Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop16Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop17Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]] }, section "llvm.metadata" -// CHECK-DAG: @[[HGArgs:.*]] = private unnamed_addr addrspace(1) constant { [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [7 x i8] addrspace(1)* @[[Prop11Name]], [24 x i8] addrspace(1)* @[[Prop11Value]], [7 x i8] addrspace(1)* @[[Prop12Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [7 x i8] addrspace(1)* @[[Prop13Name]], [6 x i8] addrspace(1)* @[[Prop13Value]], [7 x i8] addrspace(1)* @[[Prop14Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [7 x i8] addrspace(1)* @[[Prop15Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop16Name]], i8 addrspace(1)* null, [7 x i8] addrspace(1)* @[[Prop17Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]], [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]], [6 x i8] addrspace(1)* @[[Prop4Name]], [2 x i8] addrspace(1)* @[[Prop4_12_17Value]], [6 x i8] addrspace(1)* @[[Prop5Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop6Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop7Name]], [2 x i8] addrspace(1)* @[[Prop2_7_14Value]] }, section "llvm.metadata" - -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[GArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[HArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[GHArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [7 x i8] addrspace(1)*, [24 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, i8 addrspace(1)*, [7 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[HGArgs]] to i8 addrspace(1)*)) diff --git a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_filter.cpp b/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_filter.cpp deleted file mode 100644 index a989a523c86de..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_filter.cpp +++ /dev/null @@ -1,63 +0,0 @@ -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -DTEST_SCALAR -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Tests the optional filter parameter of -// __sycl_detail__::add_ir_annotations_member attributes. - -#include "mock_properties.hpp" -#include "sycl.hpp" - -#ifdef TEST_SCALAR -#define TEST_T char -#else -#define TEST_T int * -#endif - -template class g { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - {"Prop1", "Prop7", "Prop5"}, - Properties::name..., Properties::value...)]] -#endif - ; - - g() : x() {} - g(TEST_T _x) : x(_x) {} -}; - -int main() { - sycl::queue q; - g a; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a.x; - }); - }); -} - -// CHECK-DAG: @[[AnnotName:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"sycl-properties\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop1\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop5Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop5\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop7Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop7\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Value:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"Property string\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop2_7Value:.*]] = private unnamed_addr addrspace(1) constant [2 x i8] c"1\00", section "llvm.metadata" - -// CHECK-DAG: @[[GArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop5Name]], i8 addrspace(1)* null, [6 x i8] addrspace(1)* @[[Prop7Name]], [2 x i8] addrspace(1)* @[[Prop2_7Value]] }, section "llvm.metadata" - -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[GArgs]] to i8 addrspace(1)*)) - -// CHECK-NOT: @[[Prop2Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop2\00", section "llvm.metadata" -// CHECK-NOT: @[[Prop3Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop3\00", section "llvm.metadata" -// CHECK-NOT: @[[Prop4Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop4\00", section "llvm.metadata" -// CHECK-NOT: @[[Prop6Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop6\00", section "llvm.metadata" -// CHECK-NOT: @[{{.*}} = private unnamed_addr addrspace(1) constant [5 x i8] c"true\00", section "llvm.metadata" -// CHECK-NOT: @{{.*}} = private unnamed_addr addrspace(1) constant [2 x i8] c"2\00", section "llvm.metadata" diff --git a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_reuse.cpp b/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_reuse.cpp deleted file mode 100644 index e235e663fe4c8..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_add_ir_annotations_member_reuse.cpp +++ /dev/null @@ -1,112 +0,0 @@ -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -DTEST_SCALAR -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Tests the reuse of generated annotation value global variables for -// __sycl_detail__::add_ir_annotations_member attributes. - -#include "mock_properties.hpp" -#include "sycl.hpp" - -#ifdef TEST_SCALAR -#define TEST_T char -#else -#define TEST_T int * -#endif - -template class g { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - Properties::name..., Properties::value...)]] -#endif - ; - - g() : x() {} - g(TEST_T _x) : x(_x) {} -}; - -template class h { -public: - TEST_T x -#ifdef __SYCL_DEVICE_ONLY__ - [[__sycl_detail__::add_ir_annotations_member( - {"Prop1", "Prop2", "Prop3"}, - Properties::name..., Properties::value...)]] -#endif - ; - - h() : x() {} - h(TEST_T _x) : x(_x) {} -}; - -int main() { - sycl::queue q; - g a; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a.x; - }); - }); - g b; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)b.x; - }); - }); - h c; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)c.x; - }); - }); - g d; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)d.x; - }); - }); - g e; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)e.x; - }); - }); - g f; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)f.x; - }); - }); -} - -// CHECK-DAG: @[[AnnotName:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"sycl-properties\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop1\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop2Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop2\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop3Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop3\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop5Name:.*]] = private unnamed_addr addrspace(1) constant [6 x i8] c"Prop5\00", section "llvm.metadata" - -// CHECK-DAG: @[[Prop1Value:.*]] = private unnamed_addr addrspace(1) constant [16 x i8] c"Property string\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop2Value:.*]] = private unnamed_addr addrspace(1) constant [2 x i8] c"1\00", section "llvm.metadata" -// CHECK-DAG: @[[Prop3Value:.*]] = private unnamed_addr addrspace(1) constant [5 x i8] c"true\00", section "llvm.metadata" - -// CHECK-DAG: @[[ReusedArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2Value]], [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]] }, section "llvm.metadata" -// CHECK-DAG: @[[DArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2Value]] }, section "llvm.metadata" -// CHECK-DAG: @[[EArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2Value]], [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]], [6 x i8] addrspace(1)* @[[Prop5Name]], i8 addrspace(1)* null }, section "llvm.metadata" -// CHECK-DAG: @[[FArgs:.*]] = private unnamed_addr addrspace(1) constant { [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)* } { [6 x i8] addrspace(1)* @[[Prop3Name]], [5 x i8] addrspace(1)* @[[Prop3Value]], [6 x i8] addrspace(1)* @[[Prop2Name]], [2 x i8] addrspace(1)* @[[Prop2Value]], [6 x i8] addrspace(1)* @[[Prop1Name]], [16 x i8] addrspace(1)* @[[Prop1Value]] }, section "llvm.metadata" - -// CHECK-COUNT-3: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)* } addrspace(1)* @[[ReusedArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)* } addrspace(1)* @[[DArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, i8 addrspace(1)* } addrspace(1)* @[[EArgs]] to i8 addrspace(1)*)) -// CHECK-DAG: %{{.*}} = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 {{.*}}, i8 addrspace(1)* getelementptr inbounds ([16 x i8], [16 x i8] addrspace(1)* @[[AnnotName]], i32 0, i32 0), i8 addrspace(1)* getelementptr inbounds {{.*}}, i32 {{.*}}, i8 addrspace(1)* bitcast ({ [6 x i8] addrspace(1)*, [5 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [2 x i8] addrspace(1)*, [6 x i8] addrspace(1)*, [16 x i8] addrspace(1)* } addrspace(1)* @[[FArgs]] to i8 addrspace(1)*)) diff --git a/clang/test/CodeGenSYCL/no_opaque_add_ir_attributes_kernel_parameter.cpp b/clang/test/CodeGenSYCL/no_opaque_add_ir_attributes_kernel_parameter.cpp deleted file mode 100644 index 5d3275cd10375..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_add_ir_attributes_kernel_parameter.cpp +++ /dev/null @@ -1,412 +0,0 @@ - -// RUN: %clang_cc1 -internal-isystem %S/Inputs -disable-llvm-passes \ -// RUN: -triple spir64-unknown-unknown -fsycl-is-device -S \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Tests the generation of IR attributes when using -// __sycl_detail__::add_ir_attributes_kernel_parameter - -#include "mock_properties.hpp" -#include "sycl.hpp" - -// One __init parameter with add_ir_attributes_kernel_parameter attribute. - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) g { -public: - int *x; - - g() : x(nullptr) {} - g(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., Properties::value...)]] int *_x) { - x = _x; - } -#endif -}; - -class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) h { -public: - int *x; - - h() : x(nullptr) {} - h(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x) { - x = _x; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) gh { -public: - int *x; - - gh() : x(nullptr) {} - gh(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - Properties::value..., "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x) { - x = _x; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) hg { -public: - int *x; - - hg() : x(nullptr) {} - hg(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", Properties::name..., - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2, Properties::value...)]] int *_x) { - x = _x; - } -#endif -}; - -// Two __init parameters, one with add_ir_attributes_kernel_parameter attribute. - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) k { -public: - int *x; - float *y; - - k() : x(nullptr), y(nullptr) {} - k(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., Properties::value...)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) l { -public: - int *x; - float *y; - - l() : x(nullptr), y(nullptr) {} - l(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) kl { -public: - int *x; - float *y; - - kl() : x(nullptr), y(nullptr) {} - kl(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - Properties::value..., "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) lk { -public: - int *x; - float *y; - - lk() : x(nullptr), y(nullptr) {} - lk(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", Properties::name..., - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2, Properties::value...)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -// Two __init parameters, both with add_ir_attributes_kernel_parameter attribute. - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) m { -public: - int *x; - float *y; - - m() : x(nullptr), y(nullptr) {} - m(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., Properties::value...)]] int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., Properties::value...)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) n { -public: - int *x; - float *y; - - n() : x(nullptr), y(nullptr) {} - n(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) mn { -public: - int *x; - float *y; - - mn() : x(nullptr), y(nullptr) {} - mn(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - Properties::value..., "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - Properties::name..., "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", - Properties::value..., "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -template class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) nm { -public: - int *x; - float *y; - - nm() : x(nullptr), y(nullptr) {} - nm(int *_x, float *_y) : x(_x), y(_y) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", Properties::name..., - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2, Properties::value...)]] int *_x, - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "Prop11", "Prop12", "Prop13", "Prop14", "Prop15", "Prop16", "Prop17", Properties::name..., - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2, Properties::value...)]] float *_y) { - x = _x; - y = _y; - } -#endif -}; - -// Empty attribute names. - -class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) np { -public: - int *x; - - np() : x(nullptr) {} - np(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "", "", "", "", "", "", "", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x) { - x = _x; - } -#endif -}; - -class __attribute__((sycl_special_class)) __SYCL_TYPE(annotated_arg) mp { -public: - int *x; - - mp() : x(nullptr) {} - mp(int *_x) : x(_x) {} - -#ifdef __SYCL_DEVICE_ONLY__ - void __init( - [[__sycl_detail__::add_ir_attributes_kernel_parameter( - "", "Prop12", "", "", "", "Prop16", "Prop17", - "Another property string", 2, false, TestEnum::Enum1, nullptr, nullptr, ScopedTestEnum::ScopedEnum2)]] int *_x) { - x = _x; - } -#endif -}; - -int main() { - sycl::queue q; - g a1; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a1; - }); - }); - h b1; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)b1; - }); - }); - gh c1; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)c1; - }); - }); - hg d1; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)d1; - }); - }); - k a2; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a2; - }); - }); - l b2; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)b2; - }); - }); - kl c2; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)c2; - }); - }); - lk d2; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)d2; - }); - }); - m a3; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)a3; - }); - }); - n b3; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)b3; - }); - }); - mn c3; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)c3; - }); - }); - nm d3; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)d3; - }); - }); - np e; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)e; - }); - }); - mp f; - q.submit([&](sycl::handler &h) { - h.single_task( - [=]() { - (void)f; - }); - }); -} - -// One __init parameter with add_ir_attributes_kernel_parameter attribute. -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel1({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel2({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel3({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel4({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) - -// Two __init parameters, one with add_ir_attributes_kernel_parameter attribute. -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel5({{.*}}i32 addrspace({{.*}})* {{[^"]*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel6({{.*}}i32 addrspace({{.*}})* {{[^"]*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel7({{.*}}i32 addrspace({{.*}})* {{[^"]*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel8({{.*}}i32 addrspace({{.*}})* {{[^"]*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) - -// Two __init parameters, both with add_ir_attributes_kernel_parameter attribute. -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel9({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel10({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel11({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel12({{.*}}i32 addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}, {{.*}}float addrspace({{.*}})* {{.*}}"Prop1"="Property string"{{.*}}"Prop11"="Another property string"{{.*}}"Prop12"="2"{{.*}}"Prop13"="false"{{.*}}"Prop14"="1"{{.*}}"Prop15"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}}"Prop2"="1"{{.*}}"Prop3"="true"{{.*}}"Prop4"="2"{{.*}}"Prop5"{{.*}}"Prop6"{{.*}}"Prop7"="1"{{.*}} %{{.*}}) - -// Empty attribute names. -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel13({{.*}}i32 addrspace({{.*}})* {{.*}} %{{.*}}) -// CHECK-DAG: define {{.*}}spir_kernel void @{{.*}}test_kernel14({{.*}})* {{.*}}"Prop12"="2"{{.*}}"Prop16"{{.*}}"Prop17"="2"{{.*}} %{{.*}}) -// CHECK-NOT: ""="Another property string" -// CHECK-NOT: ""="1" -// CHECK-NOT: ""="2" -// CHECK-NOT: ""="false" diff --git a/clang/test/CodeGenSYCL/no_opaque_address-space-builtin-alloca.cpp b/clang/test/CodeGenSYCL/no_opaque_address-space-builtin-alloca.cpp deleted file mode 100644 index d72cd30f30614..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_address-space-builtin-alloca.cpp +++ /dev/null @@ -1,13 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-linux -fsycl-is-device -disable-llvm-passes -no-opaque-pointers -emit-llvm -x c++ %s -o - | FileCheck %s - -// Test to verify that address space cast is generated correctly for __builtin_alloca - -__attribute__((sycl_device)) void foo() { - // CHECK: %TestVar = alloca i32 addrspace(4)*, align 8 - // CHECK: %TestVar.ascast = addrspacecast i32 addrspace(4)** %TestVar to i32 addrspace(4)* addrspace(4)* - // CHECK: %[[ALLOCA:[0-9]+]] = alloca i8, i64 1, align 8 - // CHECK: %[[ADDRSPCAST:[0-9]+]] = addrspacecast i8* %[[ALLOCA]] to i8 addrspace(4)* - // CHECK: %[[BITCAST:[0-9]+]] = bitcast i8 addrspace(4)* %[[ADDRSPCAST]] to i32 addrspace(4)* - // CHECK: store i32 addrspace(4)* %[[BITCAST]], i32 addrspace(4)* addrspace(4)* %TestVar.ascast, align 8 - int *TestVar = (int *)__builtin_alloca(1); -} diff --git a/clang/test/CodeGenSYCL/no_opaque_address-space-cond-op.cpp b/clang/test/CodeGenSYCL/no_opaque_address-space-cond-op.cpp deleted file mode 100644 index bee4bc44626cf..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_address-space-cond-op.cpp +++ /dev/null @@ -1,49 +0,0 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -x c++ -triple spir64-unknown-linux -disable-llvm-passes -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -struct S { - unsigned short x; -}; - -// CHECK-LABEL: define {{[^@]+}}@_Z3foobR1SS_( -// CHECK: entry: -// CHECK-NEXT: [[COND_ADDR:%.*]] = alloca i8, align 1 -// CHECK-NEXT: [[LHS_ADDR:%.*]] = alloca [[STRUCT_S:%.*]] addrspace(4)*, align 8 -// CHECK-NEXT: [[COND_ADDR_ASCAST:%.*]] = addrspacecast i8* [[COND_ADDR]] to i8 addrspace(4)* -// CHECK-NEXT: [[LHS_ADDR_ASCAST:%.*]] = addrspacecast [[STRUCT_S]] addrspace(4)** [[LHS_ADDR]] to [[STRUCT_S]] addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[COND:%.*]] to i8 -// CHECK-NEXT: store i8 [[FROMBOOL]], i8 addrspace(4)* [[COND_ADDR_ASCAST]], align 1 -// CHECK-NEXT: store [[STRUCT_S]] addrspace(4)* [[LHS:%.*]], [[STRUCT_S]] addrspace(4)* addrspace(4)* [[LHS_ADDR_ASCAST]], align 8 -// CHECK-NEXT: [[RHS_ASCAST:%.*]] = addrspacecast %struct.S* [[RHS:%.*]] to [[STRUCT_S]] addrspace(4)* -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8 addrspace(4)* [[COND_ADDR_ASCAST]], align 1 -// CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP0]] to i1 -// CHECK-NEXT: br i1 [[TOBOOL]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] -// CHECK: cond.true: -// CHECK-NEXT: [[TMP1:%.*]] = load [[STRUCT_S]] addrspace(4)*, [[STRUCT_S]] addrspace(4)* addrspace(4)* [[LHS_ADDR_ASCAST]], align 8 -// CHECK-NEXT: br label [[COND_END:%.*]] -// CHECK: cond.false: -// CHECK-NEXT: br label [[COND_END]] -// CHECK: cond.end: -// CHECK-NEXT: [[COND_LVALUE:%.*]] = phi [[STRUCT_S]] addrspace(4)* [ [[TMP1]], [[COND_TRUE]] ], [ [[RHS_ASCAST]], [[COND_FALSE]] ] -// CHECK-NEXT: [[TMP2:%.*]] = bitcast [[STRUCT_S]] addrspace(4)* [[AGG_RESULT:%.*]] to i8 addrspace(4)* -// CHECK-NEXT: [[TMP3:%.*]] = bitcast [[STRUCT_S]] addrspace(4)* [[COND_LVALUE]] to i8 addrspace(4)* -// CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 2 [[TMP2]], i8 addrspace(4)* align 2 [[TMP3]], i64 2, i1 false) -// CHECK-NEXT: ret void -// -S foo(bool cond, S &lhs, S rhs) { - S val = cond ? lhs : rhs; - return val; -} - -template -__attribute__((sycl_kernel)) void kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel([]() { - S lhs, rhs; - foo(true, lhs, rhs); - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_address-space-new.cpp b/clang/test/CodeGenSYCL/no_opaque_address-space-new.cpp deleted file mode 100644 index e02b82965a8a9..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_address-space-new.cpp +++ /dev/null @@ -1,117 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -struct SpaceWaster { - int i, j; -}; - -struct HasX { - int x; -}; - -struct Y : SpaceWaster, HasX {}; - -SYCL_EXTERNAL void bar(HasX &hx); - -void baz(Y &y) { - bar(y); -} - -void test() { - static const int foo = 0x42; - // CHECK: @_ZZ4testvE3foo = internal addrspace(1) constant i32 66, align 4 - - // Intentionally leave a part of an array uninitialized. This triggers a - // different code path contrary to a fully initialized array. - static const unsigned bars[256] = { - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, - 11, 12, 13, 14, 15, 16, 17, 18, 19, 20 - }; - (void)bars; - // CHECK: @_ZZ4testvE4bars = internal addrspace(1) constant <{ [21 x i32], [235 x i32] }> <{ [21 x i32] [i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20], [235 x i32] zeroinitializer }>, align 4 - - // CHECK: @[[STR:[.a-zA-Z0-9_]+]] = private unnamed_addr addrspace(1) constant [14 x i8] c"Hello, world!\00", align 1 - - // CHECK: %[[ARR:[a-zA-Z0-9]+]] = alloca [42 x i32] - // CHECK: %[[GEN:.*]] = addrspacecast i32* %i to i32 addrspace(4)* - // CHECK: [[ARR_ASCAST:%.*]] = addrspacecast [42 x i32]* %[[ARR]] to [42 x i32] addrspace(4)* - - int i = 0; - int *pptr = &i; - // CHECK: store i32 addrspace(4)* %[[GEN]], i32 addrspace(4)* addrspace(4)* %pptr.ascast - bool is_i_ptr = (pptr == &i); - // CHECK: %[[VALPPTR:[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %pptr.ascast - // CHECK: %cmp{{[0-9]*}} = icmp eq i32 addrspace(4)* %[[VALPPTR]], %i.ascast - *pptr = foo; - - int var23 = 23; - char *cp = (char *)&var23; - *cp = 41; - // CHECK: store i32 23, i32 addrspace(4)* %[[VAR:[a-zA-Z0-9]+]] - // CHECK: [[VARCAST:[a-zA-Z0-9]+]] = bitcast i32 addrspace(4)* %[[VARAS:[a-zA-Z0-9]+]] to i8 addrspace(4)* - // CHECK: store i8 addrspace(4)* %[[VARCAST]], i8 addrspace(4)* addrspace(4)* %{{.*}} - - int arr[42]; - char *cpp = (char *)arr; - *cpp = 43; - // CHECK: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4)* [[ARR_ASCAST]], i64 0, i64 0 - // CHECK: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32 addrspace(4)* [[ARRAYDECAY1]], i64 10 - // CHECK: store i32 addrspace(4)* [[ADD_PTR]], i32 addrspace(4)* addrspace(4)* %{{.*}} - - int *aptr = arr + 10; - if (aptr < arr + sizeof(arr)) - *aptr = 44; - // CHECK: [[TMP13:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %aptr.ascast - // CHECK: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4)* [[ARR_ASCAST]], i64 0, i64 0 - // CHECK: [[ADD_PTR3:%.*]] = getelementptr inbounds i32, i32 addrspace(4)* [[ARRAYDECAY2]], i64 168 - // CHECK: [[CMP4:%.*]] = icmp ult i32 addrspace(4)* [[TMP13]], [[ADD_PTR3]] - - const char *str = "Hello, world!"; - // CHECK: store i8 addrspace(4)* getelementptr inbounds ([14 x i8], [14 x i8] addrspace(4)* addrspacecast ([14 x i8] addrspace(1)* @.str to [14 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* addrspace(4)* %[[STRVAL:[a-zA-Z0-9.]+]], align 8 - - i = str[0]; - - const char *phi_str = i > 2 ? str : "Another hello world!"; - (void)phi_str; - // CHECK: %[[COND:[a-zA-Z0-9]+]] = icmp sgt i32 %{{.*}}, 2 - // CHECK: br i1 %[[COND]], label %[[CONDTRUE:[.a-zA-Z0-9]+]], label %[[CONDFALSE:[.a-zA-Z0-9]+]] - - // CHECK: [[CONDTRUE]]: - // CHECK-NEXT: %[[VALTRUE:[a-zA-Z0-9]+]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %[[STRVAL]] - // CHECK-NEXT: br label %[[CONDEND:[.a-zA-Z0-9]+]] - - // CHECK: [[CONDFALSE]]: - - // CHECK: [[CONDEND]]: - // CHECK-NEXT: phi i8 addrspace(4)* [ %[[VALTRUE]], %[[CONDTRUE]] ], [ getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @{{.*}} to [21 x i8] addrspace(4)*), i64 0, i64 0), %[[CONDFALSE]] ] - - const char *select_null = i > 2 ? "Yet another Hello world" : nullptr; - (void)select_null; - // CHECK: select i1 %{{.*}}, i8 addrspace(4)* getelementptr inbounds ([24 x i8], [24 x i8] addrspace(4)* addrspacecast ([24 x i8] addrspace(1)* @{{.*}} to [24 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* null - - const char *select_str_trivial1 = true ? str : "Another hello world!"; - (void)select_str_trivial1; - // CHECK: %[[TRIVIALTRUE:[a-zA-Z0-9]+]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* %[[STRVAL]] - // CHECK: store i8 addrspace(4)* %[[TRIVIALTRUE]], i8 addrspace(4)* addrspace(4)* %{{.*}}, align 8 - - const char *select_str_trivial2 = false ? str : "Another hello world!"; - (void)select_str_trivial2; - // CHECK: store i8 addrspace(4)* getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @{{.*}} to [21 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* addrspace(4)* %{{.*}} - - Y yy; - baz(yy); - // CHECK: define {{.*}}spir_func void @{{.*}}baz{{.*}} - // CHECK: %[[FIRST:[a-zA-Z0-9]+]] = bitcast %struct.Y addrspace(4)* %{{.*}} to i8 addrspace(4)* - // CHECK: %[[OFFSET:[a-zA-Z0-9]+]].ptr = getelementptr inbounds i8, i8 addrspace(4)* %[[FIRST]], i64 8 - // CHECK: %[[SECOND:[a-zA-Z0-9]+]] = bitcast i8 addrspace(4)* %[[OFFSET]].ptr to %struct.HasX addrspace(4)* - // CHECK: call spir_func void @{{.*}}bar{{.*}}(%struct.HasX addrspace(4)* noundef align 4 dereferenceable(4) %[[SECOND]]) -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { test(); }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_address-space-of-returns.cpp b/clang/test/CodeGenSYCL/no_opaque_address-space-of-returns.cpp deleted file mode 100644 index 80711b04575be..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_address-space-of-returns.cpp +++ /dev/null @@ -1,43 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-linux -fsycl-is-device -disable-llvm-passes -no-opaque-pointers -emit-llvm -x c++ %s -o - | FileCheck %s - -struct A { - int B[42]; -}; - -const char *ret_char() { - return "N"; -} -// CHECK: ret i8 addrspace(4)* getelementptr inbounds ([2 x i8], [2 x i8] addrspace(4)* addrspacecast ([2 x i8] addrspace(1)* @.str to [2 x i8] addrspace(4)*), i64 0, i64 0) - -const char *ret_arr() { - static const char Arr[42] = {0}; - return Arr; -} -// CHECK: ret i8 addrspace(4)* getelementptr inbounds ([42 x i8], [42 x i8] addrspace(4)* addrspacecast ([42 x i8] addrspace(1)* @{{.*}}ret_arr{{.*}}Arr to [42 x i8] addrspace(4)*), i64 0, i64 0) - -const char &ret_ref() { - static const char a = 'A'; - return a; -} -// CHECK: ret i8 addrspace(4)* addrspacecast (i8 addrspace(1)* @{{.*}}ret_ref{{.*}} to i8 addrspace(4)*) - -A ret_agg() { - A a; - return a; -} -// CHECK: define {{.*}}spir_func void @{{.*}}ret_agg{{.*}}(%struct{{.*}}.A addrspace(4)* noalias sret(%struct{{.*}}.A) align 4 %agg.result) - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - ret_char(); - ret_arr(); - ret_ref(); - ret_agg(); - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_address-space-parameter-conversions.cpp b/clang/test/CodeGenSYCL/no_opaque_address-space-parameter-conversions.cpp deleted file mode 100644 index 49355e7599336..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_address-space-parameter-conversions.cpp +++ /dev/null @@ -1,210 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -void bar(int & Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[RAW_REF:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef align 4 dereferenceable(4) % -void bar2(int & Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[RAW_REF2:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef align 4 dereferenceable(4) % -void bar(__attribute__((opencl_local)) int &Data) {} -// CHECK-DAG: define {{.*}}spir_func void [[LOC_REF:@[a-zA-Z0-9_]+]](i32 addrspace(3)* noundef align 4 dereferenceable(4) % -void bar3(__attribute__((opencl_global)) int &Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[GLOB_REF:[a-zA-Z0-9_]+]](i32 addrspace(1)* noundef align 4 dereferenceable(4) % -void foo(int * Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[RAW_PTR:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef % -void foo2(int * Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[RAW_PTR2:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef % -void foo(__attribute__((opencl_local)) int *Data) {} -// CHECK-DAG: define {{.*}}spir_func void [[LOC_PTR:@[a-zA-Z0-9_]+]](i32 addrspace(3)* noundef % -void foo3(__attribute__((opencl_global)) int *Data) {} -// CHECK-DAG: define {{.*}}spir_func void @[[GLOB_PTR:[a-zA-Z0-9_]+]](i32 addrspace(1)* noundef % - -template -void tmpl(T t){} -// See Check Lines below. - -void usages() { - // CHECK-DAG: [[GLOBA:%[a-zA-Z0-9]+]] = alloca i32 addrspace(1)* - // CHECK-DAG: [[GLOB:%.*]] = addrspacecast i32 addrspace(1)** [[GLOBA]] to i32 addrspace(1)* addrspace(4)* - __attribute__((opencl_global)) int *GLOB; - // CHECK-DAG: [[GLOBDEVA:%[a-zA-Z0-9]+]] = alloca i32 addrspace(5)* - // CHECK-DAG: [[GLOBDEV:%.*]] = addrspacecast i32 addrspace(5)** [[GLOBDEVA]] to i32 addrspace(5)* addrspace(4)* - __attribute__((opencl_global_device)) int *GLOBDEV; - // CHECK-DAG: [[GLOBHOSTA:%[a-zA-Z0-9]+]] = alloca i32 addrspace(6)* - // CHECK-DAG: [[GLOBHOST:%.*]] = addrspacecast i32 addrspace(6)** [[GLOBHOSTA]] to i32 addrspace(6)* addrspace(4)* - __attribute__((opencl_global_host)) int *GLOBHOST; - // CHECK-DAG: [[LOCA:%[a-zA-Z0-9]+]] = alloca i32 addrspace(3)* - // CHECK-DAG: [[LOC:%.*]] = addrspacecast i32 addrspace(3)** [[LOCA]] to i32 addrspace(3)* addrspace(4)* - __attribute__((opencl_local)) int *LOC; - // CHECK-DAG: [[NoASA:%[a-zA-Z0-9]+]] = alloca i32 addrspace(4)* - // CHECK-DAG: [[NoAS:%.*]] = addrspacecast i32 addrspace(4)** [[NoASA]] to i32 addrspace(4)* addrspace(4)* - int *NoAS; - // CHECK-DAG: [[PRIVA:%[a-zA-Z0-9]+]] = alloca i32* - // CHECK-DAG: [[PRIV:%.*]] = addrspacecast i32** [[PRIVA]] to i32* addrspace(4)* - __attribute__((opencl_private)) int *PRIV; - - bar(*GLOB); - // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOB_CAST]]) - bar2(*GLOB); - // CHECK-DAG: [[GLOB_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: [[GLOB_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOB_CAST2]]) - - bar(*GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBDEV_CAST]]) - bar2(*GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBDEV_CAST2]]) - bar3(*GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST3:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD3]] to i32 addrspace(1)* - // CHECK-DAG: call spir_func void @[[GLOB_REF]](i32 addrspace(1)* noundef align 4 dereferenceable(4) [[GLOBDEV_CAST3]]) - - bar(*GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBHOST_CAST]]) - bar2(*GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBHOST_CAST2]]) - bar3(*GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST3:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD3]] to i32 addrspace(1)* - // CHECK-DAG: call spir_func void @[[GLOB_REF]](i32 addrspace(1)* noundef align 4 dereferenceable(4) [[GLOBHOST_CAST3]]) - - bar(*LOC); - // CHECK-DAG: [[LOC_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]] - // CHECK-DAG: call spir_func void [[LOC_REF]](i32 addrspace(3)* noundef align 4 dereferenceable(4) [[LOC_LOAD]]) - bar2(*LOC); - // CHECK-DAG: [[LOC_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]] - // CHECK-DAG: [[LOC_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOC_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[LOC_CAST2]]) - - bar(*NoAS); - // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]] - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[NoAS_LOAD]]) - bar2(*NoAS); - // CHECK-DAG: [[NoAS_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]] - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[NoAS_LOAD2]]) - - foo(GLOB); - // CHECK-DAG: [[GLOB_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: [[GLOB_CAST3:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD3]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[GLOB_CAST3]]) - foo2(GLOB); - // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: [[GLOB_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[GLOB_CAST4]]) - foo(GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[GLOBDEV_CAST4]]) - foo2(GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST5:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD5]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[GLOBDEV_CAST5]]) - foo3(GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD6:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST6:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD6]] to i32 addrspace(1)* - // CHECK-DAG: call spir_func void @[[GLOB_PTR]](i32 addrspace(1)* noundef [[GLOBDEV_CAST6]]) - foo(GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[GLOBHOST_CAST4]]) - foo2(GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST5:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD5]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[GLOBHOST_CAST5]]) - foo3(GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD6:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST6:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD6]] to i32 addrspace(1)* - // CHECK-DAG: call spir_func void @[[GLOB_PTR]](i32 addrspace(1)* noundef [[GLOBHOST_CAST6]]) - foo(LOC); - // CHECK-DAG: [[LOC_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]] - // CHECK-DAG: call spir_func void [[LOC_PTR]](i32 addrspace(3)* noundef [[LOC_LOAD3]]) - foo2(LOC); - // CHECK-DAG: [[LOC_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]] - // CHECK-DAG: [[LOC_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOC_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[LOC_CAST4]]) - foo(NoAS); - // CHECK-DAG: [[NoAS_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]] - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[NoAS_LOAD3]]) - foo2(NoAS); - // CHECK-DAG: [[NoAS_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]] - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[NoAS_LOAD4]]) - - // Ensure that we still get 5 different template instantiations. - tmpl(GLOB); - // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: call spir_func void [[GLOB_TMPL:@[a-zA-Z0-9_]+]](i32 addrspace(1)* noundef [[GLOB_LOAD4]]) - tmpl(GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: call spir_func void [[GLOBDEV_TMPL:@[a-zA-Z0-9_]+]](i32 addrspace(5)* noundef [[GLOBDEV_LOAD4]]) - tmpl(GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: call spir_func void [[GLOBHOST_TMPL:@[a-zA-Z0-9_]+]](i32 addrspace(6)* noundef [[GLOBHOST_LOAD4]]) - tmpl(LOC); - // CHECK-DAG: [[LOC_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]] - // CHECK-DAG: call spir_func void [[LOC_TMPL:@[a-zA-Z0-9_]+]](i32 addrspace(3)* noundef [[LOC_LOAD5]]) - tmpl(PRIV); - // CHECK-DAG: [[PRIV_LOAD5:%[a-zA-Z0-9]+]] = load i32*, i32* addrspace(4)* [[PRIV]] - // CHECK-DAG: call spir_func void [[PRIV_TMPL:@[a-zA-Z0-9_]+]](i32* noundef [[PRIV_LOAD5]]) - tmpl(NoAS); - // CHECK-DAG: [[NoAS_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]] - // CHECK-DAG: call spir_func void [[GEN_TMPL:@[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef [[NoAS_LOAD5]]) -} - -// CHECK-DAG: define linkonce_odr spir_func void [[GLOB_TMPL]](i32 addrspace(1)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void [[GLOBDEV_TMPL]](i32 addrspace(5)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void [[GLOBHOST_TMPL]](i32 addrspace(6)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void [[LOC_TMPL]](i32 addrspace(3)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void [[PRIV_TMPL]](i32* noundef % -// CHECK-DAG: define linkonce_odr spir_func void [[GEN_TMPL]](i32 addrspace(4)* noundef % - -void usages2() { - __attribute__((opencl_private)) int *PRIV; - // CHECK-DAG: [[PRIV:%[a-zA-Z0-9_]+]] = alloca i32* - __attribute__((opencl_global)) int *GLOB; - // CHECK-DAG: [[GLOB:%[a-zA-Z0-9_]+]] = alloca i32 addrspace(1)* - __attribute__((opencl_global_device)) int *GLOBDEV; - // CHECK-DAG: [[GLOBDEV:%[a-zA-Z0-9_]+]] = alloca i32 addrspace(5)* - __attribute__((opencl_global_host)) int *GLOBHOST; - // CHECK-DAG: [[GLOBHOST:%[a-zA-Z0-9_]+]] = alloca i32 addrspace(6)* - __attribute__((opencl_constant)) int *CONST; - // CHECK-DAG: [[CONST:%[a-zA-Z0-9_]+]] = alloca i32 addrspace(2)* - __attribute__((opencl_local)) int *LOCAL; - // CHECK-DAG: [[LOCAL:%[a-zA-Z0-9_]+]] = alloca i32 addrspace(3)* - - bar(*PRIV); - // CHECK-DAG: [[PRIV_LOAD:%[a-zA-Z0-9]+]] = load i32*, i32* addrspace(4)* [[PRIV]] - // CHECK-DAG: [[PRIV_ASCAST:%[a-zA-Z0-9]+]] = addrspacecast i32* [[PRIV_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[PRIV_ASCAST]]) - bar(*GLOB); - // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]] - // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOB_CAST]]) - bar(*GLOBDEV); - // CHECK-DAG: [[GLOBDEV_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOBDEV]] - // CHECK-DAG: [[GLOBDEV_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEV_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBDEV_CAST]]) - bar(*GLOBHOST); - // CHECK-DAG: [[GLOBHOST_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOBHOST]] - // CHECK-DAG: [[GLOBHOST_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOBHOST_CAST]]) - bar2(*LOCAL); - // CHECK-DAG: [[LOCAL_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOCAL]] - // CHECK-DAG: [[LOCAL_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOCAL_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[LOCAL_CAST]]) -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} -int main() { - kernel_single_task([]() { usages();usages2(); }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_basic-kernel-wrapper.cpp b/clang/test/CodeGenSYCL/no_opaque_basic-kernel-wrapper.cpp deleted file mode 100644 index ac5ee2ba871ab..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_basic-kernel-wrapper.cpp +++ /dev/null @@ -1,63 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that compiler generates correct kernel wrapper for basic -// case. - -#include "Inputs/sycl.hpp" - -template -__attribute__((sycl_kernel)) void kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - sycl::accessor accessorA; - kernel( - [=]() { - accessorA.use(); - }); - return 0; -} - -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_function -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET:%[a-zA-Z0-9_]+]]) -// Check alloca for pointer argument -// CHECK: [[MEM_ARG]].addr = alloca i32 addrspace(1)* -// Check lambda object alloca -// CHECK: [[ANONALLOCA:%[a-zA-Z0-9_]+]] = alloca %class.anon -// Check allocas for ranges -// CHECK: [[ARANGEA:%agg.tmp.*]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[MRANGEA:%agg.tmp.*]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[OIDA:%agg.tmp.*]] = alloca %"struct.sycl::_V1::id" -// CHECK: [[ANON:%[a-zA-Z0-9_.]+]] = addrspacecast %class.anon* [[ANONALLOCA]] to %class.anon addrspace(4)* -// CHECK: [[ARANGET:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::range"* [[ARANGEA]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[MRANGET:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::range"* [[MRANGEA]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[OIDT:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::id"* [[OIDA]] to %"struct.sycl::_V1::id" addrspace(4)* -// -// Check store of kernel pointer argument to alloca -// CHECK: store i32 addrspace(1)* [[MEM_ARG]], i32 addrspace(1)* addrspace(4)* [[MEM_ARG]].addr.ascast, align 8 - -// Check for default constructor of accessor -// CHECK: call spir_func {{.*}}accessor - -// Check accessor GEP -// CHECK: [[ACCESSOR:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[ANON]], i32 0, i32 0 - -// Check load from kernel pointer argument alloca -// CHECK: [[MEM_LOAD:%[a-zA-Z0-9_]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[MEM_ARG]].addr.ascast - -// Check accessor __init method call -// CHECK: [[ARANGE:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[ARANGET]] to %"struct.sycl::_V1::range"* -// CHECK: [[MRANGE:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[MRANGET]] to %"struct.sycl::_V1::range"* -// CHECK: [[OID:%agg.tmp.*]] = addrspacecast %"struct.sycl::_V1::id" addrspace(4)* [[OIDT]] to %"struct.sycl::_V1::id"* -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[ACCESSOR]], -// CHECK-SAME: i32 addrspace(1)* noundef [[MEM_LOAD]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ARANGE]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MRANGE]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OID]]) - -// Check lambda "()" operator call -// CHECK: call spir_func void @{{.*}}(%class.anon addrspace(4)* {{[^,]*}}) diff --git a/clang/test/CodeGenSYCL/no_opaque_check-direct-attribute-propagation.cpp b/clang/test/CodeGenSYCL/no_opaque_check-direct-attribute-propagation.cpp deleted file mode 100644 index 64777e1ba2202..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_check-direct-attribute-propagation.cpp +++ /dev/null @@ -1,370 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -O2 -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -sycl-std=2020 -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s - -// Tests for IR of [[intel::scheduler_target_fmax_mhz()]], [[intel::num_simd_work_items()]], -// [[intel::no_global_work_offset()]], [[intel::max_global_work_dim()]], [[sycl::reqd_sub_group_size()]], -// [[sycl::reqd_work_group_size()]], [[intel::kernel_args_restrict]], [[intel::max_work_group_size()]], -// [[sycl::work_group_size_hint()]] and [[intel::sycl_explicit_simd]] function attributes in SYCL 2020. - -#include "sycl.hpp" - -using namespace sycl; -queue q; - -class Foo { -public: - [[intel::scheduler_target_fmax_mhz(1)]] void operator()() const {} -}; - -template -class Functor { -public: - [[intel::scheduler_target_fmax_mhz(SIZE)]] void operator()() const {} -}; - -[[intel::scheduler_target_fmax_mhz(5)]] void foo() {} - -class Foo1 { -public: - [[intel::num_simd_work_items(1)]] void operator()() const {} -}; - -template -class Functor1 { -public: - [[intel::num_simd_work_items(SIZE)]] void operator()() const {} -}; - -[[intel::num_simd_work_items(5)]] void foo1() {} - -class Foo2 { -public: - [[intel::no_global_work_offset(1)]] void operator()() const {} -}; - -template -class Functor2 { -public: - [[intel::no_global_work_offset(SIZE)]] void operator()() const {} -}; - -[[intel::no_global_work_offset(0)]] void foo2() {} - -class Foo3 { -public: - [[intel::max_global_work_dim(1)]] void operator()() const {} -}; - -template -class Functor3 { -public: - [[intel::max_global_work_dim(SIZE)]] void operator()() const {} -}; - -[[intel::max_global_work_dim(1)]] void foo3() {} - - -class Foo4 { -public: - [[sycl::reqd_sub_group_size(16)]] void operator()() const {} -}; - -[[sycl::reqd_sub_group_size(8)]] void foo4() {} - -class Functor4 { -public: - void operator()() const { - foo4(); - } -}; - -template -class Functor5 { -public: - [[sycl::reqd_sub_group_size(SIZE)]] void operator()() const {} -}; - -class Foo5 { -public: - [[sycl::reqd_work_group_size(32, 16, 16)]] void operator()() const {} -}; - -[[sycl::reqd_work_group_size(8, 1, 1)]] void foo5() {} - -class Functor6 { -public: - void operator()() const { - foo5(); - } -}; - -template -class Functor7 { -public: - [[sycl::reqd_work_group_size(SIZE, SIZE1, SIZE2)]] void operator()() const {} -}; - -class Foo6 { -public: - [[intel::max_work_group_size(32, 16, 16)]] void operator()() const {} -}; - -[[intel::max_work_group_size(8, 1, 1)]] void foo6() {} - -class Functor8 { -public: - void operator()() const { - foo6(); - } -}; - -template -class Functor9 { -public: - [[intel::max_work_group_size(SIZE, SIZE1, SIZE2)]] void operator()() const {} -}; - -class Foo7 { -public: - [[intel::sycl_explicit_simd]] void operator()() const {} -}; - -[[intel::sycl_explicit_simd]] void foo7() {} - -class Foo8 { -public: - [[intel::kernel_args_restrict]] void operator()() const {} -}; - -[[intel::kernel_args_restrict]] void foo8() {} - -class Functor10 { -public: - void operator()() const { - foo8(); - } -}; - -class Foo11 { -public: - [[sycl::work_group_size_hint(1, 2, 3)]] void operator()() const {} -}; - -template -class Functor11 { -public: - [[sycl::work_group_size_hint(SIZE, SIZE1, SIZE2)]] void operator()() const {} -}; - -[[sycl::work_group_size_hint(1, 2, 3)]] void foo11() {} - -int main() { - q.submit([&](handler &h) { - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name1() #0{{.*}} !kernel_arg_buffer_location ![[NUM:[0-9]+]]{{.*}} !scheduler_target_fmax_mhz ![[NUM1:[0-9]+]] - Foo boo; - h.single_task(boo); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name2() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !scheduler_target_fmax_mhz ![[NUM42:[0-9]+]] - h.single_task( - []() [[intel::scheduler_target_fmax_mhz(42)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name3() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !scheduler_target_fmax_mhz ![[NUM2:[0-9]+]] - Functor<2> f; - h.single_task(f); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name4() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !scheduler_target_fmax_mhz - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z3foov() - h.single_task( - []() { foo(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name5() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !num_simd_work_items ![[NUM1]] - Foo1 boo1; - h.single_task(boo1); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name6() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !num_simd_work_items ![[NUM42]] - h.single_task( - []() [[intel::num_simd_work_items(42)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name7() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !num_simd_work_items ![[NUM2]] - Functor1<2> f1; - h.single_task(f1); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name8() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !num_simd_work_items - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo1v() - h.single_task( - []() { foo1(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name9() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !no_global_work_offset ![[NUM:[0-9]+]] - Foo2 boo2; - h.single_task(boo2); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name10() #0{{.*}} {{.*}} ![[NUM0:[0-9]+]] - h.single_task( - []() [[intel::no_global_work_offset(0)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name11() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !no_global_work_offset ![[NUM]] - Functor2<1> f2; - h.single_task(f2); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name12() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !no_global_work_offset - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo2v() - h.single_task( - []() { foo2(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name13() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_global_work_dim ![[NUM1]] - Foo3 boo3; - h.single_task(boo3); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name14() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_global_work_dim ![[NUM1]] - h.single_task( - []() [[intel::max_global_work_dim(1)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name15() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_global_work_dim ![[NUM2]] - Functor3<2> f3; - h.single_task(f3); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name16() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !max_global_work_dim - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo3v() - h.single_task( - []() { foo3(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name17() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !intel_reqd_sub_group_size ![[NUM16:[0-9]+]] - Foo4 boo4; - h.single_task(boo4); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name18() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !intel_reqd_sub_group_size ![[NUM1]] - h.single_task( - []() [[sycl::reqd_sub_group_size(1)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name19() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !intel_reqd_sub_group_size ![[NUM2]] - Functor5<2> f5; - h.single_task(f5); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name20() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !reqd_sub_group_size - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo4v() - Functor4 f4; - h.single_task(f4); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name21() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !reqd_work_group_size ![[NUM32:[0-9]+]] - Foo5 boo5; - h.single_task(boo5); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name22() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !reqd_work_group_size ![[NUM88:[0-9]+]] - h.single_task( - []() [[sycl::reqd_work_group_size(8, 8, 8)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name23() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !reqd_work_group_size ![[NUM22:[0-9]+]] - Functor7<2, 2, 2> f7; - h.single_task(f7); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name24() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !reqd_work_group_size - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo5v() - Functor6 f6; - h.single_task(f6); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name25() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_work_group_size ![[NUM32]] - Foo6 boo6; - h.single_task(boo6); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name26() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_work_group_size ![[NUM88]] - h.single_task( - []() [[intel::max_work_group_size(8, 8, 8)]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name27() #0{{.*}} !kernel_arg_buffer_location ![[NUM]]{{.*}} !max_work_group_size ![[NUM22]] - Functor9<2, 2, 2> f9; - h.single_task(f9); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name28() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !max_work_group_size - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo6v() - Functor8 f8; - h.single_task(f8); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name29() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK-NOT: !sycl_explicit_simd - // CHECK-SAME: { - // CHECK: define {{.*}}spir_func void @{{.*}}foo7{{.*}} !sycl_explicit_simd ![[NUM]] - h.single_task( - []() { foo7(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name30() #0{{.*}} !intel_reqd_sub_group_size ![[NUM1]]{{.*}} !sycl_explicit_simd ![[NUM]] - Foo7 boo7; - h.single_task(boo7); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name31() #0{{.*}} !intel_reqd_sub_group_size ![[NUM1]]{{.*}} !sycl_explicit_simd ![[NUM]] - h.single_task( - []() [[intel::sycl_explicit_simd]]{}); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name32() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK: define {{.*}}spir_func void @{{.*}}Functor10{{.*}}(%class.Functor10 addrspace(4)* noundef align 1 dereferenceable_or_null(1) %this) #3 comdat align 2 - // CHECK-NOT: noalias - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z4foo8v() - Functor10 f10; - h.single_task(f10); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name33() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK: define {{.*}}spir_func void @{{.*}}Foo8{{.*}}(%class.Foo8 addrspace(4)* noalias noundef align 1 dereferenceable_or_null(1) %this) #3 comdat align 2 - Foo8 boo8; - h.single_task(boo8); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name34() #0{{.*}} !kernel_arg_buffer_location ![[NUM]] - // CHECK: define {{.*}}spir_func void @{{.*}}(%class.anon{{.*}} addrspace(4)* noalias noundef align 1 dereferenceable_or_null(1) %this) #4 align 2 - h.single_task( - []() [[intel::kernel_args_restrict]]{}); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name35() #0 {{.*}} !work_group_size_hint ![[NUM123:[0-9]+]] - Foo11 boo11; - h.single_task(boo11); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name36() #0 {{.*}} !work_group_size_hint ![[NUM123]] - Functor11<1, 2, 3> f11; - h.single_task(f11); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name37() #0 {{.*}} !work_group_size_hint ![[NUM123]] - h.single_task( - []() [[sycl::work_group_size_hint(1, 2, 3)]]{}); - - // Test attribute is not propagated. - // CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name38() - // CHECK-NOT: !work_group_size_hint - // CHECK-SAME: { - // CHECK: define dso_local spir_func void @_Z5foo11v() - h.single_task( - []() { foo11(); }); - - }); - return 0; -} - -// CHECK: ![[NUM]] = !{} -// CHECK: ![[NUM1]] = !{i32 1} -// CHECK: ![[NUM42]] = !{i32 42} -// CHECK: ![[NUM2]] = !{i32 2} -// CHECK-NOT: ![[NUM0]] = !{i32 0} -// CHECK: ![[NUM16]] = !{i32 16} -// CHECK: ![[NUM32]] = !{i32 16, i32 16, i32 32} -// CHECK: ![[NUM88]] = !{i32 8, i32 8, i32 8} -// CHECK: ![[NUM22]] = !{i32 2, i32 2, i32 2} -// CHECK: ![[NUM123]] = !{i32 3, i32 2, i32 1} diff --git a/clang/test/CodeGenSYCL/no_opaque_const-wg-init.cpp b/clang/test/CodeGenSYCL/no_opaque_const-wg-init.cpp deleted file mode 100644 index 8ff1a9a01e9bc..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_const-wg-init.cpp +++ /dev/null @@ -1,20 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -#include "Inputs/sycl.hpp" - -template -__attribute__((sycl_kernel)) void -kernel_parallel_for_work_group(const KernelType &KernelFunc) { - sycl::group<1> G; - KernelFunc(G); -} - -int main() { - - kernel_parallel_for_work_group([=](sycl::group<1> G) { - const int WG_CONST = 10; - }); -// CHECK: store i32 10, i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @{{.*}}WG_CONST{{.*}} to i32 addrspace(4)*) - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_device-functions.cpp b/clang/test/CodeGenSYCL/no_opaque_device-functions.cpp deleted file mode 100644 index 2ef3295daecd7..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_device-functions.cpp +++ /dev/null @@ -1,27 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -template -T bar(T arg); - -void foo() { - int a = 1 + 1 + bar(1); -} - -template -T bar(T arg) { - return arg; -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { foo(); }); - return 0; -} -// CHECK: define {{.*}}spir_kernel void @_ZTSZ4mainE11fake_kernel() -// CHECK: define internal spir_func void @_ZZ4mainENKUlvE_clEv(%class.anon addrspace(4)* {{[^,]*}} %this) -// CHECK: define {{.*}}spir_func void @_Z3foov() -// CHECK: define linkonce_odr spir_func noundef i32 @_Z3barIiET_S0_(i32 noundef %arg) diff --git a/clang/test/CodeGenSYCL/no_opaque_device-variables.cpp b/clang/test/CodeGenSYCL/no_opaque_device-variables.cpp deleted file mode 100644 index f6d5fad56cf52..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_device-variables.cpp +++ /dev/null @@ -1,44 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -enum class test_type { value1, value2, value3 }; - -constexpr test_type global_value = test_type::value1; -static constexpr int my_array[1] = {42}; - -// CHECK: @{{.*}}global_value = internal addrspace(1) constant i32 0 -// CHECK: @{{.*}}my_array = internal addrspace(1) constant [1 x i32] [i32 42] - -void foo(const test_type &) {} - -template -__attribute__((sycl_kernel)) void kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - constexpr test_type local_value = test_type::value2; - const int some_const = 1; - int some_local_var = 10; - - kernel([=]() { - // Global variables used directly - foo(global_value); - // CHECK: call spir_func void @{{.*}}foo{{.*}}(i32 addrspace(4)* noundef align 4 dereferenceable(4) addrspacecast (i32 addrspace(1)* @{{.*}}global_value to i32 addrspace(4)*)) - int a = my_array[0]; - // CHECK: [[LOAD:%[0-9]+]] = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @{{.*}}my_array to [1 x i32] addrspace(4)*), i64 0, i64 0) - // CHECK: store i32 [[LOAD]], i32 addrspace(4)* %a - int b = some_const; - // Constant used directly - // CHECK: store i32 1, i32 addrspace(4)* %b - foo(local_value); - // Local variables and constexprs captured by lambda - // CHECK: [[GEP:%[a-z_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %{{.*}}, i32 0, i32 0 - // CHECK: call spir_func void @{{.*}}foo{{.*}}(i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GEP]]) - int some_device_local_var = some_local_var; - // CHECK: [[GEP1:%[a-z_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* %{{.*}}, i32 0, i32 1 - // CHECK: [[LOAD1:%[0-9]+]] = load i32, i32 addrspace(4)* [[GEP1]] - // CHECK: store i32 [[LOAD1]], i32 addrspace(4)* %some_device_local_var - }); - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_device_global.cpp b/clang/test/CodeGenSYCL/no_opaque_device_global.cpp deleted file mode 100644 index 65b7644507f6f..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_device_global.cpp +++ /dev/null @@ -1,103 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -fsycl-unique-prefix=THE_PREFIX -std=c++17 -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -#include "sycl.hpp" - -// Test cases below show that 'sycl-unique-id' LLVM IR attribute is attached to the -// global variable whose type is decorated with device_global attribute, and that a -// unique string is generated. - -using namespace sycl::ext::oneapi; -using namespace sycl; -queue q; - -device_global A; -static device_global B; - -struct Foo { - static device_global C; -}; -device_global Foo::C; -// CHECK: @A = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[A_ATTRS:[0-9]+]] -// CHECK: @_ZL1B = internal addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[B_ATTRS:[0-9]+]] -// CHECK: @_ZN3Foo1CE = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[C_ATTRS:[0-9]+]] - -device_global same_name; -namespace NS { -device_global same_name; -} -// CHECK: @same_name = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[SAME_NAME_ATTRS:[0-9]+]] -// CHECK: @_ZN2NS9same_nameE = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[SAME_NAME_NS_ATTRS:[0-9]+]] - -// decorated with only global_variable_allowed attribute -template -class [[__sycl_detail__::global_variable_allowed]] only_global_var_allowed { -public: - const T &get() const noexcept { return *Data; } - only_global_var_allowed() {} - operator T &() noexcept { return *Data; } - -private: - T *Data; -}; - -// check that we don't generate `sycl-unique-id` IR attribute if class does not use -// [[__sycl_detail__::device_global]] -only_global_var_allowed no_device_global; -// CHECK: @no_device_global = addrspace(1) global %class.only_global_var_allowed zeroinitializer, align 8{{$}} - -inline namespace Bar { -device_global InlineNS; -} -// CHECK: @_ZN3Bar8InlineNSE = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global.0" zeroinitializer, align 8 #[[BAR_INLINENS_ATTRS:[0-9]+]] - -template struct TS { -public: - static device_global d; -}; -template <> device_global TS::d{}; -// CHECK: @_ZN2TSIiE1dE = addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[TEMPLATED_WRAPPER_ATTRS:[0-9]+]] - -template -device_global templ_dev_global; -// CHECK: @[[TEMPL_DEV_GLOB:[a-zA-Z0-9_]+]] = linkonce_odr addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, comdat, align 8 #[[TEMPL_DEV_GLOB_ATTRS:[0-9]+]] - -void foo() { - q.submit([&](handler &h) { - h.single_task([=]() { - (void)A; - (void)B; - (void)Foo::C; - (void)same_name; - (void)NS::same_name; - (void)no_device_global; - (void)Bar::InlineNS; - auto AA = TS::d.get(); - auto val = templ_dev_global.get(); - }); - }); -} - -namespace { -device_global same_name; -} -// CHECK: @_ZN12_GLOBAL__N_19same_nameE = internal addrspace(1) global %"class.sycl::_V1::ext::oneapi::device_global" zeroinitializer, align 8 #[[SAME_NAME_ANON_NS_ATTRS:[0-9]+]] - -namespace { -void bar() { - q.submit([&](handler &h) { - h.single_task([=]() { int A = same_name; }); - }); -} -} // namespace - -// CHECK: @llvm.global_ctors = appending global [2 x { i32, void ()*, i8 addrspace(4)* }] [{ i32, void ()*, i8 addrspace(4)* } { i32 65535, void ()* @__cxx_global_var_init{{.*}}, i8 addrspace(4)* addrspacecast (i8 addrspace(1)* bitcast (%"class.sycl::_V1::ext::oneapi::device_global" addrspace(1)* @[[TEMPL_DEV_GLOB]] to i8 addrspace(1)*) to i8 addrspace(4)*) }, { i32, void ()*, i8 addrspace(4)* } { i32 65535, void ()* @_GLOBAL__sub_I_no_opaque_device_global.cpp, i8 addrspace(4)* null }] -// CHECK: @llvm.used = appending global [1 x i8 addrspace(4)*] [i8 addrspace(4)* addrspacecast (i8 addrspace(1)* bitcast (%"class.sycl::_V1::ext::oneapi::device_global" addrspace(1)* @[[TEMPL_DEV_GLOB]] to i8 addrspace(1)*) to i8 addrspace(4)*)], section "llvm.metadata" - -// CHECK: attributes #[[A_ATTRS]] = { "sycl-unique-id"="_Z1A" } -// CHECK: attributes #[[B_ATTRS]] = { "sycl-unique-id"="THE_PREFIX____ZL1B" } -// CHECK: attributes #[[C_ATTRS]] = { "sycl-unique-id"="_ZN3Foo1CE" } -// CHECK: attributes #[[SAME_NAME_ATTRS]] = { "sycl-unique-id"="_Z9same_name" } -// CHECK: attributes #[[SAME_NAME_NS_ATTRS]] = { "sycl-unique-id"="_ZN2NS9same_nameE" } -// CHECK: attributes #[[BAR_INLINENS_ATTRS]] = { "sycl-unique-id"="_ZN3Bar8InlineNSE" } -// CHECK: attributes #[[TEMPLATED_WRAPPER_ATTRS]] = { "sycl-unique-id"="_ZN2TSIiE1dE" } -// CHECK: attributes #[[TEMPL_DEV_GLOB_ATTRS]] = { "sycl-unique-id"="_Z16templ_dev_globalIiE" } -// CHECK: attributes #[[SAME_NAME_ANON_NS_ATTRS]] = { "sycl-unique-id"="THE_PREFIX____ZN12_GLOBAL__N_19same_nameE" } diff --git a/clang/test/CodeGenSYCL/no_opaque_esimd-accessor-ptr-md.cpp b/clang/test/CodeGenSYCL/no_opaque_esimd-accessor-ptr-md.cpp deleted file mode 100644 index 00b8efde4be55..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_esimd-accessor-ptr-md.cpp +++ /dev/null @@ -1,36 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device \ -// RUN: -internal-isystem %S/Inputs -triple spir64-unknown-unknown \ -// RUN: -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks -// 1) Proper 'kernel_arg_accessor_ptr' metadata is generated by the FE for -// ESIMD kernels. -// 2) __init_esimd function is used to initialize the accessor rather than -// __init. - -#include "sycl.hpp" - -using namespace sycl; - -void test(int val) { - queue q; - q.submit([&](handler &h) { - sycl::accessor accessorA; - sycl::accessor accessorB; - - h.single_task( - [=]() __attribute__((sycl_explicit_simd)) { - accessorA.use(val); - accessorB.use(); - }); - }); - - // --- Name - // CHECK-LABEL: define {{.*}}spir_kernel void @_ZTSZZ4testiENKUlRN4sycl3_V17handlerEE_clES2_E12esimd_kernel( - // --- Attributes - // CHECK: {{.*}} !kernel_arg_accessor_ptr ![[ACC_PTR_ATTR:[0-9]+]] !sycl_explicit_simd !{{[0-9]+}} {{.*}}{ - // --- init_esimd call is expected instead of __init: - // CHECK: call spir_func void @{{.*}}__init_esimd{{.*}}(%"{{.*}}sycl::_V1::accessor" addrspace(4)* {{[^,]*}} %{{[a-zA-Z0-9_]+}}, i32 addrspace(1)* noundef %{{[0-9]+}}) - // CHECK-LABEL: } - // CHECK: ![[ACC_PTR_ATTR]] = !{i1 true, i1 false, i1 true} -} diff --git a/clang/test/CodeGenSYCL/no_opaque_esimd-private-global.cpp b/clang/test/CodeGenSYCL/no_opaque_esimd-private-global.cpp deleted file mode 100644 index df2082c09d609..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_esimd-private-global.cpp +++ /dev/null @@ -1,20 +0,0 @@ -// RUN: %clang_cc1 -disable-llvm-passes -triple spir64-unknown-unknown \ -// RUN: -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that FE generates appropriate attributes for ESIMD private globals with register_num attribute. - -__attribute__((opencl_private)) __attribute__((sycl_explicit_simd)) __attribute__((register_num(17))) int vc; -// CHECK: @vc = {{.+}} i32 0, align 4 #[[ATTR:[0-9]+]] - -template -__attribute__((sycl_kernel)) void kernel(Func kernelFunc) { - kernelFunc(); -} - -void init_vc(int x) { - kernel([=]() __attribute__((sycl_explicit_simd)) { - vc = x; - // CHECK: store i32 %{{[0-9a-zA-Z_]+}}, i32* @vc - }); -} -// CHECK: attributes #[[ATTR]] = { "genx_byte_offset"="17" "genx_volatile" } diff --git a/clang/test/CodeGenSYCL/no_opaque_fpga_pipes.cpp b/clang/test/CodeGenSYCL/no_opaque_fpga_pipes.cpp deleted file mode 100644 index c402c3b62e537..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_fpga_pipes.cpp +++ /dev/null @@ -1,68 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device %s -no-opaque-pointers -emit-llvm -triple spir64-unknown-unknown -disable-llvm-passes -o - | FileCheck %s -// CHECK: %opencl.pipe_wo_t -// CHECK: %opencl.pipe_ro_t - -using WPipeTy = __attribute__((pipe("write_only"))) const int; -SYCL_EXTERNAL WPipeTy WPipeCreator(); - -using RPipeTy = __attribute__((pipe("read_only"))) const int; -SYCL_EXTERNAL RPipeTy RPipeCreator(); - -template -void foo(PipeTy Pipe) {} - -struct PipeStorageTy { - int Size; -}; - -// CHECK: @{{.*}}Storage = {{.*}} !io_pipe_id ![[ID0:[0-9]+]] -constexpr PipeStorageTy - Storage __attribute__((io_pipe_id(1))) = {1}; - -// CHECK: @{{.*}}TempStorage{{.*}} = {{.*}} !io_pipe_id ![[ID1:[0-9]+]] -template -constexpr PipeStorageTy - TempStorage __attribute__((io_pipe_id(N))) = {2}; - -SYCL_EXTERNAL void boo(PipeStorageTy PipeStorage); - -template -struct ethernet_pipe { - static constexpr int id = ID; -}; - -// CHECK: @{{.*}}PipeStorage{{.*}} = {{.*}} !io_pipe_id ![[ID2:[0-9]+]] -template -class pipe { -public: - static void read() { - boo(PipeStorage); - } - -private: - static constexpr PipeStorageTy - PipeStorage __attribute__((io_pipe_id(name::id))) = {3}; -}; - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - // CHECK: alloca %opencl.pipe_wo_t - WPipeTy wpipe = WPipeCreator(); - // CHECK: alloca %opencl.pipe_ro_t - RPipeTy rpipe = RPipeCreator(); - foo(wpipe); - foo(rpipe); - boo(Storage); - boo(TempStorage<2>); - pipe>::read(); - }); - return 0; -} -// CHECK: ![[ID0]] = !{i32 1} -// CHECK: ![[ID1]] = !{i32 2} -// CHECK: ![[ID2]] = !{i32 42} diff --git a/clang/test/CodeGenSYCL/no_opaque_image_accessor.cpp b/clang/test/CodeGenSYCL/no_opaque_image_accessor.cpp deleted file mode 100644 index b181703395863..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_image_accessor.cpp +++ /dev/null @@ -1,111 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o %t.ll -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-1DRO -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-2DRO -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-3DRO -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-1DWO -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-2DWO -// RUN: FileCheck < %t.ll --enable-var-scope %s --check-prefix=CHECK-3DWO -// -// CHECK-1DRO: %opencl.image1d_ro_t = type opaque -// CHECK-1DRO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image1d_ro_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-1DRO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image1d_ro_t addrspace(1)* %{{[0-9]+}}) -// -// CHECK-2DRO: %opencl.image2d_ro_t = type opaque -// CHECK-2DRO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image2d_ro_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-2DRO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image2d_ro_t addrspace(1)* %{{[0-9]+}}) -// -// CHECK-3DRO: %opencl.image3d_ro_t = type opaque -// CHECK-3DRO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image3d_ro_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-3DRO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image3d_ro_t addrspace(1)* %{{[0-9]+}}) -// -// CHECK-1DWO: %opencl.image1d_wo_t = type opaque -// CHECK-1DWO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image1d_wo_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-1DWO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image1d_wo_t addrspace(1)* %{{[0-9]+}}) -// -// CHECK-2DWO: %opencl.image2d_wo_t = type opaque -// CHECK-2DWO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image2d_wo_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-2DWO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image2d_wo_t addrspace(1)* %{{[0-9]+}}) -// -// CHECK-3DWO: %opencl.image3d_wo_t = type opaque -// CHECK-3DWO: define {{.*}}spir_kernel void @{{.*}}(%opencl.image3d_wo_t addrspace(1)* [[IMAGE_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-3DWO: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::accessor{{.*}} %{{[a-zA-Z]+}}, %opencl.image3d_wo_t addrspace(1)* %{{[0-9]+}}) -// -// TODO: Add tests for the image_array opencl datatype support. -#include "Inputs/sycl.hpp" - -int main() { - - { - sycl::image<1> MyImage1d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<1>(3)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage1d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - { - sycl::image<2> MyImage2d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<2>(3, 2)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage2d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - { - sycl::image<3> MyImage3d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<3>(3, 2, 4)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage3d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - { - sycl::image<1> MyImage1d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<1>(3)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage1d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - { - sycl::image<2> MyImage2d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<2>(3, 2)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage2d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - { - sycl::image<3> MyImage3d(sycl::image_channel_order::rgbx, sycl::image_channel_type::unorm_short_565, sycl::range<3>(3, 2, 4)); - sycl::queue Q; - Q.submit([&](sycl::handler &cgh) { - auto Acc = MyImage3d.get_access(cgh); - - cgh.single_task([=]() { - Acc.use(); - }); - }); - } - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_inheritance.cpp b/clang/test/CodeGenSYCL/no_opaque_inheritance.cpp deleted file mode 100644 index 1f8bcb83d3de3..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_inheritance.cpp +++ /dev/null @@ -1,84 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -#include "Inputs/sycl.hpp" - -class second_base { -public: - int *e; -}; - -class InnerFieldBase { -public: - int d; -}; -class InnerField : public InnerFieldBase { - int c; -}; - -struct base { -public: - int b; - InnerField obj; -}; - -struct derived : base, second_base { - int a; - - void operator()() const { - } -}; - -int main() { - sycl::queue q; - - q.submit([&](sycl::handler &cgh) { - derived f{}; - cgh.single_task(f); - }); - - return 0; -} - -// CHECK: %struct.base = type { i32, %class.InnerField } -// CHECK: %class.InnerField = type { %class.InnerFieldBase, i32 } -// CHECK: %class.InnerFieldBase = type { i32 } -// CHECK: %class.__generated_second_base = type { i32 addrspace(1)* } -// CHECK: %struct.derived = type <{ %struct.base, [4 x i8], %class.second_base, i32, [4 x i8] }> -// CHECK: %class.second_base = type { i32 addrspace(4)* } - -// Check kernel paramters -// CHECK: define {{.*}}spir_kernel void @{{.*}}derived -// CHECK-SAME: %struct.base* noundef byval(%struct.base) align 4 %_arg__base -// CHECK-SAME: %class.__generated_second_base* noundef byval(%class.__generated_second_base) align 8 %_arg__base1 -// CHECK-SAME: i32 noundef %_arg_a - -// Check allocas for kernel parameters and local functor object -// CHECK: %[[ARG_A_ALLOCA:[a-zA-Z0-9_.]+]] = alloca i32, align 4 -// CHECK: %[[LOCAL_OBJECT_ALLOCA:[a-zA-Z0-9_.]+]] = alloca %struct.derived, align 8 -// CHECK: %[[ARG_A:[a-zA-Z0-9_.]+]] = addrspacecast i32* %[[ARG_A_ALLOCA]] to i32 addrspace(4)* -// CHECK: %[[LOCAL_OBJECT:[a-zA-Z0-9_.]+]] = addrspacecast %struct.derived* %[[LOCAL_OBJECT_ALLOCA]] to %struct.derived addrspace(4)* -// CHECK: %[[ARG_BASE:[a-zA-Z0-9_.]+]] = addrspacecast %struct.base* %_arg__base to %struct.base addrspace(4)* -// CHECK: %[[ARG_BASE1:[a-zA-Z0-9_.]+]] = addrspacecast %class.__generated_second_base* %_arg__base1 to %class.__generated_second_base addrspace(4)* -// CHECK: store i32 %_arg_a, i32 addrspace(4)* %[[ARG_A]], align 4 - -// Initialize 'base' subobject -// CHECK: %[[DERIVED_TO_BASE:.*]] = bitcast %struct.derived addrspace(4)* %[[LOCAL_OBJECT]] to %struct.base addrspace(4)* -// CHECK: %[[BASE_TO_PTR:.*]] = bitcast %struct.base addrspace(4)* %[[DERIVED_TO_BASE]] to i8 addrspace(4)* -// CHECK: %[[PARAM_TO_PTR:.*]] = bitcast %struct.base addrspace(4)* %[[ARG_BASE]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 8 %[[BASE_TO_PTR]], i8 addrspace(4)* align 4 %[[PARAM_TO_PTR]], i64 12, i1 false) - -// Initialize 'second_base' subobject -// First, derived-to-base cast with offset: -// CHECK: %[[DERIVED_PTR:.*]] = bitcast %struct.derived addrspace(4)* %[[LOCAL_OBJECT]] to i8 addrspace(4)* -// CHECK: %[[OFFSET_CALC:.*]] = getelementptr inbounds i8, i8 addrspace(4)* %[[DERIVED_PTR]], i64 16 -// CHECK: %[[TO_SECOND_BASE:.*]] = bitcast i8 addrspace(4)* %[[OFFSET_CALC]] to %class.second_base addrspace(4)* -// CHECK: %[[GEN_TO_SECOND_BASE:.*]] = bitcast %class.__generated_second_base addrspace(4)* %[[ARG_BASE1]] to %class.second_base addrspace(4)* -// CHECK: %[[TO:.*]] = bitcast %class.second_base addrspace(4)* %[[TO_SECOND_BASE]] to i8 addrspace(4)* -// CHECK: %[[FROM:.*]] = bitcast %class.second_base addrspace(4)* %[[GEN_TO_SECOND_BASE]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 8 %[[TO]], i8 addrspace(4)* align 8 %[[FROM]], i64 8, i1 false) - - -// Initialize field 'a' -// CHECK: %[[GEP_A:[a-zA-Z0-9]+]] = getelementptr inbounds %struct.derived, %struct.derived addrspace(4)* %[[LOCAL_OBJECT]], i32 0, i32 3 -// CHECK: %[[LOAD_A:[0-9]+]] = load i32, i32 addrspace(4)* %[[ARG_A]], align 4 -// CHECK: store i32 %[[LOAD_A]], i32 addrspace(4)* %[[GEP_A]] diff --git a/clang/test/CodeGenSYCL/no_opaque_inline_asm.cpp b/clang/test/CodeGenSYCL/no_opaque_inline_asm.cpp deleted file mode 100644 index 4b7c70306bf95..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_inline_asm.cpp +++ /dev/null @@ -1,34 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -no-opaque-pointers -emit-llvm -x c++ %s -o - | FileCheck %s - -class kernel; - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [100 x i32], align 4 - // CHECK: %[[I:[0-9a-z]+]] = alloca i32, align 4 - // CHECK: %[[ARRAY_A]].ascast = addrspacecast [100 x i32]* %[[ARRAY_A]] to [100 x i32] addrspace(4)* - // CHECK: %[[I]].ascast = addrspacecast i32* %[[I]] to i32 addrspace(4)* - // CHECK: store i32 0, i32 addrspace(4)* %[[I]].ascast, align 4 - // CHECK: %0 = load i32, i32 addrspace(4)* %[[I]].ascast, align 4 - // CHECK: %[[IDXPROM:[0-9a-z]+]] = sext i32 %0 to i64 - // CHECK: %[[IDX:.*]] = getelementptr inbounds [100 x i32], [100 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %[[IDXPROM]] - int a[100], i = 0; - // CHECK-NEXT: call void asm sideeffect - // CHECK: ".decl V52 v_type=G type=d num_elts=16 align=GRF - // CHECK: svm_gather.4.1 (M1, 16) $0.0 V52.0 - // CHECK: add(M1, 16) V52(0, 0)<1> V52(0, 0)<1; 1, 0> 0x1 - // CHECK: svm_scatter.4.1 (M1, 16) $0.0 V52.0", - // CHECK: "rw"(i32 addrspace(4)* %[[IDX]]) - // TODO: nonnull attribute missing? - asm volatile(".decl V52 v_type=G type=d num_elts=16 align=GRF\n" - "svm_gather.4.1 (M1, 16) %0.0 V52.0\n" - "add(M1, 16) V52(0, 0)<1> V52(0, 0)<1; 1, 0> 0x1\n" - "svm_scatter.4.1 (M1, 16) %0.0 V52.0" - : - : "rw"(&a[i])); -} - -int main() { - kernel_single_task([]() {}); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-array.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-array.cpp deleted file mode 100644 index c8fda312c76c7..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-array.cpp +++ /dev/null @@ -1,295 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Array-specific ivdep - annotate the correspondent GEPs only -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_array_no_safelenv() -void ivdep_array_no_safelen() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(a)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_ARR:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}{{[[:space:]]}} - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_ARR:[0-9]+]] - } -} - -// Array-specific ivdep w/ safelen - annotate the correspondent GEPs only -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_array_with_safelenv() -void ivdep_array_with_safelen() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(a, 5)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_ARR_SAFELEN:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}{{[[:space:]]}} - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_ARR_SAFELEN:[0-9]+]] - } -} - -// Multiple array-specific ivdeps - annotate the correspondent GEPs -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_multiple_arraysv() -void ivdep_multiple_arrays() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - // CHECK: %[[ARRAY_C:[0-9a-z]+]] = alloca [10 x i32] - int c[10]; - // CHECK: %[[ARRAY_D:[0-9a-z]+]] = alloca [10 x i32] - int d[10]; - [[intel::ivdep(a, 5)]] - [[intel::ivdep(b, 5)]] - [[intel::ivdep(c)]] - [[intel::ivdep(d)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_MUL_ARR:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_MUL_ARR:[0-9]+]] - b[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_C]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_C_MUL_ARR:[0-9]+]] - c[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_D]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_D_MUL_ARR:[0-9]+]] - d[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_MUL_ARR:[0-9]+]] - } -} - -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_multiple_arrays_templateIiEvv() -template -void ivdep_multiple_arrays_template() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - T a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - T b[10]; - // CHECK: %[[ARRAY_C:[0-9a-z]+]] = alloca [10 x i32] - T c[10]; - // CHECK: %[[ARRAY_D:[0-9a-z]+]] = alloca [10 x i32] - T d[10]; - [[intel::ivdep(a, 5)]] - [[intel::ivdep(b, 5)]] - [[intel::ivdep(c)]] - [[intel::ivdep(d)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_MUL_ARR:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_MUL_ARR:[0-9]+]] - b[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_C]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_C_MUL_ARR:[0-9]+]] - c[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_D]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_D_MUL_ARR:[0-9]+]] - d[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_MUL_ARR:[0-9]+]] - } -} - -// Global ivdep with INF safelen & array-specific ivdep with the same safelen -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_array_and_globalv() -void ivdep_array_and_global() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep]] - [[intel::ivdep(a)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_ARR_AND_GLOB:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_ARR_AND_GLOB:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_ARR_AND_GLOB:[0-9]+]] - } -} - -// Global ivdep with INF safelen & array-specific ivdep with lesser safelen -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_array_and_inf_globalv() -void ivdep_array_and_inf_global() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep]] - [[intel::ivdep(a, 8)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_ARR_AND_INF_GLOB:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_ARR_AND_INF_GLOB:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_ARR_AND_INF_GLOB:[0-9]+]] - } -} - -// Global ivdep with specified safelen & array-specific ivdep with lesser safelen -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_array_and_greater_globalv() -void ivdep_array_and_greater_global() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(9)]] - [[intel::ivdep(a, 8)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_ARR_AND_GREAT_GLOB:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_ARR_AND_GREAT_GLOB:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_ARR_AND_GREAT_GLOB:[0-9]+]] - } -} - -// Global safelen, array-specific safelens -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_mul_arrays_and_globalv() -void ivdep_mul_arrays_and_global() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - // CHECK: %[[ARRAY_C:[0-9a-z]+]] = alloca [10 x i32] - int c[10]; - [[intel::ivdep(5)]] - [[intel::ivdep(b, 6)]] - [[intel::ivdep(c)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_MUL_ARR_AND_GLOB:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_MUL_ARR_AND_GLOB:[0-9]+]] - b[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_C]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_C_MUL_ARR_AND_GLOB:[0-9]+]] - c[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_MUL_ARR_AND_GLOB:[0-9]+]] - } -} - -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_ptrv() -void ivdep_ptr() { - int *ptr; - // CHECK: %[[PTR:[0-9a-z]+]] = alloca i32 addrspace(4)* - [[intel::ivdep(ptr, 5)]] for (int i = 0; i != 10; ++i) - ptr[i] = 0; - // CHECK: %[[PTR_LOAD:[0-9a-z]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %[[PTR]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds i32, i32 addrspace(4)* %[[PTR_LOAD]], i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_PTR:[0-9]+]] - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_PTR:[0-9]+]] -} - -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_structv() -void ivdep_struct() { - struct S { - int *ptr; - int arr[10]; - } s; - // CHECK: %[[STRUCT:[0-9a-z]+]] = alloca %struct.S - [[intel::ivdep(s.arr, 5)]] for (int i = 0; i != 10; ++i) - s.arr[i] = 0; - // CHECK: %[[STRUCT_ARR:[0-9a-z]+]] = getelementptr inbounds %struct.S, %struct.S addrspace(4)* %[[STRUCT]].ascast, i32 0, i32 1 - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[STRUCT_ARR]], i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_STRUCT_ARR:[0-9]+]] - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_STRUCT_ARR:[0-9]+]] - - [[intel::ivdep(s.ptr, 5)]] for (int i = 0; i != 10; ++i) - s.ptr[i] = 0; - // CHECK: %[[STRUCT_PTR:[0-9a-z]+]] = getelementptr inbounds %struct.S, %struct.S addrspace(4)* %[[STRUCT]].ascast, i32 0, i32 0 - // CHECK: %[[LOAD_STRUCT_PTR:[0-9a-z]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %[[STRUCT_PTR]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds i32, i32 addrspace(4)* %[[LOAD_STRUCT_PTR]], i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_STRUCT_PTR:[0-9]+]] - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_STRUCT_PTR:[0-9]+]] -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - ivdep_array_no_safelen(); - ivdep_array_with_safelen(); - ivdep_multiple_arrays(); - ivdep_multiple_arrays_template(); - ivdep_array_and_global(); - ivdep_array_and_inf_global(); - ivdep_array_and_greater_global(); - ivdep_mul_arrays_and_global(); - ivdep_ptr(); - ivdep_struct(); - }); - return 0; -} - -/// A particular array with no safelen specified -// -// CHECK-DAG: ![[IDX_GROUP_ARR]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_ARR]] = distinct !{![[MD_LOOP_ARR]], ![[MP:[0-9]+]], ![[IVDEP_ARR:[0-9]+]]} -// CHECK-DAG: ![[MP]] = !{!"llvm.loop.mustprogress"} -// CHECK-DAG: ![[IVDEP_ARR]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_ARR]]} - -/// A particular array with safelen specified -// -// CHECK: ![[IDX_GROUP_ARR_SAFELEN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_ARR_SAFELEN]] = distinct !{![[MD_LOOP_ARR_SAFELEN]], ![[MP]], ![[IVDEP_ARR_SAFELEN:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_ARR_SAFELEN]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_ARR_SAFELEN]], i32 5} - -/// Multiple arrays. -/// Index groups for arrays with matching safelens should be put into the same parallel_access_indices MD node -// -// CHECK-DAG: ![[IDX_GROUP_A_MUL_ARR]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_MUL_ARR]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_C_MUL_ARR]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_D_MUL_ARR]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_MUL_ARR]] = distinct !{![[MD_LOOP_MUL_ARR]], ![[MP]], ![[IVDEP_MUL_ARR_VAL:[0-9]+]], ![[IVDEP_MUL_ARR_INF:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_MUL_ARR_VAL]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_MUL_ARR]], ![[IDX_GROUP_B_MUL_ARR]], i32 5} -// CHECK-DAG: ![[IVDEP_MUL_ARR_INF]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_C_MUL_ARR]], ![[IDX_GROUP_D_MUL_ARR]]} - -// Find the single instance of a legacy "IVDep enable" MD node. -// CHECK-DAG: ![[IVDEP_LEGACY_ENABLE:[0-9]+]] = !{!"llvm.loop.ivdep.enable"} - -/// Global INF safelen and specific array INF safelen -/// The array-specific ivdep can be ignored, so it's the same as just global ivdep with safelen INF -// -// CHECK-DAG: ![[IDX_GROUP_A_ARR_AND_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_ARR_AND_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_ARR_AND_GLOB]] = distinct !{![[MD_LOOP_ARR_AND_GLOB]], ![[MP]], ![[IVDEP_ARR_AND_GLOB:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_ARR_AND_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_ARR_AND_GLOB]], ![[IDX_GROUP_B_ARR_AND_GLOB]]} - -/// Global INF safelen and specific array non-INF safelen -/// The array-specific ivdep must be ignored, so it's the same as just global ivdep with safelen INF -// -// CHECK-DAG: ![[IDX_GROUP_A_ARR_AND_INF_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_ARR_AND_INF_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_ARR_AND_INF_GLOB]] = distinct !{![[MD_LOOP_ARR_AND_INF_GLOB]], ![[MP]], ![[IVDEP_ARR_AND_INF_GLOB:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_ARR_AND_INF_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_ARR_AND_INF_GLOB]], ![[IDX_GROUP_B_ARR_AND_INF_GLOB]]} - -/// Global safelen and specific array with lesser safelen -/// The array-specific ivdep must be gnored, so it's the same as just global ivdep with its safelen -// -// CHECK-DAG: ![[IDX_GROUP_A_ARR_AND_GREAT_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_ARR_AND_GREAT_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_ARR_AND_GREAT_GLOB]] = distinct !{![[MD_LOOP_ARR_AND_GREAT_GLOB]], ![[MP]], ![[IVDEP_ARR_AND_GREAT_GLOB:[0-9]+]], ![[IVDEP_LEGACY_ARR_AND_GREAT_GLOB:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_LEGACY_ARR_AND_GREAT_GLOB]] = !{!"llvm.loop.ivdep.safelen", i32 9} -// CHECK-DAG: ![[IVDEP_ARR_AND_GREAT_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_ARR_AND_GREAT_GLOB]], ![[IDX_GROUP_B_ARR_AND_GREAT_GLOB]], i32 9} - -/// Multiple arrays with specific safelens and lesser global safelen -/// The array-specific safelens are kept for the correspondent arrays, the global safelen applies to the rest -// -// CHECK-DAG: ![[IDX_GROUP_A_MUL_ARR_AND_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_MUL_ARR_AND_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_C_MUL_ARR_AND_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_MUL_ARR_AND_GLOB]] = distinct !{![[MD_LOOP_MUL_ARR_AND_GLOB]], ![[MP]], ![[IVDEP_A_MUL_ARR_AND_GLOB:[0-9]+]], ![[IVDEP_LEGACY_MUL_ARR_AND_GLOB:[0-9]+]], ![[IVDEP_B_MUL_ARR_AND_GLOB:[0-9]+]], ![[IVDEP_C_MUL_ARR_AND_GLOB:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_LEGACY_MUL_ARR_AND_GLOB]] = !{!"llvm.loop.ivdep.safelen", i32 5} -// CHECK-DAG: ![[IVDEP_A_MUL_ARR_AND_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_MUL_ARR_AND_GLOB]], i32 5} -// CHECK-DAG: ![[IVDEP_B_MUL_ARR_AND_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_B_MUL_ARR_AND_GLOB]], i32 6} -// CHECK-DAG: ![[IVDEP_C_MUL_ARR_AND_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_C_MUL_ARR_AND_GLOB]]} - -// CHECK-DAG: ![[IDX_GROUP_PTR]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_PTR]] = distinct !{![[MD_LOOP_PTR]], ![[MP]], ![[IVDEP_PTR:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_PTR]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_PTR]], i32 5} - -// CHECK-DAG: ![[IDX_GROUP_STRUCT_ARR]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_STRUCT_ARR]] = distinct !{![[MD_LOOP_STRUCT_ARR]], ![[MP]], ![[IVDEP_STRUCT_ARR:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_STRUCT_ARR]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_STRUCT_ARR]], i32 5} - -// CHECK-DAG: ![[IDX_GROUP_STRUCT_PTR]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_STRUCT_PTR]] = distinct !{![[MD_LOOP_STRUCT_PTR]], ![[MP]], ![[IVDEP_STRUCT_PTR:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_STRUCT_PTR]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_STRUCT_PTR]], i32 5} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-embedded-loops.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-embedded-loops.cpp deleted file mode 100644 index 05499f8a3d4e9..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-embedded-loops.cpp +++ /dev/null @@ -1,253 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Accesses from the inner loop only, various global safelens for the outer and the inner loops. -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_inner_loop_accessv() -void ivdep_inner_loop_access() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - [[intel::ivdep]] for (int i = 0; i != 10; ++i) { - [[intel::ivdep(3)]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_ACCESS:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_ACCESS]] - a[i] = a[(i + j) % 10]; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_INNER_LOOP_INNER_ACCESS:[0-9]+]] - } - // CHECK: br label %for.cond, !llvm.loop ![[MD_OUTER_LOOP_INNER_ACCESS:[0-9]+]] - } -} - -// Accesses from both inner and outer loop, same global (INF) safelen for both. -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_embedded_global_safelenv() -void ivdep_embedded_global_safelen() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - [[intel::ivdep]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_OUTER_GLOB_SFLN:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_OUTER_GLOB_SFLN]] - a[i] = a[i % 2]; - [[intel::ivdep]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_GLOB_SFLN:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_GLOB_SFLN]] - a[i] = a[(i + j) % 10]; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_INNER_GLOB_SFLN:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_OUTER_GLOB_SFLN:[0-9]+]] - } -} - -// Accesses from both inner and outer loop, with various safelens per loop. -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_embedded_various_safelensv() -void ivdep_embedded_various_safelens() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - [[intel::ivdep(a, 4)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_OUTER_VAR_SFLN:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_OUTER_VAR_SFLN]] - a[i] = a[i % 2]; - [[intel::ivdep(a, 2)]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_VAR_SFLN:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_INNER_VAR_SFLN]] - a[i] = a[(i + j) % 10]; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_INNER_VAR_SFLN:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_OUTER_VAR_SFLN:[0-9]+]] - } -} - -// Multiple arrays accessed from both loops. -// Outer loop: array-specific ivdeps for all arrays with various safelens -// Inner loop: global ivdep with its own safelen -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_embedded_multiple_arraysv() -void ivdep_embedded_multiple_arrays() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(a, 3), intel::ivdep(b, 4)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_OUTER_MUL_ARRS:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_OUTER_MUL_ARRS]] - a[i] = a[i % 2]; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_OUTER_MUL_ARRS:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_OUTER_MUL_ARRS]] - b[i] = b[i % 2]; - [[intel::ivdep(2)]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_INNER_MUL_ARRS:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_INNER_MUL_ARRS:[0-9]+]] - a[i] = b[(i + j) % 10]; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_INNER_MUL_ARRS:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_OUTER_MUL_ARRS:[0-9]+]] - } -} - -// Multiple arrays accessed from both loops. -// Outer loop: array-specific ivdep for one of the arrays -// Inner loop: global ivdep (i.e. applies to all arrays) -// As the outer loop's ivdep applies to a particular, other array(s) shouldn't be marked -// into any index group at the outer loop level -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_embedded_multiple_arrays_globalv() -void ivdep_embedded_multiple_arrays_global() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(a)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_OUTER_MUL_ARRS_GLOB:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_OUTER_MUL_ARRS_GLOB]] - a[i] = a[i % 2]; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}{{[[:space:]]}} - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}{{[[:space:]]}} - b[i] = b[i % 2]; - [[intel::ivdep]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_INNER_MUL_ARRS_GLOB:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_INNER_MUL_ARRS_GLOB:[0-9]+]] - a[i] = b[(i + j) % 10]; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_INNER_MUL_ARRS_GLOB:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_OUTER_MUL_ARRS_GLOB:[0-9]+]] - } -} - -// Accesses within each dimension of a multi-dimensional (n > 2) loop -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_embedded_multiple_dimensionsv() -void ivdep_embedded_multiple_dimensions() { - int a[10]; - [[intel::ivdep]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_DIM_1_MUL_DIMS:[0-9]+]] - a[i] = i; - [[intel::ivdep]] for (int j = 0; j != 10; ++j) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_DIM_2_MUL_DIMS:[0-9]+]] - a[j] += j; - [[intel::ivdep]] for (int k = 0; k != 10; ++k) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_DIM_3_MUL_DIMS:[0-9]+]] - a[k] += k; - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_DIM_3_MUL_DIMS:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_DIM_2_MUL_DIMS:[0-9]+]] - } - // CHECK: br label %for.cond{{[0-9]*}}, !llvm.loop ![[MD_LOOP_DIM_1_MUL_DIMS:[0-9]+]] - } -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - ivdep_inner_loop_access(); - ivdep_embedded_global_safelen(); - ivdep_embedded_various_safelens(); - ivdep_embedded_multiple_arrays(); - ivdep_embedded_multiple_arrays_global(); - ivdep_embedded_multiple_dimensions(); - }); - return 0; -} - -// Find the single instance of a legacy "IVDep enable" MD node. -// CHECK-DAG: ![[IVDEP_LEGACY_ENABLE:[0-9]+]] = !{!"llvm.loop.ivdep.enable"} - -/// Accesses from the inner loop only, various global safelens for the outer and the inner loops. -/// The inner loop's index group(s) should have two subnodes (outer-loop node and inner-loop node). -// -// Inner loop -// CHECK-DAG: ![[IDX_GROUP_INNER_ACCESS]] = !{![[OUTER_NODE_INNER_ACCESS:[0-9]+]], ![[INNER_NODE_INNER_ACCESS:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_INNER_ACCESS]] = distinct !{} -// CHECK-DAG: ![[MD_INNER_LOOP_INNER_ACCESS]] = distinct !{![[MD_INNER_LOOP_INNER_ACCESS]], ![[#]], ![[IVDEP_INNER_INNER_ACCESS:[0-9]+]], ![[IVDEP_LEGACY_INNER_INNER_ACCESS:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_LEGACY_INNER_INNER_ACCESS]] = !{!"llvm.loop.ivdep.safelen", i32 3} -// CHECK-DAG: ![[IVDEP_INNER_INNER_ACCESS]] = !{!"llvm.loop.parallel_access_indices", ![[INNER_NODE_INNER_ACCESS]], i32 3} -// -// Outer loop -// CHECK-DAG: ![[OUTER_NODE_INNER_ACCESS]] = distinct !{} -// CHECK-DAG: ![[MD_OUTER_LOOP_INNER_ACCESS]] = distinct !{![[MD_OUTER_LOOP_INNER_ACCESS]], ![[#]], ![[IVDEP_OUTER_INNER_ACCESS:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_OUTER_INNER_ACCESS]] = !{!"llvm.loop.parallel_access_indices", ![[OUTER_NODE_INNER_ACCESS]]} - -/// Accesses from both inner and outer loop, same global (INF) safelen for both. -/// The "outer loop subnode" of the inner loop's index group points at the outer loop's index group -// -// Inner loop -// CHECK-DAG: ![[IDX_GROUP_INNER_GLOB_SFLN]] = !{![[IDX_GROUP_OUTER_GLOB_SFLN]], ![[INNER_NODE_GLOB_SFLN:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_GLOB_SFLN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_INNER_GLOB_SFLN]] = distinct !{![[MD_LOOP_INNER_GLOB_SFLN]], ![[#]], ![[IVDEP_INNER_GLOB_SFLN:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_INNER_GLOB_SFLN]] = !{!"llvm.loop.parallel_access_indices", ![[INNER_NODE_GLOB_SFLN]]} -// -// Outer loop -// CHECK-DAG: ![[IDX_GROUP_OUTER_GLOB_SFLN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_OUTER_GLOB_SFLN]] = distinct !{![[MD_LOOP_OUTER_GLOB_SFLN]], ![[#]], ![[IVDEP_OUTER_GLOB_SFLN:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_OUTER_GLOB_SFLN]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_OUTER_GLOB_SFLN]]} - -/// Accesses from both inner and outer loop, with various safelens per loop. -/// The "outer loop subnode" of the inner loop's index group points at the outer loop's index group -// -// Inner loop -// CHECK-DAG: ![[IDX_GROUP_INNER_VAR_SFLN]] = !{![[IDX_GROUP_OUTER_VAR_SFLN]], ![[INNER_NODE_VAR_SFLN:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_VAR_SFLN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_INNER_VAR_SFLN]] = distinct !{![[MD_LOOP_INNER_VAR_SFLN]], ![[#]], ![[IVDEP_INNER_VAR_SFLN:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_INNER_VAR_SFLN]] = !{!"llvm.loop.parallel_access_indices", ![[INNER_NODE_VAR_SFLN]], i32 2} -// -// Outer loop -// CHECK-DAG: ![[IDX_GROUP_OUTER_VAR_SFLN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_OUTER_VAR_SFLN]] = distinct !{![[MD_LOOP_OUTER_VAR_SFLN]], ![[#]], ![[IVDEP_OUTER_VAR_SFLN:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_OUTER_VAR_SFLN]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_OUTER_VAR_SFLN]], i32 4} - -/// Multiple arrays accessed from both loops. -/// The "outer loop subnode" of the inner loop's index group points at the outer loop's index group -// -// Inner loop -// CHECK-DAG: ![[IDX_GROUP_A_INNER_MUL_ARRS]] = !{![[IDX_GROUP_A_OUTER_MUL_ARRS]], ![[INNER_NODE_A_MUL_ARRS:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_A_MUL_ARRS]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_INNER_MUL_ARRS]] = !{![[IDX_GROUP_B_OUTER_MUL_ARRS]], ![[INNER_NODE_B_MUL_ARRS:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_B_MUL_ARRS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_INNER_MUL_ARRS]] = distinct !{![[MD_LOOP_INNER_MUL_ARRS]], ![[#]], ![[IVDEP_INNER_A_B_MUL_ARRS:[0-9]+]], ![[IVDEP_LEGACY_INNER_MUL_ARRS:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_LEGACY_INNER_MUL_ARRS]] = !{!"llvm.loop.ivdep.safelen", i32 2} -// CHECK-DAG: ![[IVDEP_INNER_A_B_MUL_ARRS]] = !{!"llvm.loop.parallel_access_indices", ![[INNER_NODE_B_MUL_ARRS]], ![[INNER_NODE_A_MUL_ARRS]], i32 2} -// -// Outer loop -// CHECK-DAG: ![[IDX_GROUP_A_OUTER_MUL_ARRS]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_OUTER_MUL_ARRS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_OUTER_MUL_ARRS]] = distinct !{![[MD_LOOP_OUTER_MUL_ARRS]], ![[#]], ![[IVDEP_OUTER_A_MUL_ARRS:[0-9]+]], ![[IVDEP_OUTER_B_MUL_ARRS:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_OUTER_A_MUL_ARRS]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_OUTER_MUL_ARRS]], i32 3} -// CHECK-DAG: ![[IVDEP_OUTER_B_MUL_ARRS]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_B_OUTER_MUL_ARRS]], i32 4} - -/// Multiple arrays accessed from both loops. -/// The "outer loop subnode" of the inner loop's index group points at the outer loop's index group -// -// Inner loop -// CHECK-DAG: ![[IDX_GROUP_A_INNER_MUL_ARRS_GLOB]] = !{![[IDX_GROUP_A_OUTER_MUL_ARRS_GLOB]], ![[INNER_NODE_A_MUL_ARRS_GLOB:[0-9]+]]} -// CHECK-DAG: ![[INNER_NODE_A_MUL_ARRS_GLOB]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_INNER_MUL_ARRS_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_INNER_MUL_ARRS_GLOB]] = distinct !{![[MD_LOOP_INNER_MUL_ARRS_GLOB]], ![[#]], ![[IVDEP_INNER_A_B_MUL_ARRS_GLOB:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_INNER_A_B_MUL_ARRS_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_B_INNER_MUL_ARRS_GLOB]], ![[INNER_NODE_A_MUL_ARRS_GLOB]]} -// -// Outer loop -// CHECK-DAG: ![[IDX_GROUP_A_OUTER_MUL_ARRS_GLOB]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_OUTER_MUL_ARRS_GLOB]] = distinct !{![[MD_LOOP_OUTER_MUL_ARRS_GLOB]], ![[#]], ![[IVDEP_OUTER_A_MUL_ARRS_GLOB:[0-9]+]]} -// CHECK-DAG: ![[IVDEP_OUTER_A_MUL_ARRS_GLOB]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_OUTER_MUL_ARRS_GLOB]]} - -/// Accesses within each dimension of a multi-dimensional (n > 2) loop -/// Index group(s) of each inner loop should have a subnode that points to the containing loop's index group subnode -/// (in case the containing loop is the outermost, to the index group itself) -// -// Loop dimension 3 (the innermost loop) -// CHECK-DAG: ![[IDX_GROUP_DIM_3_MUL_DIMS]] = !{![[IDX_GROUP_DIM_1_MUL_DIMS]], ![[DIM_2_NODE_MUL_DIMS:[0-9]+]], ![[DIM_3_NODE_MUL_DIMS:[0-9]+]]} -// CHECK-DAG: ![[DIM_3_NODE_MUL_DIMS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_DIM_3_MUL_DIMS]] = distinct !{![[MD_LOOP_DIM_3_MUL_DIMS]], ![[#]], ![[IVDEP_DIM_3_MUL_DIMS:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_DIM_3_MUL_DIMS]] = !{!"llvm.loop.parallel_access_indices", ![[DIM_3_NODE_MUL_DIMS]]} -// -// Loop dimension 2 -// CHECK-DAG: ![[IDX_GROUP_DIM_2_MUL_DIMS]] = !{![[IDX_GROUP_DIM_1_MUL_DIMS]], ![[DIM_2_NODE_MUL_DIMS]]} -// CHECK-DAG: ![[DIM_2_NODE_MUL_DIMS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_DIM_2_MUL_DIMS]] = distinct !{![[MD_LOOP_DIM_2_MUL_DIMS]], ![[#]], ![[IVDEP_DIM_2_MUL_DIMS:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_DIM_2_MUL_DIMS]] = !{!"llvm.loop.parallel_access_indices", ![[DIM_2_NODE_MUL_DIMS]]} -// -// Loop dimension 1 (the outermost loop) -// CHECK-DAG: ![[IDX_GROUP_DIM_1_MUL_DIMS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_DIM_1_MUL_DIMS]] = distinct !{![[MD_LOOP_DIM_1_MUL_DIMS]], ![[#]], ![[IVDEP_DIM_1_MUL_DIMS:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_DIM_1_MUL_DIMS]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_DIM_1_MUL_DIMS]]} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-global.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-global.cpp deleted file mode 100644 index 6a76e8539c929..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-ivdep-global.cpp +++ /dev/null @@ -1,124 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Global ivdep - annotate all GEPs -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_no_paramv() -void ivdep_no_param() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_NO_PARAM:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_NO_PARAM:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_NO_PARAM:[0-9]+]] - } -} - -// Global ivdep - annotate all GEPs -// Make sure that ALL of the relevant GEPs for an array are marked into the array's index groups -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_no_param_multiple_gepsv() -void ivdep_no_param_multiple_geps() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - // CHECK: %[[TMP:[0-9a-z]+]] = alloca i32 - int t; - [[intel::ivdep]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_MUL_GEPS:[0-9]+]] - t = a[i]; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_MUL_GEPS:[0-9]+]] - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_MUL_GEPS]] - a[i] = b[i]; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_MUL_GEPS]] - b[i] = t; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_MUL_GEPS:[0-9]+]] - } -} - -// Global ivdep w/ safelen specified - annotate all GEPs -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_safelenv() -void ivdep_safelen() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(5)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_SAFELEN:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_SAFELEN:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_SAFELEN:[0-9]+]] - } -} - -// Global ivdep, albeit conflicting safelens - annotate all GEPs -// -// CHECK: define {{.*}}spir_func void @_Z{{[0-9]+}}ivdep_conflicting_safelenv() -void ivdep_conflicting_safelen() { - // CHECK: %[[ARRAY_A:[0-9a-z]+]] = alloca [10 x i32] - int a[10]; - // CHECK: %[[ARRAY_B:[0-9a-z]+]] = alloca [10 x i32] - int b[10]; - [[intel::ivdep(5)]] - [[intel::ivdep(4)]] for (int i = 0; i != 10; ++i) { - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_A]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_A_CONFL_SAFELEN:[0-9]+]] - a[i] = 0; - // CHECK: %{{[0-9a-z]+}} = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* %[[ARRAY_B]].ascast, i64 0, i64 %{{[0-9a-z]+}}, !llvm.index.group ![[IDX_GROUP_B_CONFL_SAFELEN:[0-9]+]] - b[i] = 0; - // CHECK: br label %for.cond, !llvm.loop ![[MD_LOOP_CONFL_SAFELEN:[0-9]+]] - } -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - ivdep_no_param(); - ivdep_no_param_multiple_geps(); - ivdep_safelen(); - ivdep_conflicting_safelen(); - }); - return 0; -} - -// Find recurring instances of legacy "IVDep enable/safelen" MD nodes. -// CHECK-DAG: ![[IVDEP_LEGACY_ENABLE:[0-9]+]] = !{!"llvm.loop.ivdep.enable"} -// CHECK-DAG: ![[IVDEP_LEGACY_SAFELEN_5:[0-9]+]] = !{!"llvm.loop.ivdep.safelen", i32 5} - -/// Global ivdep w/o safelen specified -/// All arrays have the same INF safelen - put access groups into the same parallel_access_indices metadata -// -// CHECK-DAG: ![[IDX_GROUP_A_NO_PARAM]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_NO_PARAM]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_NO_PARAM]] = distinct !{![[MD_LOOP_NO_PARAM]], ![[#]], ![[IVDEP_NO_PARAM:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_NO_PARAM]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_NO_PARAM]], ![[IDX_GROUP_B_NO_PARAM]]} -// -// CHECK-DAG: ![[IDX_GROUP_A_MUL_GEPS]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_MUL_GEPS]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_MUL_GEPS]] = distinct !{![[MD_LOOP_MUL_GEPS]], ![[#]], ![[IVDEP_MUL_GEPS:[0-9]+]], ![[IVDEP_LEGACY_ENABLE]]} -// CHECK-DAG: ![[IVDEP_MUL_GEPS]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_MUL_GEPS]], ![[IDX_GROUP_B_MUL_GEPS]]} - -/// Global ivdep w/ safelen specified -/// All arrays share the same safelen - put index groups into the same parallel_access_indices MD node -// -// CHECK-DAG: ![[IDX_GROUP_A_SAFELEN]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_SAFELEN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_SAFELEN]] = distinct !{![[MD_LOOP_SAFELEN]], ![[#]], ![[IVDEP_SAFELEN:[0-9]+]], ![[IVDEP_LEGACY_SAFELEN_5]]} -// CHECK-DAG: ![[IVDEP_SAFELEN]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_SAFELEN]], ![[IDX_GROUP_B_SAFELEN]], i32 5} - -/// Conflicting global ivdeps, different safelens specified -/// The highest safelen must be used for all arrays -// -// CHECK-DAG: ![[IDX_GROUP_A_CONFL_SAFELEN]] = distinct !{} -// CHECK-DAG: ![[IDX_GROUP_B_CONFL_SAFELEN]] = distinct !{} -// CHECK-DAG: ![[MD_LOOP_CONFL_SAFELEN]] = distinct !{![[MD_LOOP_CONFL_SAFELEN]], ![[#]], ![[IVDEP_CONFL_SAFELEN:[0-9]+]], ![[IVDEP_LEGACY_SAFELEN_5]]} -// CHECK-DAG: ![[IVDEP_CONFL_SAFELEN]] = !{!"llvm.loop.parallel_access_indices", ![[IDX_GROUP_A_CONFL_SAFELEN]], ![[IDX_GROUP_B_CONFL_SAFELEN]], i32 5} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-local.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-local.cpp deleted file mode 100644 index b859476236062..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-local.cpp +++ /dev/null @@ -1,278 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -check-prefixes CHECK-DEVICE,CHECK-BOTH -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -check-prefixes CHECK-HOST,CHECK-BOTH - -// CHECK-BOTH: @_ZZ15attrs_on_staticvE15static_numbanks = internal{{.*}}constant i32 20, align 4 -// CHECK-DEVICE: [[ANN_numbanks_4:@.str]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{numbanks:4} -// CHECK-BOTH: @_ZZ15attrs_on_staticvE15static_annotate = internal{{.*}}constant i32 30, align 4 -// CHECK-BOTH: [[ANN_annotate:@.str[.0-9]*]] = {{.*}}foobar -// CHECK-BOTH: @_ZZ15attrs_on_staticvE16static_force_p2d = internal{{.*}}constant i32 40, align 4 -// CHECK-DEVICE: [[ANN_force_pow2_depth_0:@.str[.0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{force_pow2_depth:0} -// CHECK-DEVICE: [[ANN_register:@.str.[0-9]*]] = {{.*}}{register:1} -// CHECK-DEVICE: [[ANN_memory_default:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4} -// CHECK-DEVICE: [[ANN_mlab_sizeinfo_500:@.str.[0-9]*]] = {{.*}}{memory:MLAB}{sizeinfo:4,500} -// CHECK-DEVICE: [[ANN_blockram_sizeinfo_10_2:@.str.[0-9]*]] = {{.*}}{memory:BLOCK_RAM}{sizeinfo:4,10,2} -// CHECK-DEVICE: [[ANN_bankwidth_4:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{bankwidth:4} -// CHECK-DEVICE: [[ANN_private_copies_8:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{private_copies:8} -// CHECK-DEVICE: [[ANN_singlepump:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{pump:1} -// CHECK-DEVICE: [[ANN_doublepump:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{pump:2} -// CHECK-DEVICE: [[ANN_merge_depth:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{merge:foo:depth} -// CHECK-DEVICE: [[ANN_merge_width:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{merge:bar:width} -// CHECK-DEVICE: [[ANN_max_replicates_2:@.str.[0-9]*]] = {{.*}}{max_replicates:2} -// CHECK-DEVICE: [[ANN_simple_dual_port:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{simple_dual_port:1} -// CHECK-DEVICE: [[ANN_bankbits_4_5:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{numbanks:4}{bank_bits:4,5} -// CHECK-DEVICE: [[ANN_bankbits_numbanks_mlab:@.str.[0-9]*]] = {{.*}}{memory:MLAB}{sizeinfo:4}{numbanks:8}{bank_bits:5,4,3} -// CHECK-DEVICE: [[ANN_bankbits_bankwidth:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4,10,2}{bankwidth:16}{numbanks:2}{bank_bits:0} -// CHECK-DEVICE: [[ANN_memory_blockram:@.str.[0-9]*]] = {{.*}}{memory:BLOCK_RAM}{sizeinfo:4} -// CHECK-DEVICE: [[ANN_memory_mlab:@.str.[0-9]*]] = {{.*}}{memory:MLAB}{sizeinfo:4} -// CHECK-DEVICE: [[ANN_force_pow2_depth_1:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{force_pow2_depth:1} -// CHECK-DEVICE: [[ANN_private_copies_4:@.str.[0-9]*]] = {{.*}}{memory:DEFAULT}{sizeinfo:4}{private_copies:4} -// CHECK-DEVICE: [[ANN_max_replicates_4:@.str.[0-9]*]] = {{.*}}{max_replicates:4} - -// CHECK-BOTH: @llvm.global.annotations -// CHECK-DEVICE-SAME: { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ15attrs_on_staticvE15static_numbanks to i8 addrspace(1)*) to i8*) -// CHECK-DEVICE-SAME: [[ANN_numbanks_4]]{{.*}} i32 43 -// CHECK-DEVICE-SAME: { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ15attrs_on_staticvE15static_annotate to i8 addrspace(1)*) to i8*) -// CHECK-HOST-SAME: { i8* bitcast (i32* @_ZZ15attrs_on_staticvE15static_annotate to i8*) -// CHECK-BOTH-SAME: [[ANN_annotate]]{{.*}} i32 44 -// CHECK-DEVICE-SAME: { i8* addrspacecast (i8 addrspace(1)* bitcast (i32 addrspace(1)* @_ZZ15attrs_on_staticvE16static_force_p2d to i8 addrspace(1)*) to i8*) -// CHECK-DEVICE-SAME: [[ANN_force_pow2_depth_0]]{{.*}} i32 45 -// CHECK-HOST-NOT: llvm.var.annotation -// CHECK-HOST-NOT: llvm.ptr.annotation - -void attrs_on_static() { - const static int static_numbanks [[intel::numbanks(4)]] = 20; - const static int static_annotate [[clang::annotate("foobar")]] = 30; - const static int static_force_p2d [[intel::force_pow2_depth(0)]] = 40; -} - -void attrs_on_var() { - // CHECK-DEVICE: %[[VAR_NUMBANKS:numbanks.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %numbanks.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_NUMBANKS1:numbanks.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_NUMBANKS]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_NUMBANKS1]],{{.*}}[[ANN_numbanks_4]] - int numbanks [[intel::numbanks(4)]]; - // CHECK-DEVICE: %[[VAR_REGISTER:reg.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %reg.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_REGISTER1:reg.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_REGISTER]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_REGISTER1]],{{.*}}[[ANN_register]] - int reg [[intel::fpga_register]]; - // CHECK-DEVICE: %[[VAR_MEMORY:memory.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %memory.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_MEMORY1:memory.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_MEMORY]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_MEMORY1]],{{.*}}[[ANN_memory_default]] - int memory [[intel::fpga_memory]]; - // CHECK-DEVICE: %[[VAR_SIZE_MLAB:size_mlab.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %size_mlab.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_SIZE_MLAB1:size_mlab.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_SIZE_MLAB]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_SIZE_MLAB1]],{{.*}}[[ANN_mlab_sizeinfo_500]] - [[intel::fpga_memory("MLAB")]] int size_mlab[500]; - // CHECK-DEVICE: %[[VAR_SIZE_BLOCKRAM:size_blockram.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %size_blockram.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_SIZE_BLOCKRAM1:size_blockram.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_SIZE_BLOCKRAM]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_SIZE_BLOCKRAM1]],{{.*}}[[ANN_blockram_sizeinfo_10_2]] - [[intel::fpga_memory("BLOCK_RAM")]] int size_blockram[10][2]; - // CHECK-DEVICE: %[[VAR_BANKWIDTH:bankwidth.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bankwidth.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_BANKWIDTH1:bankwidth.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_BANKWIDTH]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_BANKWIDTH1]],{{.*}}[[ANN_bankwidth_4]] - int bankwidth [[intel::bankwidth(4)]]; - // CHECK-DEVICE: %[[VAR_PRIV_COPIES:priv_copies.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %priv_copies.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_PRIV_COPIES1:priv_copies.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_PRIV_COPIES]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_PRIV_COPIES1]],{{.*}}[[ANN_private_copies_8]] - int priv_copies [[intel::private_copies(8)]]; - // CHECK-DEVICE: %[[VAR_SINGLEPUMP:singlepump.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %singlepump.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_SINGLEPUMP1:singlepump.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_SINGLEPUMP]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_SINGLEPUMP1]],{{.*}}[[ANN_singlepump]] - int singlepump [[intel::singlepump]]; - // CHECK-DEVICE: %[[VAR_DOUBLEPUMP:doublepump.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %doublepump.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_DOUBLEPUMP1:doublepump.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_DOUBLEPUMP]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_DOUBLEPUMP1]],{{.*}}[[ANN_doublepump]] - int doublepump [[intel::doublepump]]; - // CHECK-DEVICE: %[[VAR_MERGE_DEPTH:merge_depth.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %merge_depth.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_MERGE_DEPTH1:merge_depth.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_MERGE_DEPTH]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_MERGE_DEPTH1]],{{.*}}[[ANN_merge_depth]] - int merge_depth [[intel::merge("foo", "depth")]]; - // CHECK-DEVICE: %[[VAR_MERGE_WIDTH:merge_width.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %merge_width.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_MERGE_WIDTH1:merge_width.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_MERGE_WIDTH]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_MERGE_WIDTH1]],{{.*}}[[ANN_merge_width]] - int merge_width [[intel::merge("bar", "width")]]; - // CHECK-DEVICE: %[[VAR_MAXREPL:max_repl.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %max_repl.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_MAXREPL1:max_repl.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_MAXREPL]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_MAXREPL1]],{{.*}}[[ANN_max_replicates_2]] - int max_repl [[intel::max_replicates(2)]]; - // CHECK-DEVICE: %[[VAR_DUALPORT:dualport.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %dualport.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_DUALPORT1:dualport.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_DUALPORT]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_DUALPORT1]],{{.*}}[[ANN_simple_dual_port]] - int dualport [[intel::simple_dual_port]]; - // CHECK-DEVICE: %[[VAR_BANKBITS:bankbits.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bankbits.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_BANKBITS1:bankbits.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_BANKBITS]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_BANKBITS1]],{{.*}}[[ANN_bankbits_4_5]] - int bankbits [[intel::bank_bits(4, 5)]]; - // CHECK-DEVICE: %[[VAR_BANKBITS_NUMBANKS:bankbits_numbanks_mlab.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bankbits_numbanks_mlab.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_BANKBITS_NUMBANKS1:bankbits_numbanks_mlab.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_BANKBITS_NUMBANKS]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_BANKBITS_NUMBANKS1]],{{.*}}[[ANN_bankbits_numbanks_mlab]] - [[intel::bank_bits(5, 4, 3), intel::numbanks(8), intel::fpga_memory("MLAB")]] int bankbits_numbanks_mlab; - // CHECK-DEVICE: %[[VAR_BANK_BITS_WIDTH:bank_bits_width.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bank_bits_width.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_BANK_BITS_WIDTH1:bank_bits_width.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_BANK_BITS_WIDTH]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[VAR_BANK_BITS_WIDTH1]],{{.*}}[[ANN_bankbits_bankwidth]] - [[intel::bank_bits(0), intel::bankwidth(16)]] int bank_bits_width[10][2]; - // CHECK-DEVICE: %[[VAR_FP2D:force_p2d.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %force_p2d.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[VAR_FP2D1:force_p2d.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[VAR_FP2D]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[VAR_FP2D1]],{{.*}}[[ANN_force_pow2_depth_0]] - int force_p2d [[intel::force_pow2_depth(0)]]; -} - -void attrs_on_struct() { - struct attrs_on_struct { - int numbanks [[intel::numbanks(4)]]; - int reg [[intel::fpga_register]]; - int memory [[intel::fpga_memory]]; - int memory_blockram [[intel::fpga_memory("BLOCK_RAM")]]; - int memory_mlab [[intel::fpga_memory("MLAB")]]; - int bankwidth [[intel::bankwidth(4)]]; - int privatecopies [[intel::private_copies(8)]]; - int singlepump [[intel::singlepump]]; - int doublepump [[intel::doublepump]]; - int merge_depth [[intel::merge("foo", "depth")]]; - int merge_width [[intel::merge("bar", "width")]]; - int maxreplicates [[intel::max_replicates(2)]]; - int dualport [[intel::simple_dual_port]]; - int bankbits [[intel::bank_bits(4, 5)]]; - int force_p2d [[intel::force_pow2_depth(1)]]; - } s; - - // CHECK-DEVICE: %[[FIELD_NUMBANKS:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_NUMBANKS]]{{.*}}[[ANN_numbanks_4]] - s.numbanks = 0; - // CHECK-DEVICE: %[[FIELD_REGISTER:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_REGISTER]]{{.*}}[[ANN_register]] - s.reg = 0; - // CHECK-DEVICE: %[[FIELD_MEM_DEFAULT:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MEM_DEFAULT]]{{.*}}[[ANN_memory_default]] - s.memory = 0; - // CHECK-DEVICE: %[[FIELD_MEM_BLOCKRAM:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MEM_BLOCKRAM]]{{.*}}[[ANN_memory_blockram]] - s.memory_blockram = 0; - // CHECK-DEVICE: %[[FIELD_MEM_MLAB:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MEM_MLAB]]{{.*}}[[ANN_memory_mlab]] - s.memory_mlab = 0; - // CHECK-DEVICE: %[[FIELD_BANKWIDTH:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_BANKWIDTH]]{{.*}}[[ANN_bankwidth_4]] - s.bankwidth = 0; - // CHECK-DEVICE: %[[FIELD_PRIV_COPIES:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_PRIV_COPIES]]{{.*}}[[ANN_private_copies_8]] - s.privatecopies = 0; - // CHECK-DEVICE: %[[FIELD_SINGLEPUMP:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_SINGLEPUMP]]{{.*}}[[ANN_singlepump]] - s.singlepump = 0; - // CHECK-DEVICE: %[[FIELD_DOUBLEPUMP:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_DOUBLEPUMP]]{{.*}}[[ANN_doublepump]] - s.doublepump = 0; - // CHECK-DEVICE: %[[FIELD_MERGE_DEPTH:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MERGE_DEPTH]]{{.*}}[[ANN_merge_depth]] - s.merge_depth = 0; - // CHECK-DEVICE: %[[FIELD_MERGE_WIDTH:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MERGE_WIDTH]]{{.*}}[[ANN_merge_width]] - s.merge_width = 0; - // CHECK-DEVICE: %[[FIELD_MAX_REPLICATES:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MAX_REPLICATES]]{{.*}}[[ANN_max_replicates_2]] - s.maxreplicates = 0; - // CHECK-DEVICE: %[[FIELD_DUALPORT:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_DUALPORT]]{{.*}}[[ANN_simple_dual_port]] - s.dualport = 0; - // CHECK-DEVICE: %[[FIELD_BANKBITS:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_BANKBITS]]{{.*}}[[ANN_bankbits_4_5]] - s.bankbits = 0; - // CHECK-DEVICE: %[[FIELD_FP2D:.*]] = getelementptr inbounds %struct.attrs_on_struct{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_FP2D]]{{.*}}[[ANN_force_pow2_depth_1]] - s.force_p2d = 0; -} - -// CHECK-HOST-NOT: llvm.var.annotation -// CHECK-HOST-NOT: llvm.ptr.annotation - -template -void attrs_with_template_param() { - // CHECK-DEVICE: %[[TEMPL_NUMBANKS:numbanks.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %numbanks.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_NUMBANKS1:numbanks.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_NUMBANKS]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[TEMPL_NUMBANKS1]],{{.*}}[[ANN_numbanks_4]] - int numbanks [[intel::numbanks(A)]]; - // CHECK-DEVICE: %[[TEMPL_BANKWIDTH:bankwidth.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bankwidth.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_BANKWIDTH1:bankwidth.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_BANKWIDTH]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[TEMPL_BANKWIDTH1]],{{.*}}[[ANN_bankwidth_4]] - int bankwidth [[intel::bankwidth(A)]]; - // CHECK-DEVICE: %[[TEMPL_PRIV_COPIES:priv_copies.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %priv_copies.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_PRIV_COPIES1:priv_copies.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_PRIV_COPIES]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[TEMPL_PRIV_COPIES1]],{{.*}}[[ANN_private_copies_4]] - int priv_copies [[intel::private_copies(A)]]; - // CHECK-DEVICE: %[[TEMPL_MAXREPL:max_repl.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %max_repl.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_MAXREPL1:max_repl.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_MAXREPL]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[TEMPL_MAXREPL1]],{{.*}}[[ANN_max_replicates_4]] - int max_repl [[intel::max_replicates(A)]]; - // CHECK-DEVICE: %[[TEMPL_BANKBITS:bankbits.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %bankbits.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_BANKBITS1:bankbits.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_BANKBITS]] to i8* - // CHECK-DEVICE: @llvm.var.annotation{{.*}}%[[TEMPL_BANKBITS1]],{{.*}}[[ANN_bankbits_4_5]] - int bankbits [[intel::bank_bits(A, B)]]; - // CHECK-DEVICE: %[[TEMPL_FP2D:force_p2d.ascast[0-9]+]] = bitcast {{.*}} addrspace(4)* %force_p2d.ascast to i8 addrspace(4)* - // CHECK-DEVICE: %[[TEMPL_FP2D1:force_p2d.ascast[0-9]+]] = addrspacecast i8 addrspace(4)* %[[TEMPL_FP2D]] to i8* - // CHECK-DEVICE: llvm.var.annotation{{.*}}%[[TEMPL_FP2D1]],{{.*}}[[ANN_force_pow2_depth_1]] - int force_p2d [[intel::force_pow2_depth(C)]]; - - struct templ_on_struct_fields { - int numbanks [[intel::numbanks(A)]]; - int bankwidth [[intel::bankwidth(A)]]; - int privatecopies [[intel::private_copies(A)]]; - int maxreplicates [[intel::max_replicates(A)]]; - int bankbits [[intel::bank_bits(A, B)]]; - int force_p2d [[intel::force_pow2_depth(C)]]; - } s; - - // CHECK-DEVICE: %[[FIELD_NUMBANKS:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_NUMBANKS]]{{.*}}[[ANN_numbanks_4]] - s.numbanks = 0; - // CHECK-DEVICE: %[[FIELD_BANKWIDTH:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_BANKWIDTH]]{{.*}}[[ANN_bankwidth_4]] - s.bankwidth = 0; - // CHECK-DEVICE: %[[FIELD_PRIV_COPIES:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_PRIV_COPIES]]{{.*}}[[ANN_private_copies_4]] - s.privatecopies = 0; - // CHECK-DEVICE: %[[FIELD_MAX_REPLICATES:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_MAX_REPLICATES]]{{.*}}[[ANN_max_replicates_4]] - s.maxreplicates = 0; - // CHECK-DEVICE: %[[FIELD_BANKBITS:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_BANKBITS]]{{.*}}[[ANN_bankbits_4_5]] - s.bankbits = 0; - // CHECK-DEVICE: %[[FIELD_FP2D:.*]] = getelementptr inbounds %struct.templ_on_struct_fields{{.*}} - // CHECK-DEVICE: call i32 addrspace(4)* @llvm.ptr.annotation.p4i32{{.*}}%[[FIELD_FP2D]]{{.*}}[[ANN_force_pow2_depth_1]] - s.force_p2d = 0; -} - -void field_addrspace_cast() { - struct state { - [[intel::numbanks(2)]] int mem[8]; - - // The initialization code is not relevant to this example. - // It prevents the compiler from optimizing away access to this struct. - state() { - for (auto i = 0; i < 8; i++) { - mem[i] = i; - } - } - } state_var; - // CHECK-DEVICE: define internal {{.*}} @_ZZ20field_addrspace_castvEN5stateC2Ev - // CHECK-DEVICE: %[[MEM:[a-zA-Z0-9]+]] = getelementptr inbounds %{{.*}}, %struct.state addrspace(4)* %{{.*}}, i32 0, i32 0 - // CHECK-DEVICE: %[[BITCAST:[0-9]+]] = bitcast [8 x i32] addrspace(4)* %[[MEM]] to i8 addrspace(4)* - // CHECK-DEVICE: %[[ANN:[0-9]+]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 addrspace(4)* %[[BITCAST]], {{.*}}, {{.*}}) - // CHECK-DEVICE: %{{[0-9]+}} = bitcast i8 addrspace(4)* %[[ANN]] to [8 x i32] addrspace(4) - state_var.mem[0] = 42; -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - attrs_on_static(); - attrs_on_var(); - attrs_on_struct(); - field_addrspace_cast(); - attrs_with_template_param<4, 5, 1>(); - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-mem-builtin.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-mem-builtin.cpp deleted file mode 100644 index 095c875e32e0a..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-mem-builtin.cpp +++ /dev/null @@ -1,85 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-linux -std=c++11 -disable-llvm-passes -S -no-opaque-pointers -emit-llvm -x c++ %s -o - | FileCheck %s - -#define PARAM_1 1U << 7 -#define PARAM_2 1U << 8 - -// CHECK: [[STRUCT:%.*]] = type { i32, float } -struct State { - int x; - float y; -}; - -// CHECK: [[ANN1:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:0} -// CHECK: [[ANN2:@.str[\.]*[0-9]*]] = {{.*}}{params:384}{cache-size:127} - -// CHECK: define {{.*}}spir_func void @{{.*}}(float addrspace(4)* noundef %A, i32 addrspace(4)* noundef %B, [[STRUCT]] addrspace(4)* noundef %C, [[STRUCT]] addrspace(4)*{{.*}}%D) -void foo(float *A, int *B, State *C, State &D) { - float *x; - int *y; - State *z; - double F = 0.0; - double *f; - - // CHECK-DAG: [[Aaddr:%.*]] = alloca float addrspace(4)* - // CHECK-DAG: [[Baddr:%.*]] = alloca i32 addrspace(4)* - // CHECK-DAG: [[Caddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - // CHECK-DAG: [[Daddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - // CHECK-DAG: [[F:%.*]] = alloca double - // CHECK-DAG: [[f:%.*]] = alloca double addrspace(4)* - - // CHECK-DAG: [[A:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR1:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR1]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[B:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR2:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store i32 addrspace(4)* [[PTR2]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_fpga_mem(B, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[C:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR3:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C]]{{.*}}[[ANN1]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR3]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(C, PARAM_1 | PARAM_2, 0); - - // CHECK-DAG: [[A2:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR4:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store float addrspace(4)* [[PTR4]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_fpga_mem(A, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[B2:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR5:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store i32 addrspace(4)* [[PTR5]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_fpga_mem(B, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[C2:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR6:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C2]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR6]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(C, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[D:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Daddr]] - // CHECK-DAG: [[PTR7:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[D]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR7]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_fpga_mem(&D, PARAM_1 | PARAM_2, 127); - - // CHECK-DAG: [[PTR8:%[0-9]+]] = call double addrspace(4)* @llvm.ptr.annotation{{.*}}[[F]]{{.*}}[[ANN2]]{{.*}}[[ATT:#[0-9]+]] - // CHECK-DAG: store double addrspace(4)* [[PTR8]], double addrspace(4)* addrspace(4)* [[f]] - f = __builtin_intel_fpga_mem(&F, PARAM_1 | PARAM_2, 127); -} - -// CHECK-DAG: attributes [[ATT]] = { memory(none) } - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - float *A; - int *B; - State *C; - State D; - foo(A, B, C, D); }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-reg.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-fpga-reg.cpp deleted file mode 100644 index 37dfdef86259c..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-fpga-reg.cpp +++ /dev/null @@ -1,176 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -struct st { - int a; - float b; - char c; -}; -// CHECK: [[T_ST:%struct[a-zA-Z0-9_.]*.st]] = type { i32, float, i8 } - -union un { - int a; - char c[4]; -}; -// CHECK: [[T_UN:%union[a-zA-Z0-9_.]*.un]] = type { i32 } - -class A { -public: - A(int a) { - m_val = a; - } - A(const A &a) { - m_val = a.m_val; - } -private: - int m_val; -}; -// CHECK: [[T_CL:%class[a-zA-Z0-9_.]*.A]] = type { i32 } - -// CHECK: @.str = private unnamed_addr addrspace(1) constant [25 x i8] c"__builtin_intel_fpga_reg\00", section "llvm.metadata" - -void scalars() { - int a = 123; - int b = __builtin_intel_fpga_reg(a); - // CHECK: [[V_A1:%.*]] = load i32, i32 addrspace(4)* %a - // CHECK-NEXT: [[V_A2:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_A1]], [[BIFR_STR:i8 addrspace\(1\)\* getelementptr inbounds \(\[25 x i8\], \[25 x i8\] addrspace\(1\)\* @.str, i32 0, i32 0\),]] - // CHECK-NEXT: store i32 [[V_A2]], i32 addrspace(4)* %b - - int c = __builtin_intel_fpga_reg(2.0f); - // CHECK: [[V_CF1:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 1073741824, [[BIFR_STR]] - // CHECK-NEXT: [[V_CF_BC:%.*]] = bitcast i32 [[V_CF1]] to float - // CHECK-NEXT: [[V_CF2:%.*]] = fptosi float [[V_CF_BC]] to i32 - // CHECK-NEXT: store i32 [[V_CF2]], i32 addrspace(4)* %c - - int d = __builtin_intel_fpga_reg( __builtin_intel_fpga_reg( b+12 )); - // CHECK: [[V_B1:%.*]] = load i32, i32 addrspace(4)* %b - // CHECK-NEXT: [[V_B2:%.*]] = add nsw i32 [[V_B1]], 12 - // CHECK-NEXT: [[V_B3:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_B2]], [[BIFR_STR]] - // CHECK-NEXT: [[V_B4:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_B3]], [[BIFR_STR]] - // CHECK-NEXT: store i32 [[V_B4]], i32 addrspace(4)* %d - - int e = __builtin_intel_fpga_reg( __builtin_intel_fpga_reg( a+b )); - // CHECK: [[V_AB1:%.*]] = load i32, i32 addrspace(4)* %a - // CHECK-NEXT: [[V_AB2:%.*]] = load i32, i32 addrspace(4)* %b - // CHECK-NEXT: [[V_AB3:%.*]] = add nsw i32 [[V_AB1]], [[V_AB2]] - // CHECK-NEXT: [[V_AB4:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_AB3]], [[BIFR_STR]] - // CHECK-NEXT: [[V_AB5:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_AB4]], [[BIFR_STR]] - // CHECK-NEXT: store i32 [[V_AB5]], i32 addrspace(4)* %e - - int f; - f = __builtin_intel_fpga_reg(a); - // CHECK: [[V_F1:%.*]] = load i32, i32 addrspace(4)* %a - // CHECK-NEXT: [[V_F2:%.*]] = call i32 @llvm.annotation.i32.p1i8(i32 [[V_F1]], [[BIFR_STR]] - // CHECK-NEXT: store i32 [[V_F2]], i32 addrspace(4)* %f -} - -void structs() { - // CHECK: [[S1:%.*]] = alloca [[T_ST]], align 4 - // CHECK-NEXT: [[S2:%.*]] = alloca [[T_ST]], align 4 - // CHECK-NEXT: [[S3:%.*]] = alloca [[T_ST]], align 4 - // CHECK-NEXT: [[REF_TMP:%.*]] = alloca [[T_ST]], align 4 - // CHECK-NEXT: [[S1_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S1]] to [[T_ST]] addrspace(4)* - // CHECK-NEXT: [[S2_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S2]] to [[T_ST]] addrspace(4)* - // CHECK-NEXT: [[S3_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[S3]] to [[T_ST]] addrspace(4)* - // CHECK-NEXT: [[REF_TMP_ASCAST:%.*]] = addrspacecast [[T_ST]]* [[REF_TMP]] to [[T_ST]] addrspace(4)* - struct st s1; - - struct st s2 = __builtin_intel_fpga_reg(s1); - // CHECK: [[TMP_S1:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_S2:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S1_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S1]], i8 addrspace(4)* align 4 [[TMP_S2]], i64 12, i1 false) - // CHECK-NEXT: [[TMP_S3:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_S4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 addrspace(4)* [[TMP_S3]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_S5:%.*]] = bitcast i8 addrspace(4)* [[TMP_S4]] to [[T_ST]] addrspace(4)* - - struct st s3; - s3 = __builtin_intel_fpga_reg(s2); - // CHECK: [[TMP_S6:%.*]] = bitcast [[T_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_S7:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S6]], i8 addrspace(4)* align 4 [[TMP_S7]], i64 12, i1 false) - // CHECK-NEXT: [[TMP_S8:%.*]] = bitcast [[T_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_S9:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 addrspace(4)* [[TMP_S8]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_S10:%.*]] = bitcast i8 addrspace(4)* [[TMP_S9]] to [[T_ST]] addrspace(4)* - // CHECK-NEXT: [[TMP_S11:%.*]] = bitcast [[T_ST]] addrspace(4)* [[S3_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_S12:%.*]] = bitcast [[T_ST]] addrspace(4)* [[REF_TMP_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_S11]], i8 addrspace(4)* align 4 [[TMP_S12]], i64 12, i1 false) -} - -void unions() { - // CHECK: [[U1:%.*]] = alloca [[T_UN]], align 4 - // CHECK-NEXT: [[U2:%.*]] = alloca [[T_UN]], align 4 - // CHECK-NEXT: [[REF_TMP2:%.*]] = alloca [[T_UN]], align 4 - // CHECK-NEXT: [[U1_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[U1]] to [[T_UN]] addrspace(4)* - // CHECK-NEXT: [[U2_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[U2]] to [[T_UN]] addrspace(4)* - // CHECK-NEXT: [[REF_TMP2_ASCAST:%.*]] = addrspacecast [[T_UN]]* [[REF_TMP2]] to [[T_UN]] addrspace(4)* - union un u1; - union un u2; - - u2 = __builtin_intel_fpga_reg(u1); - // CHECK: [[TMP_U1:%.*]] = bitcast [[T_UN]] addrspace(4)* [[REF_TMP2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_U2:%.*]] = bitcast [[T_UN]] addrspace(4)* [[U1_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_U1]], i8 addrspace(4)* align 4 [[TMP_U2]], i64 4, i1 false) - // CHECK-NEXT: [[TMP_U3:%.*]] = bitcast [[T_UN]] addrspace(4)* [[REF_TMP2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_U4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 addrspace(4)* [[TMP_U3]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_U5:%.*]] = bitcast i8 addrspace(4)* [[TMP_U4]] to [[T_UN]] addrspace(4)* - // CHECK-NEXT: [[TMP_U6:%.*]] = bitcast [[T_UN]] addrspace(4)* [[U2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_U7:%.*]] = bitcast [[T_UN]] addrspace(4)* [[REF_TMP2_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_U6]], i8 addrspace(4)* align 4 [[TMP_U7]], i64 4, i1 false) -} - -void classes() { - // CHECK: [[CA:%.*]] = alloca [[T_CL:%.*]], align 4 - // CHECK-NEXT: [[CB:%.*]] = alloca [[T_CL]], align 4 - // CHECK-NEXT: [[CA_ASCAST:%.*]] = addrspacecast [[T_CL]]* [[CA]] to [[T_CL]] addrspace(4)* - // CHECK-NEXT: [[CB_ASCAST:%.*]] = addrspacecast [[T_CL]]* [[CB]] to [[T_CL]] addrspace(4)* - A ca(213); - - A cb = __builtin_intel_fpga_reg(ca); - // CHECK: [[TMP_C1:%.*]] = bitcast [[T_CL]] addrspace(4)* [[CB_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_C2:%.*]] = bitcast [[T_CL]] addrspace(4)* [[CA_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[TMP_C1]], i8 addrspace(4)* align 4 [[TMP_C2]], i64 4, i1 false) - // CHECK-NEXT: [[TMP_C3:%.*]] = bitcast [[T_CL]] addrspace(4)* [[CB_ASCAST]] to i8 addrspace(4)* - // CHECK-NEXT: [[TMP_C4:%.*]] = call i8 addrspace(4)* @llvm.ptr.annotation.p4i8.p1i8(i8 addrspace(4)* [[TMP_C3]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_C5:%.*]] = bitcast i8 addrspace(4)* [[TMP_C4]] to [[T_CL]] addrspace(4)* -} - -void pointers() { - int v; - int *pv = &v; - int *pv2 = __builtin_intel_fpga_reg(pv); - // CHECK: [[TMP_P1:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* %pv.ascast, align 8 - // CHECK-NEXT: [[TMP_P2:%[0-9]+]] = ptrtoint i32 addrspace(4)* [[TMP_P1]] to i64 - // CHECK-NEXT: [[TMP_P3:%[0-9]+]] = call i64 @llvm.annotation.i64.p1i8(i64 [[TMP_P2]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_P4:%[0-9]+]] = inttoptr i64 [[TMP_P3]] to i32 addrspace(4)* - // CHECK-NEXT: store i32 addrspace(4)* [[TMP_P4]], i32 addrspace(4)* addrspace(4)* %pv2.ascast, align 8 - - struct st s; - struct st *ps = __builtin_intel_fpga_reg(&s); - // CHECK: [[TMP_P5:%.*]] = ptrtoint [[T_ST]] addrspace(4)* %s.ascast to i64 - // CHECK-NEXT: [[TMP_P6:%.*]] = call i64 @llvm.annotation.i64.p1i8(i64 [[TMP_P5]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_P7:%.*]] = inttoptr i64 [[TMP_P6]] to [[T_ST]] addrspace(4)* - // CHECK-NEXT: store [[T_ST]] addrspace(4)* [[TMP_P7]], [[T_ST]] addrspace(4)* addrspace(4)* %ps.ascast, align 8 - - union un u, *pu; - pu = __builtin_intel_fpga_reg(&u); - // CHECK: [[TMP_P8:%.*]] = ptrtoint [[T_UN]] addrspace(4)* %u.ascast to i64 - // CHECK-NEXT: [[TMP_P9:%.*]] = call i64 @llvm.annotation.i64.p1i8(i64 [[TMP_P8]], [[BIFR_STR]] - // CHECK-NEXT: [[TMP_P10:%.*]] = inttoptr i64 [[TMP_P9]] to [[T_UN]] addrspace(4)* - // CHECK-NEXT: store [[T_UN]] addrspace(4)* [[TMP_P10]], [[T_UN]] addrspace(4)* addrspace(4)* %pu.ascast, align 8 -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([]() { - scalars(); - structs(); - unions(); - classes(); - pointers(); - }); - return 0; -} - diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-restrict.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-restrict.cpp deleted file mode 100644 index 3057ca67d9389..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-restrict.cpp +++ /dev/null @@ -1,28 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device %s -no-opaque-pointers -emit-llvm -sycl-std=2017 -triple spir64-unknown-unknown -o - | FileCheck %s - -template -__attribute__((sycl_kernel)) void kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - int *a; - int *b; - int *c; - kernel( - [ a, b, c ]() [[intel::kernel_args_restrict]] { c[0] = a[0] + b[0]; }); - // CHECK: define {{.*}}spir_kernel {{.*}}kernel_restrict(i32 addrspace(1)* noalias noundef align 4 %{{.*}}, i32 addrspace(1)* noalias noundef align 4 %{{.*}}, i32 addrspace(1)* noalias noundef align 4 %{{.*}}) - - int *d; - int *e; - int *f; - - kernel( - [d, e, f]() { f[0] = d[0] + e[0]; }); - // CHECK: define {{.*}}spir_kernel {{.*}}kernel_norestrict(i32 addrspace(1)* noundef align 4 %{{.*}}, i32 addrspace(1)* noundef align 4 %{{.*}}, i32 addrspace(1)* noundef align 4 %{{.*}}) - - int g = 42; - kernel( - [ a, b, c, g ]() [[intel::kernel_args_restrict]] { c[0] = a[0] + b[0] + g; }); - // CHECK: define {{.*}}spir_kernel {{.*}}kernel_restrict_other_types(i32 addrspace(1)* noalias noundef align 4 %{{.*}}, i32 addrspace(1)* noalias noundef align 4 %{{.*}}, i32 addrspace(1)* noalias noundef align 4 %{{.*}}, i32 noundef %{{.*}}) -} diff --git a/clang/test/CodeGenSYCL/no_opaque_intel-sycl-ptr-annotation-builtin.cpp b/clang/test/CodeGenSYCL/no_opaque_intel-sycl-ptr-annotation-builtin.cpp deleted file mode 100644 index 615011ddc12d3..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_intel-sycl-ptr-annotation-builtin.cpp +++ /dev/null @@ -1,103 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-linux -disable-llvm-passes -no-opaque-pointers -emit-llvm -internal-isystem %S/Inputs %s -o - | FileCheck %s - -#include "sycl.hpp" -class kernel; -// CHECK: [[STRUCT:%.*]] = type { i32, float } -struct State { - int x; - float y; -}; - -// CHECK-DAG: [[ANN1:@.str[\.]*[0-9]*]] = {{.*}}"testA\00" -// CHECK-DAG: [[ANN2:@.str[\.]*[0-9]*]] = {{.*}}"testB\00" -// CHECK-DAG: [[ANN3:@.str[\.]*[0-9]*]] = {{.*}}"0\00" -// CHECK-DAG: [[ANN4:@.str[\.]*[0-9]*]] = {{.*}}"127\00" -// CHECK-DAG: [[ANN5:@.str[\.]*[0-9]*]] = {{.*}}"testG\00" -// CHECK-DAG: [[ANN6:@.str[\.]*[0-9]*]] = {{.*}}"testH\00" -// CHECK-DAG: [[ARG1:@.args[\.]*[0-9]*]] = {{.*}}[[ANN1]]{{.*}}[[ANN3]] -// CHECK-DAG: [[ARG2:@.args[\.]*[0-9]*]] = {{.*}}[[ANN2]]{{.*}}[[ANN4]] -// CHECK-DAG: [[ARG3:@.args[\.]*[0-9]*]] = {{.*}}[[ANN5]]{{.*}}[[ANN3]] -// CHECK-DAG: [[ARG4:@.args[\.]*[0-9]*]] = {{.*}}[[ANN6]]{{.*}}[[ANN3]] - -// CHECK: define {{.*}}spir_func void @{{.*}}(float addrspace(4)* noundef %A, i32 addrspace(4)* noundef %B, [[STRUCT]] addrspace(4)* noundef %C, [[STRUCT]] addrspace(4)*{{.*}}%D) -void foo(float *A, int *B, State *C, State &D) { - float *x; - int *y; - State *z; - double *f; - - // CHECK-DAG: [[Aaddr:%.*]] = alloca float addrspace(4)* - // CHECK-DAG: [[Baddr:%.*]] = alloca i32 addrspace(4)* - // CHECK-DAG: [[Caddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - // CHECK-DAG: [[Daddr:%.*]] = alloca [[STRUCT]] addrspace(4)* - - // CHECK-DAG: [[A:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR1:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A]]{{.*}}[[ARG1]]{{.*}} - // CHECK-DAG: store float addrspace(4)* [[PTR1]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_sycl_ptr_annotation(A, "testA", 0); - - // CHECK-DAG: [[B:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR2:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B]]{{.*}}[[ARG1]]{{.*}} - // CHECK-DAG: store i32 addrspace(4)* [[PTR2]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_sycl_ptr_annotation(B, "testA", 0); - - // CHECK-DAG: [[C:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR3:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C]]{{.*}}[[ARG1]]{{.*}} - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR3]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_sycl_ptr_annotation(C, "testA", 0); - - // CHECK-DAG: [[A2:%[0-9]+]] = load float addrspace(4)*, float addrspace(4)* addrspace(4)* [[Aaddr]] - // CHECK-DAG: [[PTR4:%[0-9]+]] = call float addrspace(4)* @llvm.ptr.annotation{{.*}}[[A2]]{{.*}}[[ARG2]]{{.*}} - // CHECK-DAG: store float addrspace(4)* [[PTR4]], float addrspace(4)* addrspace(4)* %x - x = __builtin_intel_sycl_ptr_annotation(A, "testB", 127); - - // CHECK-DAG: [[B2:%[0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[Baddr]] - // CHECK-DAG: [[PTR5:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[B2]]{{.*}}[[ARG2]]{{.*}} - // CHECK-DAG: store i32 addrspace(4)* [[PTR5]], i32 addrspace(4)* addrspace(4)* %y - y = __builtin_intel_sycl_ptr_annotation(B, "testB", 127); - - // CHECK-DAG: [[C2:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Caddr]] - // CHECK-DAG: [[PTR6:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[C2]]{{.*}}[[ARG2]]{{.*}} - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR6]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_sycl_ptr_annotation(C, "testB", 127); - - // CHECK-DAG: [[D:%[0-9]+]] = load [[STRUCT]] addrspace(4)*, [[STRUCT]] addrspace(4)* addrspace(4)* [[Daddr]] - // CHECK-DAG: [[PTR7:%[0-9]+]] = call [[STRUCT]] addrspace(4)* @llvm.ptr.annotation{{.*}}[[D]]{{.*}}[[ARG2]]{{.*}} - // CHECK-DAG: store [[STRUCT]] addrspace(4)* [[PTR7]], [[STRUCT]] addrspace(4)* addrspace(4)* %z - z = __builtin_intel_sycl_ptr_annotation(&D, "testB", 127); -} - -// This check makes sure the generated LoadInst consumes the annotated ptr directly -// CHECK: define {{.*}}spir_func noundef i32 @{{.*}}(i32 addrspace(4)* noundef %g) -int annotation_with_load(int* g) { - // CHECK: [[PTR13:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[ARG3]]{{.*}} - // CHECK: load i32, i32 addrspace(4)* [[PTR13]] - return *__builtin_intel_sycl_ptr_annotation(g, "testG", 0); -} - -// This check makes sure the generated StoreInst consumes the annotated ptr directly -// CHECK: define {{.*}}spir_func void @{{.*}}(i32 addrspace(4)* noundef %h) -void annotation_with_store(int* h) { - // CHECK: [[PTR14:%[0-9]+]] = call i32 addrspace(4)* @llvm.ptr.annotation{{.*}}[[ARG4]]{{.*}} - // CHECK: store i32 1, i32 addrspace(4)* [[PTR14]] - *__builtin_intel_sycl_ptr_annotation(h, "testH", 0) = 1; -} - -int main() { - sycl::queue q; - q.submit([&](sycl::handler &h) { - h.single_task([=](){ - float *A; - int *B; - State *C; - State D; - foo(A, B, C, D); - - int *a; - annotation_with_load(a); - annotation_with_store(a); - }); - }); - return 0; -} - diff --git a/clang/test/CodeGenSYCL/no_opaque_invoke-function-addrspace.cpp b/clang/test/CodeGenSYCL/no_opaque_invoke-function-addrspace.cpp deleted file mode 100644 index 0aa779c769efd..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_invoke-function-addrspace.cpp +++ /dev/null @@ -1,31 +0,0 @@ -// RUN: %clang_cc1 -sycl-std=2020 -fsycl-is-device -fsycl-allow-func-ptr -internal-isystem %S/Inputs -disable-llvm-passes -triple spir64-unknown-unknown -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s - -// Test that the type of function object invoked from the kernel has -// the right address space. - -#include "sycl.hpp" - -using namespace sycl; -queue q; - -// CHECK: define dso_local spir_func noundef i32 @{{.*}}bar10{{.*}}() -[[intel::device_indirectly_callable]] int bar10() { return 10; } - -// CHECK: define linkonce_odr spir_func noundef i32 @{{.*}}invoke_function{{.*}}(i32 ()* noundef nonnull %f) -template -auto invoke_function(Callable &&f) { - // CHECK: %f.addr = alloca i32 ()*, align 8 - // CHECK: %f.addr.ascast = addrspacecast i32 ()** %f.addr to i32 ()* addrspace(4)* - // CHECK: store i32 ()* %f, i32 ()* addrspace(4)* %f.addr.ascast, align 8 - // CHECK: %0 = load i32 ()*, i32 ()* addrspace(4)* %f.addr.ascast, align 8 - // CHECK: %call = call spir_func noundef i32 %0() - return f(); -} - -int main() { - kernel_single_task( - [=]() { - invoke_function(bar10); - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-arg-accessor-pointer.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-arg-accessor-pointer.cpp deleted file mode 100644 index 95d6b687a0d58..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-arg-accessor-pointer.cpp +++ /dev/null @@ -1,170 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks if the metadata "kernel-arg-runtime-aligned" -// is generated if the kernel captures an accessor. - -#include "sycl.hpp" - -using namespace sycl; - -queue q; - -int main() { - - using Accessor = - accessor; - Accessor acc[2]; - - accessor readOnlyAccessor; - - accessor - acc3; - - local_accessor acc4; - - // kernel_A parameters : int*, sycl::range<1>, sycl::range<1>, sycl::id<1>, - // int*, sycl::range<1>, sycl::range<1>,sycl::id<1>. - q.submit([&](handler &h) { - h.single_task([=]() { - acc[1].use(); - }); - }); - - // kernel_readOnlyAcc parameters : int*, sycl::range<1>, sycl::range<1>, sycl::id<1>. - q.submit([&](handler &h) { - h.single_task([=]() { - readOnlyAccessor.use(); - }); - }); - - // kernel_B parameters : none. - q.submit([&](handler &h) { - h.single_task([=]() { - int result = 5; - }); - }); - - int a = 10; - - // kernel_C parameters : int. - q.submit([&](handler &h) { - h.single_task([=]() { - int x = a; - }); - }); - - // Using raw pointers to represent USM pointers. - // kernel_arg_runtime_aligned is not generated for raw pointers. - int *x; - float *y; - q.submit([&](handler &h) { - h.single_task([=]() { - *x = 42; - *y = 3.14; - }); - }); - - // Using local accessor as a kernel parameter. - // kernel_arg_runtime_aligned is generated for pointers from local accessors. - q.submit([&](handler &h) { - h.single_task([=]() { - acc3.use(); - }); - }); - - // Using local accessor as a kernel parameter. - // kernel_arg_runtime_aligned is generated for pointers from local accessors. - q.submit([&](handler &h) { - h.single_task([=]() { - acc4.use(); - }); - }); - - // kernel_acc_raw_ptr parameters : int*, sycl::range<1>, sycl::range<1>, sycl::id<1>, int*. - int *rawPtr; - q.submit([&](handler &h) { - h.single_task([=]() { - readOnlyAccessor.use(); - *rawPtr = 10; - }); - }); - - // Check if kernel_arg_accessor_ptr metadata is generated for ESIMD kernels that capture - // an accessor. - q.submit([&](handler &h) { - h.single_task([=]() __attribute__((sycl_explicit_simd)) { - readOnlyAccessor.use(); - }); - }); -} - -// Check kernel_A parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_A -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]], -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG2:%[a-zA-Z0-9_]+4]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE2:%[a-zA-Z0-9_]+6]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE2:%[a-zA-Z0-9_]+7]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET2:%[a-zA-Z0-9_]+8]]) -// CHECK-SAME: !kernel_arg_runtime_aligned ![[#RTALIGNED1:]] - -// Check kernel_readOnlyAcc parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_readOnlyAcc -// CHECK-SAME: i32 addrspace(1)* noundef readonly align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]] -// CHECK-SAME: !kernel_arg_runtime_aligned ![[#RTALIGNED2:]] - -// Check kernel_B parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_B -// CHECK-NOT: kernel_arg_runtime_aligned - -// Check kernel_C parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_C -// CHECK-SAME: i32 noundef [[MEM_ARG1:%[a-zA-Z0-9_]+]] -// CHECK-NOT: kernel_arg_runtime_aligned - -// Check usm_ptr parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}usm_ptr -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: float addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]] -// CHECK-NOT: kernel_arg_runtime_aligned - -// CHECK: define {{.*}}spir_kernel void @{{.*}}localAccessorDep -// CHECK-SAME: float addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range.5"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range.5"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id.6"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]] -// CHECK-SAME: !kernel_arg_runtime_aligned ![[#RTALIGNED2]] - -// CHECK: define {{.*}}spir_kernel void @{{.*}}localAccessor -// CHECK-SAME: float addrspace(3)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range.5"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range.5"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id.6"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]] -// CHECK-SAME: !kernel_arg_runtime_aligned ![[#RTALIGNED2]] - -// Check kernel_acc_raw_ptr parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_acc_raw_ptr -// CHECK-SAME: i32 addrspace(1)* noundef readonly align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]] -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]] -// CHECK-SAME: !kernel_arg_runtime_aligned ![[#RTALIGNED3:]] - -// Check esimd_kernel_with_acc parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}esimd_kernel_with_acc -// CHECK-SAME: !kernel_arg_accessor_ptr - -// Check kernel-arg-runtime-aligned metadata. -// The value of any metadata element is 1 for any kernel arguments -// that corresponds to the base pointer of an accessor and 0 otherwise. -// CHECK: ![[#RTALIGNED1]] = !{i1 true, i1 false, i1 false, i1 false, i1 true, i1 false, i1 false, i1 false} -// CHECK: ![[#RTALIGNED2]] = !{i1 true, i1 false, i1 false, i1 false} -// CHECK: ![[#RTALIGNED3]] = !{i1 true, i1 false, i1 false, i1 false, i1 false} diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-device-space-arg.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-device-space-arg.cpp deleted file mode 100644 index 1c95b3f55ebec..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-device-space-arg.cpp +++ /dev/null @@ -1,16 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -no-opaque-pointers -emit-llvm %s -disable-llvm-passes -o - | FileCheck %s - -// CHECK: define {{.*}}spir_kernel void @_ZTSZ4mainE15kernel_function(i32 addrspace(5)* {{.*}} i32 addrspace(6)* {{.*}} - -#include "Inputs/sycl.hpp" - -int main() { - __attribute__((opencl_global_device)) int *GLOBDEV = nullptr; - __attribute__((opencl_global_host)) int *GLOBHOST = nullptr; - sycl::kernel_single_task( - [=]() { - __attribute__((opencl_global_device)) int *DevPtr = GLOBDEV; - __attribute__((opencl_global_host)) int *HostPtr = GLOBHOST; - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-handler.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-handler.cpp deleted file mode 100644 index cf80fcdb15580..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-handler.cpp +++ /dev/null @@ -1,38 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple nvptx64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s --check-prefixes=ALL,NONATIVESUPPORT -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s --check-prefixes=ALL,NATIVESUPPORT - -// This test checks IR generated when kernel_handler argument -// (used to handle SYCL 2020 specialization constants) is passed -// by kernel - -#include "sycl.hpp" - -using namespace sycl; - -void test(int val) { - queue q; - q.submit([&](handler &h) { - int a; - kernel_handler kh; - h.single_task( - [=](auto) { - int local = a; - }, - kh); - }); -} - -// ALL: define dso_local{{ spir_kernel | }}void @{{.*}}test_kernel_handler{{[^(]*}} -// ALL-SAME: (i32 noundef %_arg_a, i8 addrspace(1)* noundef align 1 %_arg__specialization_constants_buffer) -// ALL: %kh = alloca %"class.sycl::_V1::kernel_handler", align 1 - -// NONATIVESUPPORT: %[[KH:[0-9]+]] = load i8 addrspace(1)*, i8 addrspace(1)** %_arg__specialization_constants_buffer.addr, align 8 -// NONATIVESUPPORT: %[[ADDRSPACECAST:[0-9]+]] = addrspacecast i8 addrspace(1)* %[[KH]] to i8* -// NONATIVESUPPORT: call void @{{.*}}__init_specialization_constants_buffer{{.*}}(%"class.sycl::_V1::kernel_handler"* noundef nonnull align 1 dereferenceable(1) %kh, i8* noundef %[[ADDRSPACECAST]]) - -// NATIVESUPPORT-NOT: load i8 addrspace(1)*, i8 addrspace(1)** %_arg__specialization_constants_buffer.addr, align 8 -// NATIVESUPPORT-NOT: addrspacecast i8 addrspace(1)* %{{[0-9]+}} to i8* -// NATIVESUPPORT-NOT: call void @{{.*}}__init_specialization_constants_buffer{{.*}}(%"class.sycl::_V1::kernel_handler"* noundef align 4 nonnull align 1 dereferenceable(1) %kh, i8* noundef align 4 %{{[0-9]+}}) - -// ALL: call{{ spir_func | }}void @{{[a-zA-Z0-9_$]+}}kernel_handler{{[a-zA-Z0-9_$]+}} -// ALL-SAME: noundef byval(%"class.sycl::_V1::kernel_handler") diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-param-acc-array.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-param-acc-array.cpp deleted file mode 100644 index 10ed0a1f268f7..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-param-acc-array.cpp +++ /dev/null @@ -1,90 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks a kernel argument that is an Accessor array - -#include "Inputs/sycl.hpp" - -using namespace sycl; - -template -__attribute__((sycl_kernel)) void a_kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - - using Accessor = - accessor; - Accessor acc[2]; - - a_kernel( - [=]() { - acc[1].use(); - }); -} - -// Check kernel_A parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_A -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]], -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG2:%[a-zA-Z0-9_]+4]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[ACC_RANGE2:%[a-zA-Z0-9_]+6]], -// CHECK-SAME: %"struct.sycl::_V1::range"* noundef byval{{.*}}align 4 [[MEM_RANGE2:%[a-zA-Z0-9_]+7]], -// CHECK-SAME: %"struct.sycl::_V1::id"* noundef byval{{.*}}align 4 [[OFFSET2:%[a-zA-Z0-9_]+8]]) - -// CHECK alloca for pointer arguments -// CHECK: [[MEM_ARG1:%[a-zA-Z0-9_.]+]] = alloca i32 addrspace(1)*, align 8 -// CHECK: [[MEM_ARG2:%[a-zA-Z0-9_.]+]] = alloca i32 addrspace(1)*, align 8 - -// CHECK lambda object alloca -// CHECK: [[LOCAL_OBJECTA:%__SYCLKernel]] = alloca %class.anon, align 4 - -// CHECK allocas for ranges -// CHECK: [[ACC_RANGE1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[MEM_RANGE1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[OFFSET1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::id" -// CHECK: [[ACC_RANGE2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[MEM_RANGE2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[OFFSET2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::id" - -// CHECK lambda object addrspacecast -// CHECK: [[LOCAL_OBJECT:%.*]] = addrspacecast %class.anon* [[LOCAL_OBJECTA]] to %class.anon addrspace(4)* - -// CHECK addrspacecasts for ranges -// CHECK: [[ACC_RANGE1AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[ACC_RANGE1A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[MEM_RANGE1AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[MEM_RANGE1A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[OFFSET1AS:%.*]] = addrspacecast %"struct.sycl::_V1::id"* [[OFFSET1A]] to %"struct.sycl::_V1::id" addrspace(4)* -// CHECK: [[ACC_RANGE2AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[ACC_RANGE2A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[MEM_RANGE2AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[MEM_RANGE2A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[OFFSET2AS:%.*]] = addrspacecast %"struct.sycl::_V1::id"* [[OFFSET2A]] to %"struct.sycl::_V1::id" addrspace(4)* -// CHECK accessor array default inits -// CHECK: [[ACCESSOR_ARRAY1:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[BEGIN:%[a-zA-Z0-9._]*]] = getelementptr inbounds [2 x [[ACCESSOR:.*]]], [2 x [[ACCESSOR]]] addrspace(4)* [[ACCESSOR_ARRAY1]], i64 0, i64 0 -// Clang takes advantage of element 1 having the same address as the array, so it doesn't do a GEP. -// CTOR Call #1 -// CHECK: call spir_func void @{{.+}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[BEGIN]]) -// CHECK: [[ELEM2_GEP:%[a-zA-Z0-9_.]+]] = getelementptr inbounds [[ACCESSOR]], [[ACCESSOR]] addrspace(4)* [[BEGIN]], i64 1 -// CTOR Call #2 -// CHECK: call spir_func void @{{.+}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[ELEM2_GEP]]) - -// CHECK acc[0] __init method call -// CHECK: [[ACCESSOR_ARRAY1:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[INDEX1:%[a-zA-Z0-9._]*]] = getelementptr inbounds [2 x [[ACCESSOR]]], [2 x [[ACCESSOR]]] addrspace(4)* [[ACCESSOR_ARRAY1]], i64 0, i64 0 -// CHECK load from kernel pointer argument alloca -// CHECK: [[MEM_LOAD1:%[a-zA-Z0-9_]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[MEM_ARG1]] -// CHECK: [[ACC_RANGE1:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[ACC_RANGE1AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[MEM_RANGE1:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[MEM_RANGE1AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[OFFSET1:%.*]] = addrspacecast %"struct.sycl::_V1::id" addrspace(4)* [[OFFSET1AS]] to %"struct.sycl::_V1::id"* -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[INDEX1]], i32 addrspace(1)* noundef [[MEM_LOAD1]], %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE1]], %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE1]], %"struct.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET1]]) - -// CHECK acc[1] __init method call -// CHECK: [[ACCESSOR_ARRAY2:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[INDEX2:%[a-zA-Z0-9._]*]] = getelementptr inbounds [2 x [[ACCESSOR]]], [2 x [[ACCESSOR]]] addrspace(4)* [[ACCESSOR_ARRAY2]], i64 0, i64 1 -// CHECK load from kernel pointer argument alloca -// CHECK: [[MEM_LOAD2:%[a-zA-Z0-9_]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[MEM_ARG2]] -// CHECK: [[ACC_RANGE2:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[ACC_RANGE2AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[MEM_RANGE2:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[MEM_RANGE2AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[OFFSET2:%.*]] = addrspacecast %"struct.sycl::_V1::id" addrspace(4)* [[OFFSET2AS]] to %"struct.sycl::_V1::id"* -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%"class.sycl::_V1::accessor" addrspace(4)* {{[^,]*}} [[INDEX2]], i32 addrspace(1)* noundef [[MEM_LOAD2]], %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE2]], %"struct.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE2]], %"struct.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET2]]) diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-param-member-acc-array.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-param-member-acc-array.cpp deleted file mode 100644 index 3d4041aae186d..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-param-member-acc-array.cpp +++ /dev/null @@ -1,94 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -fsycl-int-header=%t.h -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks a kernel with struct parameter that contains an Accessor array. - -#include "Inputs/sycl.hpp" - -using namespace sycl; - -template -__attribute__((sycl_kernel)) void a_kernel(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - - using Accessor = - accessor; - - struct struct_acc_t { - Accessor member_acc[2]; - } struct_acc; - - a_kernel( - [=]() { - struct_acc.member_acc[1].use(); - }); -} - -// CHECK kernel_C parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_C -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+1]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE1:%[a-zA-Z0-9_]+2]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET1:%[a-zA-Z0-9_]+3]], -// CHECK-SAME: i32 addrspace(1)* noundef align 4 [[MEM_ARG2:%[a-zA-Z0-9_]+4]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE2:%[a-zA-Z0-9_]+6]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE2:%[a-zA-Z0-9_]+7]], -// CHECK-SAME: %"struct{{.*}}.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET2:%[a-zA-Z0-9_]+8]]) - -// Check alloca for pointer arguments -// CHECK: [[MEM_ARG1]].addr{{[0-9]*}} = alloca i32 addrspace(1)*, align 8 -// CHECK: [[MEM_ARG1]].addr{{[0-9]*}} = alloca i32 addrspace(1)*, align 8 - -// Check lambda object alloca -// CHECK: [[LOCAL_OBJECTA:%__SYCLKernel]] = alloca %class{{.*}}.anon, align 4 - -// Check allocas for ranges -// CHECK: [[ACC_RANGE1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[MEM_RANGE1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[OFFSET1A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::id" -// CHECK: [[ACC_RANGE2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[MEM_RANGE2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::range" -// CHECK: [[OFFSET2A:%[a-zA-Z0-9_.]+]] = alloca %"struct.sycl::_V1::id" - -// Check lambda object addrspacecast -// CHECK: [[LOCAL_OBJECT:%.*]] = addrspacecast %class{{.*}}.anon* %__SYCLKernel to %class{{.*}}.anon addrspace(4)* - -// Check addrspacecast for ranges -// CHECK: [[ACC_RANGE1AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[ACC_RANGE1A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[MEM_RANGE1AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[MEM_RANGE1A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[OFFSET1AS:%.*]] = addrspacecast %"struct.sycl::_V1::id"* [[OFFSET1A]] to %"struct.sycl::_V1::id" addrspace(4)* -// CHECK: [[ACC_RANGE2AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[ACC_RANGE2A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[MEM_RANGE2AS:%.*]] = addrspacecast %"struct.sycl::_V1::range"* [[MEM_RANGE2A]] to %"struct.sycl::_V1::range" addrspace(4)* -// CHECK: [[OFFSET2AS:%.*]] = addrspacecast %"struct.sycl::_V1::id"* [[OFFSET2A]] to %"struct.sycl::_V1::id" addrspace(4)* - -// CHECK accessor array default inits -// CHECK: [[ACCESSOR_WRAPPER:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[ACCESSOR_ARRAY1:%[a-zA-Z0-9_.]+]] = getelementptr inbounds %struct{{.*}}.struct_acc_t, %struct{{.*}}.struct_acc_t addrspace(4)* [[ACCESSOR_WRAPPER]], i32 0, i32 0 -// CHECK: [[BEGIN:%[a-zA-Z0-9._]*]] = getelementptr inbounds [2 x [[ACCESSOR:.*]]], [2 x [[ACCESSOR]]] addrspace(4)* [[ACCESSOR_ARRAY1]], i64 0, i64 0 -// CTOR Call #1 -// CHECK: call spir_func void @{{.+}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[BEGIN]]) -// CHECK: [[ELEM2_GEP:%[a-zA-Z0-9_.]+]] = getelementptr inbounds [[ACCESSOR]], [[ACCESSOR]] addrspace(4)* [[BEGIN]], i64 1 -// CTOR Call #2 -// CHECK: call spir_func void @{{.+}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[ELEM2_GEP]]) - -// Check acc[0] __init method call -// CHECK: [[GEP_LAMBDA1:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[GEP_MEMBER_ACC1:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}.struct_acc_t, %struct{{.*}}.struct_acc_t addrspace(4)* [[GEP_LAMBDA1]], i32 0, i32 0 -// CHECK: [[ARRAY_IDX1:%[a-zA-Z0-9._]*]] = getelementptr inbounds [2 x [[ACCESSOR]]], [2 x [[ACCESSOR]]] addrspace(4)* [[GEP_MEMBER_ACC1]], i64 0, i64 0 -// CHECK: [[MEM_LOAD1:%[a-zA-Z0-9_]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[MEM_ARG1]].addr -// CHECK: [[ACC_RANGE1:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[ACC_RANGE1AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[MEM_RANGE1:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[MEM_RANGE1AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[OFFSET1:%.*]] = addrspacecast %"struct.sycl::_V1::id" addrspace(4)* [[OFFSET1AS]] to %"struct.sycl::_V1::id"* -// CHECK: call spir_func void @{{.*}}__init{{.*}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[ARRAY_IDX1]], i32 addrspace(1)* noundef [[MEM_LOAD1]], %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE1]], %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE1]], %"struct{{.*}}.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET1]]) - -// Check acc[1] __init method call -// CHECK: [[GEP_LAMBDA2:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* [[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: [[GEP_MEMBER_ACC2:%[a-zA-Z0-9_]+]] = getelementptr inbounds %struct{{.*}}.struct_acc_t, %struct{{.*}}.struct_acc_t addrspace(4)* [[GEP_LAMBDA2]], i32 0, i32 0 -// CHECK: [[ARRAY_IDX2:%[a-zA-Z0-9_]*]] = getelementptr inbounds [2 x [[ACCESSOR]]], [2 x [[ACCESSOR]]] addrspace(4)* [[GEP_MEMBER_ACC2]], i64 0, i64 1 -// CHECK: [[MEM_LOAD2:%[a-zA-Z0-9_]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[MEM_ARG1]].addr -// CHECK: [[ACC_RANGE2:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[ACC_RANGE2AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[MEM_RANGE2:%.*]] = addrspacecast %"struct.sycl::_V1::range" addrspace(4)* [[MEM_RANGE2AS]] to %"struct.sycl::_V1::range"* -// CHECK: [[OFFSET2:%.*]] = addrspacecast %"struct.sycl::_V1::id" addrspace(4)* [[OFFSET2AS]] to %"struct.sycl::_V1::id"* -// CHECK: call spir_func void @{{.*}}__init{{.*}}([[ACCESSOR]] addrspace(4)* {{[^,]*}} [[ARRAY_IDX2]], i32 addrspace(1)* noundef [[MEM_LOAD2]], %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[ACC_RANGE2]], %"struct{{.*}}.sycl::_V1::range"* noundef byval({{.*}}) align 4 [[MEM_RANGE2]], %"struct{{.*}}.sycl::_V1::id"* noundef byval({{.*}}) align 4 [[OFFSET2]]) diff --git a/clang/test/CodeGenSYCL/no_opaque_kernel-param-pod-array.cpp b/clang/test/CodeGenSYCL/no_opaque_kernel-param-pod-array.cpp deleted file mode 100644 index 7d010475e42a3..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_kernel-param-pod-array.cpp +++ /dev/null @@ -1,135 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks a kernel with an argument that is a POD array. - -#include "Inputs/sycl.hpp" - -using namespace sycl; - -template -__attribute__((sycl_kernel)) void a_kernel(const Func &kernelFunc) { - kernelFunc(); -} - -struct foo_inner { - int foo_inner_x; - int foo_inner_y; -}; - -struct foo { - int foo_a; - foo_inner foo_b[2]; - int foo_c; -}; - -int main() { - - int a[2]; - int array_2D[2][1]; - foo struct_array[2]; - - a_kernel( - [=]() { - int local = a[1]; - }); - - a_kernel( - [=]() { - foo local = struct_array[1]; - }); - - a_kernel( - [=]() { - int local = array_2D[0][0]; - }); -} - -// Check kernel_B parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_B -// CHECK-SAME:(%struct{{.*}}.__wrapper_class* noundef byval(%struct{{.*}}.__wrapper_class) align 4 %[[ARR_ARG:.*]]) - -// Check local lambda object alloca -// CHECK: %[[LOCAL_OBJECTA:[a-zA-Z0-9_]+]] = alloca %class{{.*}}.anon, align 4 -// CHECK: %[[LOCAL_OBJECT:[a-zA-Z0-9_.]+]] = addrspacecast %class{{.*}}.anon* %[[LOCAL_OBJECTA]] to %class{{.*}}.anon addrspace(4)* - -// Check for Array init loop -// CHECK: %[[LAMBDA_PTR:.+]] = getelementptr inbounds %class{{.*}}.anon, %class{{.*}}.anon addrspace(4)* %[[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: %[[WRAPPER_PTR:.+]] = getelementptr inbounds %struct{{.*}}.__wrapper_class, %struct{{.*}}.__wrapper_class addrspace(4)* %[[ARR_ARG]].ascast, i32 0, i32 0 -// CHECK: %[[ARRAY_BEGIN:.+]] = getelementptr inbounds [2 x i32], [2 x i32] addrspace(4)* %[[LAMBDA_PTR]], i64 0, i64 0 -// CHECK: br label %[[ARRAYINITBODY:.+]] - -// The loop body itself -// CHECK: [[ARRAYINITBODY]]: -// CHECK: %[[ARRAYINDEX:.+]] = phi i64 [ 0, %{{.*}} ], [ %[[NEXTINDEX:.+]], %[[ARRAYINITBODY]] ] -// CHECK: %[[TARG_ARRAY_ELEM:.+]] = getelementptr inbounds i32, i32 addrspace(4)* %[[ARRAY_BEGIN]], i64 %[[ARRAYINDEX]] -// CHECK: %[[SRC_ELEM:.+]] = getelementptr inbounds [2 x i32], [2 x i32] addrspace(4)* %[[WRAPPER_PTR]], i64 0, i64 %[[ARRAYINDEX]] -// CHECK: %[[SRC_VAL:.+]] = load i32, i32 addrspace(4)* %[[SRC_ELEM]] -// CHECK: store i32 %[[SRC_VAL]], i32 addrspace(4)* %[[TARG_ARRAY_ELEM]] -// CHECK: %[[NEXTINDEX]] = add nuw i64 %[[ARRAYINDEX]], 1 -// CHECK: %[[ISDONE:.+]] = icmp eq i64 %[[NEXTINDEX]], 2 -// CHECK: br i1 %[[ISDONE]], label %{{.*}}, label %[[ARRAYINITBODY]] - -// Check kernel_C parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_C -// CHECK-SAME:(%struct{{.*}}.__wrapper_class{{.*}}* noundef byval(%struct{{.*}}.__wrapper_class{{.*}}) align 4 %[[ARR_ARG:.*]]) - -// Check local lambda object alloca -// CHECK: %[[LOCAL_OBJECTA:[a-zA-Z0-9_]+]] = alloca %class{{.*}}.anon{{.*}}, align 4 -// CHECK: %[[LOCAL_OBJECT:[a-zA-Z0-9_.]+]] = addrspacecast %class{{.*}}.anon{{.*}}* %[[LOCAL_OBJECTA]] to %class{{.*}}.anon{{.*}} addrspace(4)* - -// Check for Array init loop -// CHECK: %[[LAMBDA_PTR:.+]] = getelementptr inbounds %class{{.*}}.anon{{.*}}, %class{{.*}}.anon{{.*}} addrspace(4)* %[[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: %[[WRAPPER_PTR:.+]] = getelementptr inbounds %struct{{.*}}.__wrapper_class{{.*}}, %struct{{.*}}.__wrapper_class{{.*}} addrspace(4)* %[[ARR_ARG]].ascast, i32 0, i32 0 -// CHECK: %[[ARRAY_BEGIN:.+]] = getelementptr inbounds [2 x %struct{{.*}}.foo], [2 x %struct{{.*}}.foo] addrspace(4)* %[[LAMBDA_PTR]], i64 0, i64 0 -// CHECK: br label %[[ARRAYINITBODY:.+]] - -// The loop body itself -// CHECK: [[ARRAYINITBODY]]: -// CHECK: %[[ARRAYINDEX:.+]] = phi i64 [ 0, %{{.*}} ], [ %[[NEXTINDEX:.+]], %[[ARRAYINITBODY]] ] -// CHECK: %[[TARG_ARRAY_ELEM:.+]] = getelementptr inbounds %struct{{.*}}.foo, %struct{{.*}}.foo addrspace(4)* %[[ARRAY_BEGIN]], i64 %[[ARRAYINDEX]] -// CHECK: %[[SRC_ELEM:.+]] = getelementptr inbounds [2 x %struct{{.*}}.foo], [2 x %struct{{.*}}.foo] addrspace(4)* %[[WRAPPER_PTR]], i64 0, i64 %[[ARRAYINDEX]] -// CHECK: %[[TARG_PTR:.+]] = bitcast %struct{{.*}}.foo addrspace(4)* %[[TARG_ARRAY_ELEM]] to i8 addrspace(4)* -// CHECK: %[[SRC_PTR:.+]] = bitcast %struct{{.*}}.foo addrspace(4)* %[[SRC_ELEM]] to i8 addrspace(4)* -// call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 %[[TARG_PTR]], i8 addrspace(4)* align %[[SRC_PTR]], i64 24, i1 false) -// CHECK: %[[NEXTINDEX]] = add nuw i64 %[[ARRAYINDEX]], 1 -// CHECK: %[[ISDONE:.+]] = icmp eq i64 %[[NEXTINDEX]], 2 -// CHECK: br i1 %[[ISDONE]], label %{{.*}}, label %[[ARRAYINITBODY]] - -// Check kernel_D parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_D -// CHECK-SAME:(%struct{{.*}}.__wrapper_class{{.*}}* noundef byval(%struct{{.*}}.__wrapper_class{{.*}}) align 4 %[[ARR_ARG:.*]]) - -// Check local lambda object alloca -// CHECK: %[[LOCAL_OBJECTA:[a-zA-Z0-9_]+]] = alloca %class{{.*}}.anon{{.*}}, align 4 -// CHECK: %[[LOCAL_OBJECT:[a-zA-Z0-9_.]+]] = addrspacecast %class{{.*}}.anon{{.*}}* %[[LOCAL_OBJECTA]] to %class{{.*}}.anon{{.*}} addrspace(4)* - -// Check for Array init loop -// CHECK: %[[LAMBDA_PTR:.+]] = getelementptr inbounds %class{{.*}}.anon{{.*}}, %class{{.*}}.anon{{.*}} addrspace(4)* %[[LOCAL_OBJECT]], i32 0, i32 0 -// CHECK: %[[WRAPPER_PTR:.+]] = getelementptr inbounds %struct{{.*}}.__wrapper_class{{.*}}, %struct{{.*}}.__wrapper_class{{.*}} addrspace(4)* %[[ARR_ARG]].ascast, i32 0, i32 0 -// CHECK: %[[ARRAY_BEGIN:.+]] = getelementptr inbounds [2 x [1 x i32]], [2 x [1 x i32]] addrspace(4)* %[[LAMBDA_PTR]], i64 0, i64 0 -// CHECK: br label %[[ARRAYINITBODY:.+]] - -// Check Outer loop. -// CHECK: [[ARRAYINITBODY]]: -// CHECK: %[[ARRAYINDEX:.+]] = phi i64 [ 0, %{{.*}} ], [ %[[NEXTINDEX:.+]], %[[ARRAYINITEND:.+]] ] -// CHECK: %[[TARG_OUTER_ELEM:.+]] = getelementptr inbounds [1 x i32], [1 x i32] addrspace(4)* %[[ARRAY_BEGIN]], i64 %[[ARRAYINDEX]] -// CHECK: %[[SRC_OUTER_ELEM:.+]] = getelementptr inbounds [2 x [1 x i32]], [2 x [1 x i32]] addrspace(4)* %[[WRAPPER_PTR]], i64 0, i64 %[[ARRAYINDEX]] -// CHECK: %[[ARRAY_BEGIN_INNER:.+]] = getelementptr inbounds [1 x i32], [1 x i32] addrspace(4)* %[[TARG_OUTER_ELEM]], i64 0, i64 0 -// CHECK: br label %[[ARRAYINITBODY_INNER:.+]] - -// Check Inner Loop -// CHECK: [[ARRAYINITBODY_INNER]]: -// CHECK: %[[ARRAYINDEX_INNER:.+]] = phi i64 [ 0, %{{.*}} ], [ %[[NEXTINDEX_INNER:.+]], %[[ARRAYINITBODY_INNER:.+]] ] -// CHECK: %[[TARG_INNER_ELEM:.+]] = getelementptr inbounds i32, i32 addrspace(4)* %[[ARRAY_BEGIN_INNER]], i64 %[[ARRAYINDEX_INNER]] -// CHECK: %[[SRC_INNER_ELEM:.+]] = getelementptr inbounds [1 x i32], [1 x i32] addrspace(4)* %[[SRC_OUTER_ELEM]], i64 0, i64 %[[ARRAYINDEX_INNER]] -// CHECK: %[[SRC_LOAD:.+]] = load i32, i32 addrspace(4)* %[[SRC_INNER_ELEM]] -// CHECK: store i32 %[[SRC_LOAD]], i32 addrspace(4)* %[[TARG_INNER_ELEM]] -// CHECK: %[[NEXTINDEX_INNER]] = add nuw i64 %[[ARRAYINDEX_INNER]], 1 -// CHECK: %[[ISDONE_INNER:.+]] = icmp eq i64 %[[NEXTINDEX_INNER]], 1 -// CHECK: br i1 %[[ISDONE_INNER]], label %[[ARRAYINITEND]], label %[[ARRAYINITBODY_INNER]] - -// Check Inner loop 'end' -// CHECK: [[ARRAYINITEND]]: -// CHECK: %[[NEXTINDEX]] = add nuw i64 %[[ARRAYINDEX]], 1 -// CHECK: %[[ISDONE:.+]] = icmp eq i64 %[[NEXTINDEX]], 2 -// CHECK: br i1 %[[ISDONE]], label %{{.*}}, label %[[ARRAYINITBODY]] diff --git a/clang/test/CodeGenSYCL/no_opaque_max-concurrency.cpp b/clang/test/CodeGenSYCL/no_opaque_max-concurrency.cpp deleted file mode 100644 index a04db80f9f520..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_max-concurrency.cpp +++ /dev/null @@ -1,141 +0,0 @@ -// RUN: %clang_cc1 -O2 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -disable-llvm-passes -triple spir64-unknown-unknown -sycl-std=2020 -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s - -#include "sycl.hpp" - -// CHECK-LABEL: define{{.*}}@_Z15max_concurrencyILi5EEvv() -// CHECK: entry: -// CHECK: [[A:%.*]] = alloca [10 x i32], align 4 -// CHECK: [[A_CAST:%.*]] = addrspacecast [10 x i32]* [[A]] to [10 x i32] addrspace(4)* -// CHECK: %4 = load i32, i32 addrspace(4)* %i.ascast, align 4 -// CHECK: [[IDXPROM:%*]] = sext i32 %4 to i64 -// CHECK: %arrayidx = getelementptr inbounds [10 x i32], [10 x i32] addrspace(4)* [[A_CAST]], i64 0, i64 [[IDXPROM]] -// CHECK: store i32 0, i32 addrspace(4)* %arrayidx, align 4 -// CHECK: [[TMP2:%.*]] = load i32, i32 addrspace(4)* %i.ascast, align 4 -// CHECK: %inc = add nsw i32 [[TMP2]], 1 -// CHECK: store i32 %inc, i32 addrspace(4)* %i.ascast, align 4 -// CHECK: br label %for.cond, !llvm.loop ![[MD_MC:[0-9]+]] -// CHECK: store i32 %inc10, i32 addrspace(4)* %i1.ascast, align 4 -// CHECK: br label %for.cond2, !llvm.loop ![[MD_MC_1:[0-9]+]] -// CHECK: ret void - -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name1() [[ATTR0:#[0-9]+]] {{.*}} !max_concurrency ![[NUM1:[0-9]+]] -// CHECK: entry: -// CHECK: [[F1:%.*]] = alloca [[CLASS_F1:%.*]], align 1 -// CHECK: [[F1_ASCAST:%.*]] = addrspacecast [[CLASS_F1]]* [[F1]] to [[CLASS_F1]] addrspace(4)* -// CHECK: [[TMP0:%.*]] = bitcast [[CLASS_F1]]* [[F1]] to i8* -// CHECK: call void @llvm.lifetime.start.p0i8(i64 1, i8* [[TMP0]]) -// CHECK: call spir_func void @_ZNK8Functor1clEv([[CLASS_F1]] addrspace(4)* noundef align 1 dereferenceable_or_null(1) [[F1_ASCAST]]) -// CHECK: [[TMP1:%.*]] = bitcast [[CLASS_F1]]* [[F1]] to i8* -// CHECK: call void @llvm.lifetime.end.p0i8(i64 1, i8* [[TMP1]]) -// CHECK: ret void - -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name4() [[ATTR0]] {{.*}} !max_concurrency ![[NUM1:[0-9]+]] -// CHECK: entry -// CHECK: [[F3:%.*]] = alloca [[CLASS_F3:%.*]], align 1 -// CHECK: [[F3_ASCAST:%.*]] = addrspacecast [[CLASS_F3]]* [[F3]] to [[CLASS_F3]] addrspace(4)* -// CHECK: [[TMP2:%.*]] = bitcast [[CLASS_F3]]* [[F3]] to i8* -// CHECK: call void @llvm.lifetime.start.p0i8(i64 1, i8* [[TMP2]]) -// CHECK: call spir_func void @_ZNK8Functor3ILi4EEclEv([[CLASS_F3]] addrspace(4)* noundef align 1 dereferenceable_or_null(1) [[F3_ASCAST]]) -// CHECK: [[TMP3:%.*]] = bitcast [[CLASS_F3]]* [[F3]] to i8* -// CHECK: call void @llvm.lifetime.end.p0i8(i64 1, i8* [[TMP3]] -// CHECK: ret void - -// CHECK: define linkonce_odr spir_func void @_ZNK8Functor3ILi4EEclEv -// CHECK: entry: -// CHECK: [[ADDR_1:%.*]] = alloca [[CLASS_F3:%.*]] addrspace(4)*, align 8 -// CHECK: [[ADDR1_CAST:%.*]] = addrspacecast [[CLASS_F3]] addrspace(4)** [[ADDR_1]] to [[CLASS_F3]] addrspace(4)* addrspace(4)* -// CHECK: store [[CLASS_F3]] addrspace(4)* %this, [[CLASS_F3]] addrspace(4)* addrspace(4)* [[ADDR1_CAST]], align 8 -// CHECK: %this1 = load [[CLASS_F3]] addrspace(4)*, [[CLASS_F3]] addrspace(4)* addrspace(4)* [[ADDR1_CAST]], align 8 -// CHECK: ret void - -// CHECK: define dso_local spir_kernel void @_ZTSZZ4mainENKUlRN4sycl3_V17handlerEE_clES2_E12kernel_name5() -// CHECK: entry: -// CHECK: [[H1:%.*]] = alloca [[H:%.*]], align 1 -// CHECK: [[H2:%.*]] = addrspacecast [[H]]* [[H1]] to [[H]] addrspace(4)* -// CHECK: [[H3:%.*]] = bitcast [[H]]* [[H1]] to i8* -// CHECK: call void @llvm.lifetime.start.p0i8(i64 1, i8* [[H3]]) -// CHECK: call spir_func void @_ZZZ4mainENKUlRN4sycl3_V17handlerEE_clES2_ENKUlvE_clEv([[H]] addrspace(4)* noundef align 1 dereferenceable_or_null(1) [[H2]]) -// CHECK: [[TMP4:%.*]] = bitcast [[H]]* [[H1]] to i8* -// CHECK: call void @llvm.lifetime.end.p0i8(i64 1, i8* [[TMP4]]) -// CHECK: ret void - -// CHECK: define {{.*}}spir_func void @_ZZZ4mainENKUlRN4sycl3_V17handlerEE_clES2_ENKUlvE_clEv -// CHECK: entry: -// CHECK: [[ADDR_1:%.*]] = alloca [[HH:%.*]] addrspace(4)*, align 8 -// CHECK: [[ADDR1_CAST:%.*]] = addrspacecast [[HH]] addrspace(4)** [[ADDR_1]] to [[HH]] addrspace(4)* addrspace(4)* -// CHECK: store [[HH]] addrspace(4)* %this, [[HH]] addrspace(4)* addrspace(4)* [[ADDR1_CAST]], align 8 -// CHECK: %this1 = load [[HH]] addrspace(4)*, [[HH]] addrspace(4)* addrspace(4)* [[ADDR1_CAST]], align 8 -// CHECK: call spir_func void @_Z4funcILi2EEvv() -// CHECK: ret void - -template -void max_concurrency() { - int a[10]; - // CHECK: ![[MD_MC]] = distinct !{![[MD_MC]], ![[MP:[0-9]+]], ![[MD_max_concurrency:[0-9]+]]} - // CHECK-NEXT: ![[MP]] = !{!"llvm.loop.mustprogress"} - // CHECK-NEXT: ![[MD_max_concurrency]] = !{!"llvm.loop.max_concurrency.count", i32 5} - [[intel::max_concurrency(A)]] for (int i = 0; i != 10; ++i) - a[i] = 0; - // CHECK: ![[MD_MC_1]] = distinct !{![[MD_MC_1]], ![[MP]], ![[MD_max_concurrency_1:[0-9]+]]} - // CHECK-NEXT: ![[MD_max_concurrency_1]] = !{!"llvm.loop.max_concurrency.count", i32 4} - [[intel::max_concurrency(4)]] for (int i = 0; i != 10; ++i) - a[i] = 0; -} - -// CHECK: ![[NUM1]] = !{i32 4} - -template -__attribute__((sycl_kernel)) void kernel_single_task_1(const Func &kernelFunc) { - kernelFunc(); -} - -using namespace sycl; - -class Functor1 { -public: - [[intel::max_concurrency(4)]] void operator()() const {} -}; - -[[intel::max_concurrency(2)]] void foo() {} - -class Functor2 { -public: - void operator()() const { - foo(); - } -}; -template -class Functor3 { -public: - [[intel::max_concurrency(NT)]] void operator()() const {} -}; - -template -[[intel::max_concurrency(NT)]] void func() {} - -int main() { - queue q; - - kernel_single_task_1([]() { - max_concurrency<5>(); - }); - - q.submit([&](handler &h) { - Functor1 f1; - h.single_task(f1); - - Functor2 f2; - h.single_task(f2); - - Functor3<4> f3; - h.single_task(f3); - - h.single_task([]() { - func<2>(); - }); - - }); - - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_noexcept.cpp b/clang/test/CodeGenSYCL/no_opaque_noexcept.cpp deleted file mode 100644 index b7cd11d5dd96f..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_noexcept.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -I%S \ -// RUN: -fcxx-exceptions -fexceptions -disable-llvm-passes \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-DEVICE -// -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -I%S \ -// RUN: -fcxx-exceptions -fexceptions -disable-llvm-passes \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-HOST-LIN -// -// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc -I%S \ -// RUN: -fcxx-exceptions -fexceptions -disable-llvm-passes \ -// RUN: -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-HOST-WIN - -// The test checks that exception handling code is generated only for host and not for device. - -void f1() {} -void f2() {} -void f3() {} - -void foo_noexcept() noexcept { - // CHECK-DEVICE: call spir_func void @_Z2f1v() - // CHECK-HOST-LIN: call void @_Z2f1v() - // CHECK-HOST-WIN: call void @"?f1@@YAXXZ"() - f1(); -} - -void foo_throw() throw() { - // CHECK-DEVICE: call spir_func void @_Z2f2v() - // CHECK-HOST-LIN: call void @_Z2f2v() - // CHECK-HOST-WIN: call void @"?f3@@YAXXZ"() - f2(); -} - -struct A { - // Non-trivial destructor to force generation of cleanup code - ~A(){} -}; - -void foo_cleanup() { - A a; - // CHECK-DEVICE: call spir_func void @_Z2f3v() - // CHECK-HOST: call void @_Z2f3v() - f3(); - // CHECK-DEVICE: call spir_func void @_ZN1AD1Ev - // Regular + exception cleanup - // CHECK-HOST-LIN: call void @_ZN1AD1Ev - // CHECK-HOST-LIN: call void @_ZN1AD2Ev - // CHECK-HOST-WIN: call void @"??1A@@QEAA@XZ"(%struct.A* {{[^,]*}} %a) -} - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - kernel_single_task([=](){ - foo_noexcept(); - foo_throw(); - foo_cleanup(); - }); -} diff --git a/clang/test/CodeGenSYCL/no_opaque_non-standard-layout.cpp b/clang/test/CodeGenSYCL/no_opaque_non-standard-layout.cpp deleted file mode 100644 index e2708557ba211..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_non-standard-layout.cpp +++ /dev/null @@ -1,21 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -aux-triple x86_64-unknown-windows-unknown -disable-llvm-passes -S -no-opaque-pointers -emit-llvm %s -o - | FileCheck --check-prefix CHK-WIN %s -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -aux-triple x86_64-unknown-linux-unknown -disable-llvm-passes -S -no-opaque-pointers -emit-llvm %s -o - | FileCheck --check-prefix CHK-LIN %s - -#include "Inputs/sycl.hpp" -// CHK-WIN: %struct{{.*}}F = type { i8, i8 } -// CHK-LIN: %struct{{.*}}F = type { i8 } -struct F1 {}; -struct F2 {}; -struct F : F1, F2 { - char x; -}; - -int main() { - sycl::accessor accessorA; - sycl::handler cgh; - cgh.single_task( - [=]() { - accessorA.use(); - }); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_nontrivial_device_copyable.cpp b/clang/test/CodeGenSYCL/no_opaque_nontrivial_device_copyable.cpp deleted file mode 100644 index 38129b6219fe4..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_nontrivial_device_copyable.cpp +++ /dev/null @@ -1,36 +0,0 @@ -// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -internal-isystem %S/Inputs -disable-llvm-passes -sycl-std=2020 -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// Tests that SYCL kernel arguments with non-trivially copyable types are -// passed by-valued. - -#include "Inputs/sycl.hpp" -using namespace sycl; - -struct NontriviallyCopyable { - int I; - NontriviallyCopyable(int I) : I(I) {} - NontriviallyCopyable(const NontriviallyCopyable &X) : I(X.I) {} -}; - -void device_func(NontriviallyCopyable X) { - (void)X; -} - -int main() { - NontriviallyCopyable NontriviallyCopyableObject{10}; - - queue Q; - Q.submit([&](handler &CGH) { - CGH.single_task([=]() { - device_func(NontriviallyCopyableObject); - }); - }); -} - -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_name(%struct.NontriviallyCopyable* noundef byval(%struct.NontriviallyCopyable) -// CHECK-NOT: define {{.*}}spir_func void @{{.*}}device_func{{.*}}({{.*}}byval(%struct.NontriviallyCopyable) -// CHECK: define dso_local spir_func void @_Z11device_func20NontriviallyCopyable(%struct.NontriviallyCopyable* noundef %X) -// CHECK: %X.indirect_addr = alloca %struct.NontriviallyCopyable addrspace(4)* -// CHECK: %X.indirect_addr.ascast = addrspacecast %struct.NontriviallyCopyable addrspace(4)** %X.indirect_addr to %struct.NontriviallyCopyable addrspace(4)* addrspace(4)* -// CHECK: %X.ascast = addrspacecast %struct.NontriviallyCopyable* %X to %struct.NontriviallyCopyable addrspace(4)* -// CHECK: store %struct.NontriviallyCopyable addrspace(4)* %X.ascast, %struct.NontriviallyCopyable addrspace(4)* addrspace(4)* %X.indirect_addr.ascast diff --git a/clang/test/CodeGenSYCL/no_opaque_pointers-in-structs.cpp b/clang/test/CodeGenSYCL/no_opaque_pointers-in-structs.cpp deleted file mode 100644 index f5c1c10d8c396..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_pointers-in-structs.cpp +++ /dev/null @@ -1,56 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that compiler generates correct address spaces for pointer -// kernel arguments that are wrapped by struct. Generated class should retain -// original padding and alignment. - -#include "Inputs/sycl.hpp" - -struct A { - float *F; -}; - -struct alignas(16) B { - int *F1; - float *F2; - A F3; - int *F4[2]; -}; - -struct testFieldAlignment { - int *ptr; - alignas(16) float arr[4]; - int data; -}; - -int main() { - B Obj1; - testFieldAlignment Obj2; - sycl::kernel_single_task( - [=]() { - (void)Obj1; - (void)Obj2; - }); - float A = 1; - float *Ptr = &A; - auto Lambda = [=]() { - *Ptr += 1; - }; - sycl::kernel_single_task([=]() { - Lambda(); - }); - return 0; -} - -// Padding in generated class class should match the 'original' padding -// CHECK: %[[GENERATED_B:[a-zA-Z0-9_.]+]] = type { i32 addrspace(1)*, float addrspace(1)*, %[[GENERATED_A:[a-zA-Z0-9_.]+]], [2 x i32 addrspace(1)*], [8 x i8] } -// CHECK: %[[GENERATED_A]] = type { float addrspace(1)* } -// CHECK: %[[GENERATED_TESTFIELDALIGNMENT:[a-zA-Z0-9_.]+]] = type { i32 addrspace(1)*, [8 x i8], [4 x float], i32, [12 x i8] } -// CHECK: %struct.B = type { i32 addrspace(4)*, float addrspace(4)*, %struct.A, [2 x i32 addrspace(4)*], [8 x i8] } -// CHECK: %struct.A = type { float addrspace(4)* } -// %struct.testFieldAlignment = type { i32 addrspace(4)*, [8 x i8], [4 x float], i32, [12 x i8] } -// CHECK: %[[WRAPPER_LAMBDA_PTR:[a-zA-Z0-9_.]+]] = type { float addrspace(1)* } -// CHECK: define {{.*}}spir_kernel void @{{.*}}structs -// CHECK-SAME: %[[GENERATED_B]]* noundef byval(%[[GENERATED_B]]) align 16 %_arg_Obj1 -// CHECK-SAME: %[[GENERATED_TESTFIELDALIGNMENT]]* noundef byval(%[[GENERATED_TESTFIELDALIGNMENT]]) align 16 %_arg_Obj2 -// CHECK: define {{.*}}spir_kernel void @{{.*}}lambdas{{.*}}(%[[WRAPPER_LAMBDA_PTR]]* noundef byval(%[[WRAPPER_LAMBDA_PTR]]) align 8 %_arg_Lambda) diff --git a/clang/test/CodeGenSYCL/no_opaque_regcall-cc-test.cpp b/clang/test/CodeGenSYCL/no_opaque_regcall-cc-test.cpp deleted file mode 100644 index 16fbfa260dd49..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_regcall-cc-test.cpp +++ /dev/null @@ -1,359 +0,0 @@ -// clang-format off -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -O0 -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks SYCL device compiler code generation for the __regcall -// functions. This calling convention makes return values and function arguments -// passed as values (through virtual registers) in most cases. - -// CHECK-DAG: target triple = "spir64-unknown-unknown" - -// ------------------- Positive test cases (pass by value) - -template using raw_vector = - T __attribute__((ext_vector_type(N))); - -template -struct simd { - raw_vector val; -}; - -#ifdef __SYCL_DEVICE_ONLY__ -#define SYCL_DEVICE __attribute__((sycl_device)) -#else -#define SYCL_DEVICE -#endif - -template T __regcall func(T x) { return x.foo(); } - -// === TEST CASE: invoke_simd scenario, when sycl::ext::intel::esimd::simd -// objects used as return value and parameters - -SYCL_DEVICE simd __regcall SCALE(simd v); -// CHECK-DAG: declare x86_regcallcc <8 x float> @_Z17__regcall3__SCALE4simdIfLi8EE(<8 x float>) - -SYCL_DEVICE simd __regcall foo(simd x) { - return SCALE(x); -// CHECK-DAG: %{{[0-9a-zA-Z_.]+}} = call x86_regcallcc <8 x float> @_Z17__regcall3__SCALE4simdIfLi8EE(<8 x float> %{{[0-9a-zA-Z_.]+}}) -} - -// === TEST CASE: nested struct with different types of fields - -struct C { - float x, y; -}; -// CHECK-DAG: %struct.C = type { float, float } - -struct PassAsByval { - C a; - int *b; - raw_vector c; -}; -// CHECK-DAG: %struct.PassAsByval = type { %struct.C, i32 addrspace(4)*, <3 x float> } - -SYCL_DEVICE PassAsByval __regcall bar(PassAsByval x) { -// CHECK-DAG: define dso_local x86_regcallcc %struct.PassAsByval @_Z15__regcall3__bar11PassAsByval(%struct.C %{{[0-9a-zA-Z_.]+}}, i32 addrspace(4)* %{{[0-9a-zA-Z_.]+}}, <3 x float> %{{[0-9a-zA-Z_.]+}}) - x.a.x += 1; - return x; -} - -// === TEST CASE: multi-level nested structs with single primitive type element at the bottom - -struct A1 { char x; }; -struct B1 { A1 a; }; -struct C1 { - B1 b; - C1 foo() { return *this; } -}; -// CHECK-DAG: %struct.C1 = type { %struct.B1 } -// CHECK-DAG: %struct.B1 = type { %struct.A1 } -// CHECK-DAG: %struct.A1 = type { i8 } - -template SYCL_DEVICE C1 __regcall func(C1 x); -// CHECK-DAG: define weak_odr x86_regcallcc i8 @_Z16__regcall3__funcI2C1ET_S1_(i8 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: multi-level nested structs with multiple elements at all levels - -struct A2 { char x; }; -struct B2 { A2 a; int* ptr; }; -struct C2 { - B2 b; - double c; - - C2 foo() { return *this; } -}; - -// CHECK-DAG: %struct.C2 = type { %struct.B2, double } -// CHECK-DAG: %struct.B2 = type { %struct.A2, i32 addrspace(4)* } -// CHECK-DAG: %struct.A2 = type { i8 } - -template SYCL_DEVICE C2 __regcall func(C2 x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.C2 @_Z16__regcall3__funcI2C2ET_S1_(%struct.B2 %{{[0-9a-zA-Z_.]+}}, double %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: multi-level nested structs with one primitive type element at -// the bottom, and one - at the top. The nested struct at the top is expected to -// get "unwrapped" by the compiler evaporating to the single element at the -// bottom. - -struct A3 { char x; }; -struct B3 { A3 a; }; // unwrapped -struct C3 { // unwrapped - B3 b; - char c; - - C3 foo() { return *this; } -}; - -// CHECK-DAG: %struct.C3 = type { %struct.B3, i8 } -// CHECK-DAG: %struct.B3 = type { %struct.A3 } -// CHECK-DAG: %struct.A3 = type { i8 } - -template SYCL_DEVICE C3 __regcall func(C3 x); -// CHECK-DAG: define weak_odr x86_regcallcc i16 @_Z16__regcall3__funcI2C3ET_S1_(i16 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: multi-level nested structs with a pointer field at the top -// level. 1 step-deep unwrapping for a function argument type and no unwrapping -// for the return type is expected to happen. - -struct A4 { char x; }; -struct B4 { A4 a; }; -struct C4 { - B4 b; - int *ptr; - - C4 foo() { return *this; } -}; - -// CHECK-DAG: %struct.C4 = type { %struct.B4, i32 addrspace(4)* } -// CHECK-DAG: %struct.B4 = type { %struct.A4 } -// CHECK-DAG: %struct.A4 = type { i8 } - -template SYCL_DEVICE C4 __regcall func(C4 x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.C4 @_Z16__regcall3__funcI2C4ET_S1_(%struct.B4 %{{[0-9a-zA-Z_.]+}}, i32 addrspace(4)* %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: multi-level nested structs with only leaf fields of primitive -// types. Unwrapping and merging should yield 2 32-bit integers - -struct A5a { char x; char y; }; -struct A5b { char x; char y; }; -struct B5 { A5a a; A5b b; }; -struct C5 { - B5 b1; - B5 b2; - - C5 foo() { return *this; } -}; - -// CHECK-DAG: %struct.C5 = type { %struct.B5, %struct.B5 } -// CHECK-DAG: %struct.B5 = type { %struct.A5a, %struct.A5b } -// CHECK-DAG: %struct.A5a = type { i8, i8 } -// CHECK-DAG: %struct.A5b = type { i8, i8 } - -template SYCL_DEVICE C5 __regcall func(C5 x); -// CHECK-DAG: define weak_odr x86_regcallcc [2 x i32] @_Z16__regcall3__funcI2C5ET_S1_([2 x i32] %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: multi-level nested structs with only leaf fields of primitive -// types. Unwrapping and merging should yield 2 32-bit integers - -struct B6 { int *a; int b; }; -struct C6 { - B6 b; - char x; - char y; - - C6 foo() { return *this; } -}; - -// CHECK-DAG: %struct.C6 = type { %struct.B6, i8, i8 } -// CHECK-DAG: %struct.B6 = type { i32 addrspace(4)*, i32 } - -template SYCL_DEVICE C6 __regcall func(C6 x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.C6 @_Z16__regcall3__funcI2C6ET_S1_(%struct.B6 %{{[0-9a-zA-Z_.]+}}, i8 %{{[0-9a-zA-Z_.]+}}, i8 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: a struct with sizeof() <= 2 is passed as a single 16-bit integer - -struct CharChar { - char a; - char b; - - CharChar foo() { return *this; } -}; -// CHECK-DAG: %struct.CharChar = type { i8, i8 } - -template SYCL_DEVICE CharChar __regcall func(CharChar x); -// CHECK-DAG: define weak_odr x86_regcallcc i16 @_Z16__regcall3__funcI8CharCharET_S1_(i16 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: a struct with sizeof() == 3-4 is passed as single 32-bit integer - -struct ShortShort { - short a; - short b; - - ShortShort foo() { return *this; } -}; -// CHECK-DAG: %struct.ShortShort = type { i16, i16 } - -template SYCL_DEVICE ShortShort __regcall func(ShortShort x); -// CHECK-DAG: define weak_odr x86_regcallcc i32 @_Z16__regcall3__funcI10ShortShortET_S1_(i32 %{{[0-9a-zA-Z_.]+}}) - -struct CharShort { - char a; - short b; - - CharShort foo() { return *this; } -}; -// CHECK-DAG: %struct.CharShort = type { i8, i16 } - -template SYCL_DEVICE CharShort __regcall func(CharShort x); -// CHECK-DAG: define weak_odr x86_regcallcc i32 @_Z16__regcall3__funcI9CharShortET_S1_(i32 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: a struct with primitive single field element is just unwrapped - -struct Char { - char a; - - Char foo() { return *this; } -}; -// CHECK-DAG: %struct.Char = type { i8 } - -template SYCL_DEVICE Char __regcall func(Char x); -// CHECK-DAG: define weak_odr x86_regcallcc i8 @_Z16__regcall3__funcI4CharET_S1_(i8 %{{[0-9a-zA-Z_.]+}}) - -struct Float { - float a; - - Float foo() { return *this; } -}; -// CHECK-DAG: %struct.Float = type { float } - -template SYCL_DEVICE Float __regcall func(Float x); -// CHECK-DAG: define weak_odr x86_regcallcc float @_Z16__regcall3__funcI5FloatET_S1_(float %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: a struct with sizeof() == 5-8 is passed as two 32-bit integers -// 32-bit integers - -struct CharCharShortFloat { - char a, b; - short c; - float d; - - CharCharShortFloat foo() { return *this; } -}; -// CHECK-DAG: %struct.CharCharShortFloat = type { i8, i8, i16, float } - -template SYCL_DEVICE CharCharShortFloat __regcall func(CharCharShortFloat x); -// CHECK-DAG: define weak_odr x86_regcallcc [2 x i32] @_Z16__regcall3__funcI18CharCharShortFloatET_S1_([2 x i32] %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: a struct with some of the fields padded and sizeof() > 8 -// * when passed as argument, it is broken into constituents -// * is returned by value - -struct CharFloatCharShort { - char a; - float b; - char c; - short d; - - CharFloatCharShort foo() { return *this; } -}; - -// CHECK-DAG: %struct.CharFloatCharShort = type { i8, float, i8, i16 } - -template SYCL_DEVICE CharFloatCharShort __regcall func(CharFloatCharShort x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.CharFloatCharShort @_Z16__regcall3__funcI18CharFloatCharShortET_S1_(i8 %{{[0-9a-zA-Z_.]+}}, float %{{[0-9a-zA-Z_.]+}}, i8 %{{[0-9a-zA-Z_.]+}}, i16 %{{[0-9a-zA-Z_.]+}}) - -struct CharDoubleCharLonglong { - char a; - double b; - char c; - long long d; - - CharDoubleCharLonglong foo() { return *this; } -}; - -// CHECK-DAG: %struct.CharDoubleCharLonglong = type { i8, double, i8, i64 } - -template SYCL_DEVICE CharDoubleCharLonglong __regcall func(CharDoubleCharLonglong x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.CharDoubleCharLonglong @_Z16__regcall3__funcI22CharDoubleCharLonglongET_S1_(i8 %{{[0-9a-zA-Z_.]+}}, double %{{[0-9a-zA-Z_.]+}}, i8 %{{[0-9a-zA-Z_.]+}}, i64 %{{[0-9a-zA-Z_.]+}}) - - -// === TEST CASE: a struct of 130x4-byte elements is still passed by value - -struct StillPassThroughRegisters { - // 130 total: - int a, a01, a02, a03, a04, a05, a06, a07, a08, a09, - a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, - a20, a21, a22, a23, a24, a25, a26, a27, a28, a29, - a30, a31, a32, a33, a34, a35, a36, a37, a38, a39, - a40, a41, a42, a43, a44, a45, a46, a47, a48, a49, - a50, a51, a52, a53, a54, a55, a56, a57, a58, a59, - a60, a61, a62, a63, a64, a65, a66, a67, a68, a69, - a70, a71, a72, a73, a74, a75, a76, a77, a78, a79, - a80, a81, a82, a83, a84, a85, a86, a87, a88, a89, - a90, a91, a92, a93, a94, a95, a96, a97, a98, a99, - aa0, aa1, aa2, aa3, aa4, aa5, aa6, aa7, aa8, aa9, - ab0, ab1, ab2, ab3, ab4, ab5, ab6, ab7, ab8, ab9, - ac0, ac1, ac2, ac3, ac4, ac5, ac6, ac7, ac8, ac9; - - StillPassThroughRegisters foo() { return *this; } -}; -// CHECK-DAG: %struct.StillPassThroughRegisters = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } - - -template SYCL_DEVICE StillPassThroughRegisters __regcall func(StillPassThroughRegisters x); -// CHECK-DAG: define weak_odr x86_regcallcc %struct.StillPassThroughRegisters @_Z16__regcall3__funcI25StillPassThroughRegistersET_S1_(i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}) - -// === TEST CASE: class with multiple inheritance is passed by value - -class Class0 { int x0; }; -class Class1 { int x1; }; -class ClassX : public Class0, public Class1 { int x; }; -class ClassY { int y; }; -class ClassXY : public ClassX, public ClassY { - int xy; -public: - ClassXY foo() { return *this; } -}; -// CHECK-DAG: %class.ClassXY = type { %class.ClassX, %class.ClassY, i32 } -// CHECK-DAG: %class.ClassX = type { %class.Class0, %class.Class1, i32 } -// CHECK-DAG: %class.Class0 = type { i32 } -// CHECK-DAG: %class.Class1 = type { i32 } -// CHECK-DAG: %class.ClassY = type { i32 } - -template SYCL_DEVICE ClassXY __regcall func(ClassXY x); -// CHECK-DAG: define weak_odr x86_regcallcc %class.ClassXY @_Z16__regcall3__funcI7ClassXYET_S1_(%class.ClassX %{{[0-9a-zA-Z_.]+}}, %class.ClassY %{{[0-9a-zA-Z_.]+}}, i32 %{{[0-9a-zA-Z_.]+}}) - -// ------------------- Negative test cases (pass via memory) - -// === TEST CASE: no copy constructor -> pass by pointer -struct NonCopyable { - NonCopyable(int a) : a(a) {} - NonCopyable(const NonCopyable&) = delete; - int a; -}; -// CHECK-DAG: %struct.NonCopyable = type { i32 } - -SYCL_DEVICE int __regcall bar(NonCopyable x) { -// CHECK-DAG: define dso_local x86_regcallcc noundef i32 @_Z15__regcall3__bar11NonCopyable(%struct.NonCopyable* noundef %x) - return x.a; -} - -// === TEST CASE: empty struct -> optimize out -struct Empty {}; -// CHECK-DAG: %struct.Empty = type - -SYCL_DEVICE int __regcall bar(Empty x) { -// CHECK-DAG: define dso_local x86_regcallcc noundef i32 @_Z15__regcall3__bar5Empty() - return 10; -} - -// === TEST CASE: struct ends with flexible array -> pass by pointer -struct EndsWithFlexArray { - int a; - int x[]; -}; -// CHECK-DAG: %struct.EndsWithFlexArray = type { i32, [0 x i32] } - -SYCL_DEVICE int __regcall bar(EndsWithFlexArray x) { -// CHECK-DAG: define dso_local x86_regcallcc noundef i32 @_Z15__regcall3__bar17EndsWithFlexArray(%struct.EndsWithFlexArray* noundef byval(%struct.EndsWithFlexArray) align 4 %x) - return x.a; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_sampler.cpp b/clang/test/CodeGenSYCL/no_opaque_sampler.cpp deleted file mode 100644 index ba0d9d37a8487..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_sampler.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck --enable-var-scope %s -// CHECK: define {{.*}}spir_kernel void @{{[a-zA-Z0-9_]+}}(%opencl.sampler_t addrspace(2)* [[SAMPLER_ARG:%[a-zA-Z0-9_]+]]) -// CHECK-NEXT: entry: -// CHECK-NEXT: [[SAMPLER_ARG]].addr = alloca %opencl.sampler_t addrspace(2)*, align 8 -// CHECK: [[ANON:%[a-zA-Z0-9_]+]] = alloca %class.anon, align 8 -// CHECK: [[ANONCAST:%[a-zA-Z0-9_.]+]] = addrspacecast %class.anon* [[ANON]] to %class.anon addrspace(4)* -// CHECK: store %opencl.sampler_t addrspace(2)* [[SAMPLER_ARG]], %opencl.sampler_t addrspace(2)* addrspace(4)* [[SAMPLER_ARG]].addr.ascast, align 8 -// CHECK-NEXT: [[GEP:%[a-zA-z0-9]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[ANONCAST]], i32 0, i32 0 -// CHECK-NEXT: [[LOAD_SAMPLER_ARG:%[0-9]+]] = load %opencl.sampler_t addrspace(2)*, %opencl.sampler_t addrspace(2)* addrspace(4)* [[SAMPLER_ARG]].addr.ascast, align 8 -// CHECK-NEXT: call spir_func void @{{[a-zA-Z0-9_]+}}(%"class.sycl::_V1::sampler" addrspace(4)* {{[^,]*}} [[GEP]], %opencl.sampler_t addrspace(2)* [[LOAD_SAMPLER_ARG]]) -// - -// CHECK: define {{.*}}spir_kernel void @{{[a-zA-Z0-9_]+}}(%opencl.sampler_t addrspace(2)* [[SAMPLER_ARG_WRAPPED:%[a-zA-Z0-9_]+]], i32 noundef [[ARG_A:%[a-zA-Z0-9_]+]]) - -// Check alloca -// CHECK: [[SAMPLER_ARG_WRAPPED]].addr = alloca %opencl.sampler_t addrspace(2)*, align 8 -// CHECK: [[ARG_A]].addr = alloca i32, align 4 -// CHECK: [[LAMBDAA:%[a-zA-Z0-9_]+]] = alloca %class.anon.0, align 8 -// CHECK: [[LAMBDA:%[a-zA-Z0-9_.]+]] = addrspacecast %class.anon.0* [[LAMBDAA]] to %class.anon.0 addrspace(4)* - -// Check argument store -// CHECK: store %opencl.sampler_t addrspace(2)* [[SAMPLER_ARG_WRAPPED]], %opencl.sampler_t addrspace(2)* addrspace(4)* [[SAMPLER_ARG_WRAPPED]].addr.ascast, align 8 -// CHECK: store i32 [[ARG_A]], i32 addrspace(4)* [[ARG_A]].addr.ascast, align 4 - -// Initialize 'a' -// CHECK: [[GEP_LAMBDA:%[a-zA-z0-9]+]] = getelementptr inbounds %class.anon.0, %class.anon.0 addrspace(4)* [[LAMBDA]], i32 0, i32 0 -// CHECK: [[GEP_A:%[a-zA-Z0-9]+]] = getelementptr inbounds %struct.sampler_wrapper, %struct.sampler_wrapper addrspace(4)* [[GEP_LAMBDA]], i32 0, i32 1 -// CHECK: [[LOAD_A:%[0-9]+]] = load i32, i32 addrspace(4)* [[ARG_A]].addr.ascast, align 4 -// CHECK: store i32 [[LOAD_A]], i32 addrspace(4)* [[GEP_A]], align 8 - -// Initialize wrapped sampler 'smpl' -// CHECK: [[GEP_LAMBDA_0:%[a-zA-z0-9]+]] = getelementptr inbounds %class.anon.0, %class.anon.0 addrspace(4)* [[LAMBDA]], i32 0, i32 0 -// CHECK: [[GEP_SMPL:%[a-zA-Z0-9]+]] = getelementptr inbounds %struct.sampler_wrapper, %struct.sampler_wrapper addrspace(4)* [[GEP_LAMBDA_0]], i32 0, i32 0 -// CHECK: [[LOAD_SMPL:%[0-9]+]] = load %opencl.sampler_t addrspace(2)*, %opencl.sampler_t addrspace(2)* addrspace(4)* [[SAMPLER_ARG_WRAPPED]].addr.ascast, align 8 -// CHECK: call spir_func void @{{[a-zA-Z0-9_]+}}(%"class.sycl::_V1::sampler" addrspace(4)* {{.*}}, %opencl.sampler_t addrspace(2)* [[LOAD_SMPL]]) -// -#include "Inputs/sycl.hpp" - -struct sampler_wrapper { - sycl::sampler smpl; - int a; -}; - -template -__attribute__((sycl_kernel)) void kernel_single_task(const KernelType &kernelFunc) { - kernelFunc(); -} - -int main() { - sycl::sampler smplr; - kernel_single_task([=]() { - smplr.use(); - }); - - sampler_wrapper wrappedSampler = {smplr, 1}; - kernel_single_task([=]() { - wrappedSampler.smpl.use(); - }); - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_spir-calling-conv.cpp b/clang/test/CodeGenSYCL/no_opaque_spir-calling-conv.cpp deleted file mode 100644 index 8c914f8919b69..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_spir-calling-conv.cpp +++ /dev/null @@ -1,18 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -int main() { - - // CHECK: define {{.*}}spir_kernel void @_ZTSZ4mainE15kernel_function() - - // CHECK: call spir_func void @_ZZ4mainENKUlvE_clEv(%class.anon addrspace(4)* {{[^,]*}} %{{.+}}) - - // CHECK: define internal spir_func void @_ZZ4mainENKUlvE_clEv(%class.{{.*}}anon addrspace(4)* {{[^,]*}} %this) - - kernel_single_task([]() {}); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_spir-enum.cpp b/clang/test/CodeGenSYCL/no_opaque_spir-enum.cpp deleted file mode 100644 index 456e558cb18b0..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_spir-enum.cpp +++ /dev/null @@ -1,30 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -enum enum_type: int { - A = 0, - B = 1, -}; - -void test(enum_type val) -{ - kernel_single_task([=]() { - //expected-warning@+1{{expression result unused}} - val; - }); -} - -int main() { - - // CHECK: define {{.*}}spir_kernel void @_ZTSZ4test9enum_typeE15kernel_function(i32 noundef %_arg_val) - - // CHECK: getelementptr inbounds %class.anon, %class.anon addrspace(4)* - // CHECK: call spir_func void @_ZZ4test9enum_typeENKUlvE_clEv(%class.anon addrspace(4)* {{[^,]*}} %{{.+}}) - - test( enum_type::B ); - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_stall_enable_device.cpp b/clang/test/CodeGenSYCL/no_opaque_stall_enable_device.cpp deleted file mode 100644 index 8d3a426977288..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_stall_enable_device.cpp +++ /dev/null @@ -1,61 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -internal-isystem %S/Inputs -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s - -// Tests for IR of Intel FPGA [[intel::use_stall_enable_clusters]] function attribute on Device. - -#include "sycl.hpp" - -using namespace sycl; -queue q; - -[[intel::use_stall_enable_clusters]] void func() {} - -struct FuncObj { - [[intel::use_stall_enable_clusters]] void operator()() const {} -}; - -void func1() { - auto lambda = []() [[intel::use_stall_enable_clusters]]{}; - lambda(); -} - -class Foo { -public: - [[intel::use_stall_enable_clusters]] void operator()() const {} -}; - -int main() { - q.submit([&](handler &h) { - // CHECK: define {{.*}}spir_kernel void @{{.*}}test_kernel1() {{.*}} !stall_enable ![[NUM4:[0-9]+]] - // CHECK: define {{.*}}spir_func void @{{.*}}FuncObjclEv(%struct.{{.*}}FuncObj addrspace(4)* noundef align 1 dereferenceable_or_null(1) %this) #2 comdat align 2{{.*}} !stall_enable ![[NUM4]] - h.single_task( - FuncObj()); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}test_kernel2() {{.*}} !stall_enable ![[NUM4]] - // CHECK define {{.*}}spir_func void @{{.*}}FooclEv(%class._ZTS3Foo.Foo addrspace(4)* noundef align 1 dereferenceable_or_null(1) %this) #2 comdat align 2{{.*}} !stall_enable ![[NUM4]] - Foo f; - h.single_task(f); - - // Test attribute is not propagated to the kernel metadata i.e. spir_kernel. - // CHECK: define {{.*}}spir_kernel void @{{.*}}test_kernel3() - // CHECK-NOT: !stall_enable - // CHECK-SAME: { - // CHECK: define {{.*}}spir_func void @{{.*}}func{{.*}} !stall_enable ![[NUM4]] - h.single_task( - []() { func(); }); - - // Test attribute is not propagated to the kernel metadata i.e. spir_kernel. - // CHECK: define {{.*}}spir_kernel void @{{.*}}test_kernel4() - // CHECK-NOT: !stall_enable - // CHECK-SAME: { - // CHECK: define {{.*}}spir_func void @{{.*}}func1{{.*}}(%class.anon{{.*}} addrspace(4)* noundef align 1 dereferenceable_or_null(1) %this) #2 align 2{{.*}} !stall_enable ![[NUM4]] - h.single_task( - []() { func1(); }); - - // CHECK: define {{.*}}spir_kernel void @{{.*}}test_kernel5() {{.*}} !stall_enable ![[NUM4]] - h.single_task( - []() [[intel::use_stall_enable_clusters]]{}); - }); - return 0; -} - -// CHECK: ![[NUM4]] = !{i32 1} diff --git a/clang/test/CodeGenSYCL/no_opaque_stream.cpp b/clang/test/CodeGenSYCL/no_opaque_stream.cpp deleted file mode 100644 index d4e1c981c3f07..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_stream.cpp +++ /dev/null @@ -1,37 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o %t.ll -// RUN: FileCheck < %t.ll --enable-var-scope %s -// -// CHECK: %[[RANGE_TYPE:"struct.*sycl::_V1::range"]] -// CHECK: %[[ID_TYPE:"struct.*sycl::_V1::id"]] - -// CHECK: define dso_local spir_kernel void @{{.*}}StreamTester -// CHECK-SAME: i8 addrspace(1)* noundef align 1 [[ACC_DATA:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC_RANGE1:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) align 4 [[ACC_RANGE2:%[a-zA-Z0-9_]+]], -// CHECK-SAME: %[[ID_TYPE]]* noundef byval(%[[ID_TYPE]]) align 4 [[ACC_ID:%[a-zA-Z0-9_]+]], -// CHECK-SAME: i32 noundef [[ACC_INT:%[a-zA-Z0-9_]+]]) - -// Alloca and addrspace casts for kernel parameters -// CHECK: [[ARG:%[a-zA-Z0-9_]+]].addr = alloca i8 addrspace(1)*, align 8 -// CHECK: [[ARG]].addr.ascast = addrspacecast i8 addrspace(1)** [[ARG]].addr to i8 addrspace(1)* addrspace(4)* -// CHECK: store i8 addrspace(1)* [[ARG]], i8 addrspace(1)* addrspace(4)* [[ARG]].addr.ascast, align 8 -// CHECK: [[ARG_LOAD:%[a-zA-Z0-9_]+]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(4)* [[ARG]].addr.ascast, align 8 - -// Check __init and __finalize method calls -// CHECK: call spir_func void @{{.*}}__init{{.*}}(%{{.*}}sycl::_V1::stream" addrspace(4)* noundef align 4 dereferenceable_or_null(16) %{{[a-zA-Z0-9_]+}}, i8 addrspace(1)* noundef [[ARG_LOAD]], %[[RANGE_TYPE]]* noundef byval(%[[RANGE_TYPE]]) {{.*}}%{{.*}} -// CHECK: call spir_func void @_ZN4sycl3_V16stream10__finalizeEv(%{{.*}}sycl::_V1::stream" addrspace(4)* noundef align 4 dereferenceable_or_null(16) %{{[a-zA-Z0-9_]+}}) - -#include "Inputs/sycl.hpp" - -int main() { - sycl::queue Q; - Q.submit([&](sycl::handler &CGH) { - sycl::stream Stream(1024, 128, CGH); - - CGH.single_task([=]() { - Stream << "one" << "two"; - }); - }); - - return 0; -} diff --git a/clang/test/CodeGenSYCL/no_opaque_sycl-device-alias.cpp b/clang/test/CodeGenSYCL/no_opaque_sycl-device-alias.cpp deleted file mode 100644 index a4741ce00372a..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_sycl-device-alias.cpp +++ /dev/null @@ -1,45 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -// Test that aliasing does not force an unused entity to be emitted - -// CHECK-NOT: define {{.*}}spir_func void @unused_func() -extern "C" void unused_func() {} -// CHECK-NOT: @unused_aliaser -extern "C" void unused_aliaser() __attribute__((alias("unused_func"))); -// CHECK-NOT: @unused_int -int unused_int = 3; -// CHECK-NOT: @alias_unused_int -extern int alias_unused_int __attribute__((alias("unused_int"))); - -// CHECK-DAG: define {{.*}}spir_func void @used_func() -extern "C" void used_func() {} -// CHECK-DAG: @aliaser = {{.*}}alias void (), void ()* @used_func -extern "C" void aliaser() __attribute__((alias("used_func"))); - -// CHECK-DAG: define {{.*}}spir_func void @func() -extern "C" void func() {} -// CHECK-DAG: @used_aliaser = {{.*}}alias void (), void ()* @func -extern "C" void used_aliaser() __attribute__((alias("func"))); - -// CHECK-DAG: @used_int = {{.*}}addrspace(1) constant i32 5, align 4 -extern "C" const int used_int = 5; -// CHECK-DAG: @alias_used_int = {{.*}}alias i32, i32 addrspace(1)* @used_int -extern "C" const int alias_used_int __attribute__((alias("used_int"))); -// CHECK-DAG: @vint = {{.*}}addrspace(1) constant i32 7, align 4 -extern "C" const int vint = 7; -// CHECK-DAG: @used_alias_used_int = {{.*}}alias i32, i32 addrspace(1)* @vint -extern "C" const int used_alias_used_int __attribute__((alias("vint"))); - -// CHECK-DAG: define {{.*}}spir_func void @{{.*}}bar{{.*}} -void bar(const int &i) {} - -// CHECK-DAG: define {{.*}}spir_func void @{{.*}}foo{{.*}} -void __attribute__((sycl_device)) foo() { - // CHECK-DAG: call spir_func void @{{.*}}bar{{.*}}@used_int - bar(used_int); - // CHECK-DAG: call spir_func void @{{.*}}bar{{.*}}@used_alias_used_int - bar(used_alias_used_int); - // CHECK-DAG: call spir_func void @used_func() - used_func(); - // CHECK-DAG: call spir_func void @used_aliaser() - used_aliaser(); -} diff --git a/clang/test/CodeGenSYCL/no_opaque_union-kernel-param.cpp b/clang/test/CodeGenSYCL/no_opaque_union-kernel-param.cpp deleted file mode 100644 index a9092aae39e91..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_union-kernel-param.cpp +++ /dev/null @@ -1,42 +0,0 @@ -// RUN: %clang_cc1 -fno-sycl-force-inline-kernel-lambda -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks a kernel argument that is union with both array and non-array fields. - -#include "Inputs/sycl.hpp" - -using namespace sycl; - -union MyUnion { - int FldInt; - char FldChar; - float FldArr[3]; -}; - -template -__attribute__((sycl_kernel)) void a_kernel(Func kernelFunc) { - kernelFunc(); -} - -int main() { - - MyUnion obj; - - a_kernel( - [=]() { - float local = obj.FldArr[2]; - }); -} - -// CHECK kernel_A parameters -// CHECK: define {{.*}}spir_kernel void @{{.*}}kernel_A(%union.MyUnion* noundef byval(%union.MyUnion) align 4 [[MEM_ARG:%[a-zA-Z0-9_]+]]) - -// Check lambda object alloca -// CHECK: [[LOCAL_OBJECT:%__SYCLKernel]] = alloca %class.anon, align 4 - -// CHECK: [[LOCAL_OBJECTAS:%.*]] = addrspacecast %class.anon* [[LOCAL_OBJECT]] to %class.anon addrspace(4)* -// CHECK: [[MEM_ARGAS:%.*]] = addrspacecast %union.MyUnion* [[MEM_ARG]] to %union.MyUnion addrspace(4)* -// CHECK: [[L_STRUCT_ADDR:%[a-zA-Z0-9_]+]] = getelementptr inbounds %class.anon, %class.anon addrspace(4)* [[LOCAL_OBJECTAS]], i32 0, i32 0 -// CHECK: [[MEMCPY_DST:%[0-9a-zA-Z_]+]] = bitcast %union.{{.*}}MyUnion addrspace(4)* [[L_STRUCT_ADDR]] to i8 addrspace(4)* -// CHECK: [[MEMCPY_SRC:%[0-9a-zA-Z_]+]] = bitcast %union.{{.*}}MyUnion addrspace(4)* [[MEM_ARGAS]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 4 [[MEMCPY_DST]], i8 addrspace(4)* align 4 [[MEMCPY_SRC]], i64 12, i1 false) -// CHECK: call spir_func void @{{.*}}(%class.anon addrspace(4)* {{[^,]*}} [[LOCAL_OBJECTAS]]) diff --git a/clang/test/CodeGenSYCL/no_opaque_unique-stable-id.cpp b/clang/test/CodeGenSYCL/no_opaque_unique-stable-id.cpp deleted file mode 100644 index 632888709fac2..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_unique-stable-id.cpp +++ /dev/null @@ -1,215 +0,0 @@ -// RUN: %clang_cc1 -triple x86_64-linux-pc -fsycl-is-host -disable-llvm-passes -std=c++17 -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK -// RUN: %clang_cc1 -triple x86_64-linux-pc -fsycl-is-host -disable-llvm-passes -std=c++17 -no-opaque-pointers -emit-llvm -fsycl-unique-prefix=THE_PREFIX %s -o - | FileCheck %s --check-prefixes=PREFIX,CHECK - -// A set of tests to validate the naming behavior of -// __builtin_sycl_unique_stable_id, both as it is altered by a kernel being -// named/instantiated, and for internal/global linkage. - -#include "Inputs/sycl.hpp" - -// Typically local statics are internal global symbols. -// CHECK: @[[FUNC_VAR:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZZ4FuncvE7FuncVar\00" - -// CHECK: @[[GLOBAL_INT:.+]] = private unnamed_addr constant{{.+}} c"_Z9GlobalInt\00" - -// Static/constexpr in global cause these to be local to the TU. -// CHECK: @[[STATIC_GLOBAL_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZL15StaticGlobalInt\00" - -// CHECK: @[[CONSTEXPR_GLOBAL_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZL18ConstexprGlobalInt\00" - -// CHECK: @[[STATIC_CONSTEXPR_GLOBAL_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZL24StaticConstexprGlobalInt\00" - - -// Named-Namespace scope works the same as the global namespace. -// CHECK: @[[NS_INT:.+]] = private unnamed_addr constant{{.+}} c"_ZN2NS5NSIntE\00" - -// Static/constexpr in global cause these to be local to the TU. -// CHECK: @[[STATIC_NS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN2NSL11StaticNSIntE\00" - -// CHECK: @[[CONSTEXPR_NS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN2NSL14ConstexprNSIntE\00" - -// CHECK: @[[STATIC_CONSTEXPR_NS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN2NSL20StaticConstexprNSIntE\00" - -// Anonymous-Namespace scope is all internal linkage. -// CHECK: @[[ANONNS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN12_GLOBAL__N_19AnonNSIntE\00" - -// Static/constexpr in global cause these to be local to the TU. -// CHECK: @[[STATIC_ANONNS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN12_GLOBAL__N_115StaticAnonNSIntE\00" - -// CHECK: @[[CONSTEXPR_ANONNS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN12_GLOBAL__N_118ConstexprAnonNSIntE\00" - -// CHECK: @[[STATIC_CONSTEXPR_ANONNS_INT:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZN12_GLOBAL__N_124StaticConstexprAnonNSIntE\00" - -// Struct-statics are external. -// CHECK: @[[STRUCT_STATIC_INT:.+]] = private unnamed_addr constant{{.+}} c"_ZN6Struct15StaticStructIntE\00" -// CHECK: @[[STRUCT_STATIC_CONSTEXPR_INT:.+]] = private unnamed_addr constant{{.+}} c"_ZN6Struct24StaticConstexprStructIntE\00" - -// Wrapped struct static works the same way. -// CHECK: @[[WRAPPED_GLOBAL_INT:.+]] = private unnamed_addr constant{{.+}} c"_Z9GlobalInt\00" - -// Lambdas are all internal linkage. -// CHECK: @[[LOCAL_LAMBDA_1:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZZZ4mainENKUlvE_clEvE12LocalLambda1\00 - -// CHECK: @[[LOCAL_LAMBDA_2:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZZZ4mainENKUlvE0_clEvE12LocalLambda2\00 - -// CHECK: @[[LOCAL_LAMBDA_3:.+]] = private unnamed_addr constant -// PREFIX-SAME: THE_PREFIX -// CHECK-SAME: ____ZZZ4mainENKUlvE1_clEvE12LocalLambda3\00 - -// Because this one is in a template, it is a linkonce_odr global. -// CHECK: @[[TEMPL_FUNC_VAR:.+]] = private unnamed_addr constant{{.+}} c"_ZZ12TemplateFuncIfEvvE7FuncVar\00" - -extern "C" int puts(const char *); - -template -auto func() -> decltype(__builtin_sycl_unique_stable_id(Ty::str)); - -struct Derp { - static constexpr const char str[] = "derp derp derp"; -}; - -template -void some_template(KernelType kernelFunc) {} - -int GlobalInt; -static int StaticGlobalInt; -constexpr int ConstexprGlobalInt = 0; -static constexpr int StaticConstexprGlobalInt = 0; - -namespace NS { -int NSInt; -static int StaticNSInt; -constexpr int ConstexprNSInt = 0; -static constexpr int StaticConstexprNSInt = 0; -}; // namespace NS - -namespace { -int AnonNSInt; -static int StaticAnonNSInt; -constexpr int ConstexprAnonNSInt = 0; -static constexpr int StaticConstexprAnonNSInt = 0; -}; // namespace - -struct Struct { - static int StaticStructInt; - constexpr static int StaticConstexprStructInt = 5; -}; - -template -struct Wrapper { - static constexpr const char *ID = __builtin_sycl_unique_stable_id(S); -}; - - -void Func() { - static double FuncVar; - constexpr const char *ID = __builtin_sycl_unique_stable_id(FuncVar); - // CHECK: define{{.+}} void @_Z4Funcv() - // CHECK: store i8* getelementptr inbounds - // CHECK-SAME: @[[FUNC_VAR]] -}; - -template -void TemplateFunc() { - static T FuncVar; - constexpr const char *ID = __builtin_sycl_unique_stable_id(FuncVar); -}; - -int main() { - some_template(func); - // CHECK: call void @_Z13some_templateIPFPKcvEEvT_(i8* ()* noundef @_Z4funcI4DerpEDTcl31__builtin_sycl_unique_stable_idsrT_3strEEv) - // Demangles to: - // call void @void some_template(char const* (*)())(i8* ()* @decltype(__builtin_sycl_unique_stable_id(Derp::str)) func()) - - puts(__builtin_sycl_unique_stable_id(GlobalInt)); - // CHECK: call i32 @puts({{.+}} @[[GLOBAL_INT]], - puts(__builtin_sycl_unique_stable_id(StaticGlobalInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_GLOBAL_INT]], - puts(__builtin_sycl_unique_stable_id(ConstexprGlobalInt)); - // CHECK: call i32 @puts({{.+}} @[[CONSTEXPR_GLOBAL_INT]], - puts(__builtin_sycl_unique_stable_id(StaticConstexprGlobalInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_CONSTEXPR_GLOBAL_INT]], - - puts(__builtin_sycl_unique_stable_id(NS::NSInt)); - // CHECK: call i32 @puts({{.+}} @[[NS_INT]], - puts(__builtin_sycl_unique_stable_id(NS::StaticNSInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_NS_INT]], - puts(__builtin_sycl_unique_stable_id(NS::ConstexprNSInt)); - // CHECK: call i32 @puts({{.+}} @[[CONSTEXPR_NS_INT]], - puts(__builtin_sycl_unique_stable_id(NS::StaticConstexprNSInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_CONSTEXPR_NS_INT]], - - puts(__builtin_sycl_unique_stable_id(AnonNSInt)); - // CHECK: call i32 @puts({{.+}} @[[ANONNS_INT]], - puts(__builtin_sycl_unique_stable_id(StaticAnonNSInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_ANONNS_INT]], - puts(__builtin_sycl_unique_stable_id(ConstexprAnonNSInt)); - // CHECK: call i32 @puts({{.+}} @[[CONSTEXPR_ANONNS_INT]], - puts(__builtin_sycl_unique_stable_id(StaticConstexprAnonNSInt)); - // CHECK: call i32 @puts({{.+}} @[[STATIC_CONSTEXPR_ANONNS_INT]], - - puts(__builtin_sycl_unique_stable_id(Struct::StaticStructInt)); - // CHECK: call i32 @puts({{.+}} @[[STRUCT_STATIC_INT]], - puts(__builtin_sycl_unique_stable_id(Struct::StaticConstexprStructInt)); - // CHECK: call i32 @puts({{.+}} @[[STRUCT_STATIC_CONSTEXPR_INT]], - puts(Wrapper::ID); - // CHECK: call i32 @puts({{.+}} @[[WRAPPED_GLOBAL_INT]], - - // Ensure 'kernel naming' modifies the builtin. Wrapped in a lambda to make - // sure it has its name changed when the kernel is named. All should have - // internal linkage, since lambdas do. - // This one is unmodified. - []() { - static int LocalLambda1; - puts(__builtin_sycl_unique_stable_id(LocalLambda1)); - // CHECK: call i32 @puts({{.+}} @[[LOCAL_LAMBDA_1]], - }(); - - // Modified by kernel instantiation. - []() { - static int LocalLambda2; - auto Lambda = [](){}; - sycl::kernel_single_task(Lambda); - puts(__builtin_sycl_unique_stable_id(LocalLambda2)); - // CHECK: call i32 @puts({{.+}} @[[LOCAL_LAMBDA_2]], - }(); - - // Modified by mark-kernel-name builtin. - []() { - static int LocalLambda3; - puts(__builtin_sycl_unique_stable_id(LocalLambda3)); - // CHECK: call i32 @puts({{.+}} @[[LOCAL_LAMBDA_3]], - }(); - - TemplateFunc(); - // CHECK: define{{.+}} void @_Z12TemplateFuncIfEvv() - // CHECK: store i8* getelementptr inbounds - // CHECK-SAME: @[[TEMPL_FUNC_VAR]] - -} diff --git a/clang/test/CodeGenSYCL/no_opaque_virtual-types.cpp b/clang/test/CodeGenSYCL/no_opaque_virtual-types.cpp deleted file mode 100644 index 934e6808a144d..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_virtual-types.cpp +++ /dev/null @@ -1,28 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-linux -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s -template -__attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { - kernelFunc(); -} - -struct Struct { - virtual void foo() {} - void bar() {} -}; - -int main() { - kernel_single_task([]() { - Struct S; - S.bar(); }); - return 0; -} - - -// Struct layout big enough for vtable. -// CHECK: %struct.Struct = type { i32 (...)** } -// VTable: -// CHECK: @_ZTV6Struct = linkonce_odr unnamed_addr constant { [3 x i8*] } { [3 x i8*] [i8* null, i8* bitcast ({ i8 addrspace(4)*, i8* }* @_ZTI6Struct to i8*), i8* bitcast (void (%struct.Struct addrspace(4)*)* @_ZN6Struct3fooEv to i8*)] }, comdat, align 8 -// CHECK: @[[TYPEINFO:.+]] = external addrspace(1) global i8 addrspace(4)* -// TypeInfo Name: -// CHECK: @_ZTS6Struct = linkonce_odr constant [8 x i8] c"6Struct\00", comdat, align 1 -// TypeInfo: -// CHECK: @_ZTI6Struct = linkonce_odr constant { i8 addrspace(4)*, i8* } { i8 addrspace(4)* bitcast (i8 addrspace(4)* addrspace(4)* getelementptr inbounds (i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* addrspacecast (i8 addrspace(4)* addrspace(1)* @[[TYPEINFO]] to i8 addrspace(4)* addrspace(4)*), i64 2) to i8 addrspace(4)*), i8* getelementptr inbounds ([8 x i8], [8 x i8]* @_ZTS6Struct, i32 0, i32 0) }, comdat, align 8 diff --git a/clang/test/CodeGenSYCL/no_opaque_wg_init.cpp b/clang/test/CodeGenSYCL/no_opaque_wg_init.cpp deleted file mode 100644 index 0477d63d75e56..0000000000000 --- a/clang/test/CodeGenSYCL/no_opaque_wg_init.cpp +++ /dev/null @@ -1,22 +0,0 @@ -// RUN: %clang_cc1 -fsycl-is-device -triple spir64-unknown-unknown -disable-llvm-passes -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that a local variable initialized within a -// parallel_for_work_group scope is initialized as an UndefValue in addrspace(3) -// in LLVM IR. - -#include "Inputs/sycl.hpp" - -using namespace sycl; - -int main() { - queue q; - q.submit([&](handler &h) { - h.parallel_for_work_group( - range<1>{1}, range<1>{1}, [=](group<1> G) { - int WG_VAR = 10; - }); - }); - return 0; -} - -// CHECK: @{{.*}}WG_VAR = internal addrspace(3) global {{.*}} undef, {{.*}} diff --git a/clang/test/CodeGenSYCL/sycl-intelfpga-field-no-opaque.cpp b/clang/test/CodeGenSYCL/sycl-intelfpga-field-no-opaque.cpp deleted file mode 100644 index e497fbb90b255..0000000000000 --- a/clang/test/CodeGenSYCL/sycl-intelfpga-field-no-opaque.cpp +++ /dev/null @@ -1,96 +0,0 @@ -// RUN: %clang_cc1 -triple spir64-unknown-unknown -disable-llvm-passes -fsycl-is-device -no-opaque-pointers -emit-llvm %s -o - | FileCheck %s - -// This test checks that proper IR is generated for kernel field initialization, including -// 4 cases: -// 1. initialize pointer field with a global pointer -// 2. initialize a float field -// 3. initialize a BitInt field -// 4. initialize a field annotated with [[clang::annotate("...")]] -// It also checks that the kernel lambda is not inlined for FPGA, i.e. the kernel entry -// contains `call @NameOfCallOperator(...)` - -// Note this is a temporary test for the FPGA-specific use model that will be -// replaced by kernel argument compile-time properties. - -#include "Inputs/sycl.hpp" - -// CHECK: @[[STR:.*]] = private unnamed_addr addrspace(1) constant [9 x i8] c"my_ann_1\00", section "llvm.metadata" - - -struct fooA { - int *p; - -// CHECK: define dso_local spir_kernel void @_ZTS4fooA(i32 addrspace(1)* {{.*}}%[[ARG:.*]]) -// CHECK: %[[ARG_ADDR:.*]] = alloca i32 addrspace(1)*, align 8 -// CHECK: %[[ARG_ADDR_CAST:.*]] = addrspacecast i32 addrspace(1)** %[[ARG_ADDR]] to i32 addrspace(1)* addrspace(4)* -// CHECK: store i32 addrspace(1)* %[[ARG]], i32 addrspace(1)* addrspace(4)* %[[ARG_ADDR_CAST]], align 8 -// CHECK-DAG: %[[LOAD_ARG:.*]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* %[[ARG_ADDR_CAST]], align 8 -// CHECK-DAG: %[[ADDR_CAST:.*]] = addrspacecast i32 addrspace(1)* %[[LOAD_ARG]] to i32 addrspace(4)* -// CHECK-DAG: %[[GEP:.*]] = getelementptr inbounds -// CHECK: store i32 addrspace(4)* %[[ADDR_CAST]], i32 addrspace(4)* addrspace(4)* %[[GEP]], align 8 - fooA(int *_p) : p(_p) {} - -// CHECK: call spir_func void @_ZNK4fooAclEv( -// CHECK-NEXT: ret void - void operator()() const {} -}; - - -struct fooB { - float f; - -// CHECK: define dso_local spir_kernel void @_ZTS4fooB({{.*}}%[[ARG:.*]]) -// CHECK: %[[ARG_ADDR:.*]] = alloca float, align 4 -// CHECK: %[[ARG_ADDR_CAST:.*]] = addrspacecast float* %[[ARG_ADDR]] to float addrspace(4)* -// CHECK: store float %[[ARG]], float addrspace(4)* %[[ARG_ADDR_CAST]], align 4 -// CHECK-DAG: %[[LOAD_ARG:.*]] = load float, float addrspace(4)* %[[ARG_ADDR_CAST]], align 4 -// CHECK-DAG: %[[GEP:.*]] = getelementptr inbounds -// CHECK: store float %[[LOAD_ARG]], float addrspace(4)* %[[GEP]], align 4 - fooB(float _f) : f(_f) {} - void operator()() const {} -}; - - -struct bar { - _BitInt(5) a; -}; - -struct fooC { - bar b; - -// CHECK: define dso_local spir_kernel void @_ZTS4fooC(%struct.bar* {{.*}}%[[ARG:.*]]) -// CHECK: %[[ARG_AS_CAST:.*]] = addrspacecast %struct.bar* %[[ARG]] to %struct.bar addrspace(4)* -// CHECK-DAG: %[[GEP:.*]] = getelementptr inbounds -// CHECK-DAG: %[[GEP_CAST:.*]] = bitcast %struct.bar addrspace(4)* %[[GEP]] to i8 addrspace(4)* -// CHECK-DAG: %[[ARG_CAST:.*]] = bitcast %struct.bar addrspace(4)* %[[ARG_AS_CAST]] to i8 addrspace(4)* -// CHECK: call void @llvm.memcpy.p4i8.p4i8.i64(i8 addrspace(4)* align 1 %[[GEP_CAST]], i8 addrspace(4)* align 1 %[[ARG_CAST]], i64 1, i1 false) - fooC(bar _b) : b(_b) {} - void operator()() const {} -}; - - -struct fooD { - [[clang::annotate("my_ann_1")]] - int n; - -// CHECK: define dso_local spir_kernel void @_ZTS4fooD(i32 {{.*}}%[[ARG:.*]]) -// CHECK: %[[ARG_ADDR:.*]] = alloca i32, align 4 -// CHECK: %[[ARG_ADDR_AS_CAST:.*]] = addrspacecast i32* %[[ARG_ADDR]] to i32 addrspace(4)* -// CHECK: store i32 %[[ARG]], i32 addrspace(4)* %[[ARG_ADDR_AS_CAST]], align 4 -// CHECK-DAG: %[[LOAD_ARG:.*]] = load i32, i32 addrspace(4)* %[[ARG_ADDR_AS_CAST]], align 4 -// CHECK-DAG: %[[GEP:.*]] = getelementptr inbounds -// CHECK-DAG: %[[ANNOTATED_PTR:.*]] = call i32 addrspace(4)* @llvm.ptr.annotation.p4i32.p1i8(i32 addrspace(4)* %[[GEP]], {{.*}} @[[STR]], -// CHECK: store i32 %[[LOAD_ARG]], i32 addrspace(4)* %[[ANNOTATED_PTR]], align 4 - fooD(int _n) : n(_n) {} - - void operator()() const {} -}; - -int main() { - sycl::handler h; - h.single_task(fooA{nullptr}); - h.single_task(fooB{2.0}); - h.single_task(fooC{{3}}); - h.single_task(fooD{3}); - return 0; -}