Rename A64 port to ARM64 port

BUG=354405
[email protected], [email protected]
LOG=y

Review URL: https://codereview.chromium.org/207823003

git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@20148 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

Author: [email protected]

Makefile

@@ -223,11 +223,11 @@ endif
 
 # Architectures and modes to be compiled. Consider these to be internal
 # variables, don't override them (use the targets instead).
-ARCHES = ia32 x64 arm a64 mipsel
+ARCHES = ia32 x64 arm arm64 mipsel
 DEFAULT_ARCHES = ia32 x64 arm
 MODES = release debug optdebug
 DEFAULT_MODES = release debug
-ANDROID_ARCHES = android_ia32 android_arm android_a64 android_mipsel
+ANDROID_ARCHES = android_ia32 android_arm android_arm64 android_mipsel
 NACL_ARCHES = nacl_ia32 nacl_x64
 
 # List of files that trigger Makefile regeneration:
@@ -373,8 +373,8 @@ native.check: native
 	    --arch-and-mode=. $(TESTFLAGS)
 
 SUPERFASTTESTMODES = ia32.release
-FASTTESTMODES = $(SUPERFASTTESTMODES),x64.release,ia32.optdebug,x64.optdebug,arm.optdebug,a64.release
-FASTCOMPILEMODES = $(FASTTESTMODES),a64.optdebug
+FASTTESTMODES = $(SUPERFASTTESTMODES),x64.release,ia32.optdebug,x64.optdebug,arm.optdebug,arm64.release
+FASTCOMPILEMODES = $(FASTTESTMODES),arm64.optdebug
 
 COMMA = ,
 EMPTY =

Makefile.android

@@ -26,7 +26,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 # Those definitions should be consistent with the main Makefile
-ANDROID_ARCHES = android_ia32 android_arm android_a64 android_mipsel
+ANDROID_ARCHES = android_ia32 android_arm android_arm64 android_mipsel
 MODES = release debug
 
 # Generates all combinations of ANDROID ARCHES and MODES,
@@ -53,8 +53,8 @@ ifeq ($(ARCH), android_arm)
   TOOLCHAIN_PREFIX = $(TOOLCHAIN_ARCH)
   TOOLCHAIN_VER = 4.6
 else
-  ifeq ($(ARCH), android_a64)
-    DEFINES  = target_arch=a64 v8_target_arch=a64 android_target_arch=arm64
+  ifeq ($(ARCH), android_arm64)
+    DEFINES  = target_arch=arm64 v8_target_arch=arm64 android_target_arch=arm64
     TOOLCHAIN_ARCH = aarch64-linux-android
     TOOLCHAIN_PREFIX = $(TOOLCHAIN_ARCH)
     TOOLCHAIN_VER = 4.8

build/android.gypi

@@ -184,7 +184,7 @@
                   '-L<(android_stlport_libs)/x86',
                 ],
               }],
-              ['target_arch=="a64"', {
+              ['target_arch=="arm64"', {
                 'ldflags': [
                   '-L<(android_stlport_libs)/arm64',
                 ],
@@ -214,7 +214,7 @@
         'target_conditions': [
           ['_type=="executable"', {
             'conditions': [
-              ['target_arch=="a64"', {
+              ['target_arch=="arm64"', {
                 'ldflags': [
                   '-Wl,-dynamic-linker,/system/bin/linker64',
                 ],

build/standalone.gypi

@@ -55,7 +55,7 @@
                 '<!(uname -m | sed -e "s/i.86/ia32/;\
                                        s/x86_64/x64/;\
                                        s/amd64/x64/;\
-                                       s/aarch64/a64/;\
+                                       s/aarch64/arm64/;\
                                        s/arm.*/arm/;\
                                        s/mips.*/mipsel/")',
             }, {
@@ -102,7 +102,6 @@
 
     'conditions': [
       ['(v8_target_arch=="arm" and host_arch!="arm") or \
-        (v8_target_arch=="a64" and host_arch!="a64") or \
         (v8_target_arch=="arm64" and host_arch!="arm64") or \
         (v8_target_arch=="mipsel" and host_arch!="mipsel") or \
         (v8_target_arch=="x64" and host_arch!="x64") or \

build/toolchain.gypi

@@ -268,9 +268,9 @@
           }],  # _toolset=="target"
         ],
       }],  # v8_target_arch=="arm"
-      ['v8_target_arch=="a64" or v8_target_arch=="arm64"', {
+      ['v8_target_arch=="arm64"', {
         'defines': [
-          'V8_TARGET_ARCH_A64',
+          'V8_TARGET_ARCH_ARM64',
         ],
       }],
       ['v8_target_arch=="ia32"', {
@@ -413,8 +413,7 @@
         ],
       }],
       ['(OS=="linux" or OS=="android") and \
-        (v8_target_arch=="x64" or v8_target_arch=="a64" or \
-         v8_target_arch=="arm64")', {
+        (v8_target_arch=="x64" or v8_target_arch=="arm64")', {
         # Check whether the host compiler and target compiler support the
         # '-m64' option and set it if so.
         'target_conditions': [

src/a64/OWNERS src/arm64/OWNERS

@@ -25,10 +25,10 @@
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-#ifndef V8_A64_ASSEMBLER_A64_INL_H_
-#define V8_A64_ASSEMBLER_A64_INL_H_
+#ifndef V8_ARM64_ASSEMBLER_ARM64_INL_H_
+#define V8_ARM64_ASSEMBLER_ARM64_INL_H_
 
-#include "a64/assembler-a64.h"
+#include "arm64/assembler-arm64.h"
 #include "cpu.h"
 #include "debug.h"
 
@@ -573,7 +573,7 @@ Address Assembler::target_address_at(Address pc, Code* code) {
 Address Assembler::target_address_from_return_address(Address pc) {
   // Returns the address of the call target from the return address that will
   // be returned to after a call.
-  // Call sequence on A64 is:
+  // Call sequence on ARM64 is:
   //  ldr ip0, #... @ load from literal pool
   //  blr ip0
   Address candidate = pc - 2 * kInstructionSize;
@@ -745,7 +745,7 @@ static const int kCodeAgeStubEntryOffset = 3 * kInstructionSize;
 
 
 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
-  UNREACHABLE();  // This should never be reached on A64.
+  UNREACHABLE();  // This should never be reached on ARM64.
   return Handle<Object>();
 }
 
@@ -803,7 +803,7 @@ bool RelocInfo::IsPatchedReturnSequence() {
   // The sequence must be:
   //   ldr ip0, [pc, #offset]
   //   blr ip0
-  // See a64/debug-a64.cc BreakLocationIterator::SetDebugBreakAtReturn().
+  // See arm64/debug-arm64.cc BreakLocationIterator::SetDebugBreakAtReturn().
   Instruction* i1 = reinterpret_cast<Instruction*>(pc_);
   Instruction* i2 = i1->following();
   return i1->IsLdrLiteralX() && (i1->Rt() == ip0.code()) &&
@@ -1228,4 +1228,4 @@ void Assembler::ClearRecordedAstId() {
 
 } }  // namespace v8::internal
 
-#endif  // V8_A64_ASSEMBLER_A64_INL_H_
+#endif  // V8_ARM64_ASSEMBLER_ARM64_INL_H_

src/a64/assembler-a64-inl.h src/arm64/assembler-arm64-inl.h

@@ -28,11 +28,11 @@
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_A64
+#if V8_TARGET_ARCH_ARM64
 
-#define A64_DEFINE_REG_STATICS
+#define ARM64_DEFINE_REG_STATICS
 
-#include "a64/assembler-a64-inl.h"
+#include "arm64/assembler-arm64-inl.h"
 
 namespace v8 {
 namespace internal {
@@ -155,7 +155,7 @@ const int RelocInfo::kApplyMask = 0;
 
 bool RelocInfo::IsCodedSpecially() {
   // The deserializer needs to know whether a pointer is specially coded. Being
-  // specially coded on A64 means that it is a movz/movk sequence. We don't
+  // specially coded on ARM64 means that it is a movz/movk sequence. We don't
   // generate those for relocatable pointers.
   return false;
 }
@@ -1944,7 +1944,7 @@ void Assembler::debug(const char* message, uint32_t code, Instr params) {
     Label start;
     bind(&start);
 
-    // Refer to instructions-a64.h for a description of the marker and its
+    // Refer to instructions-arm64.h for a description of the marker and its
     // arguments.
     hlt(kImmExceptionIsDebug);
     ASSERT(SizeOfCodeGeneratedSince(&start) == kDebugCodeOffset);
@@ -2594,7 +2594,7 @@ void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
     //  1) Encode the size of the constant pool, for use by the disassembler.
     //  2) Terminate the program, to try to prevent execution from accidentally
     //     flowing into the constant pool.
-    // The header is therefore made of two a64 instructions:
+    // The header is therefore made of two arm64 instructions:
     //   ldr xzr, #<size of the constant pool in 32-bit words>
     //   blr xzr
     // If executed the code will likely segfault and lr will point to the
@@ -2810,4 +2810,4 @@ void Assembler::PopulateConstantPool(ConstantPoolArray* constant_pool) {
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_A64
+#endif  // V8_TARGET_ARCH_ARM64

src/a64/assembler-a64.cc src/arm64/assembler-arm64.cc

@@ -25,8 +25,8 @@
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-#ifndef V8_A64_ASSEMBLER_A64_H_
-#define V8_A64_ASSEMBLER_A64_H_
+#ifndef V8_ARM64_ASSEMBLER_ARM64_H_
+#define V8_ARM64_ASSEMBLER_ARM64_H_
 
 #include <list>
 #include <map>
@@ -35,8 +35,8 @@
 #include "utils.h"
 #include "assembler.h"
 #include "serialize.h"
-#include "a64/instructions-a64.h"
-#include "a64/cpu-a64.h"
+#include "arm64/instructions-arm64.h"
+#include "arm64/cpu-arm64.h"
 
 
 namespace v8 {
@@ -332,7 +332,7 @@ STATIC_ASSERT(sizeof(CPURegister) == sizeof(Register));
 STATIC_ASSERT(sizeof(CPURegister) == sizeof(FPRegister));
 
 
-#if defined(A64_DEFINE_REG_STATICS)
+#if defined(ARM64_DEFINE_REG_STATICS)
 #define INITIALIZE_REGISTER(register_class, name, code, size, type)      \
   const CPURegister init_##register_class##_##name = {code, size, type}; \
   const register_class& name = *reinterpret_cast<const register_class*>( \
@@ -345,7 +345,7 @@ STATIC_ASSERT(sizeof(CPURegister) == sizeof(FPRegister));
   extern const register_class& name
 #define ALIAS_REGISTER(register_class, alias, name) \
   extern const register_class& alias
-#endif  // defined(A64_DEFINE_REG_STATICS)
+#endif  // defined(ARM64_DEFINE_REG_STATICS)
 
 // No*Reg is used to indicate an unused argument, or an error case. Note that
 // these all compare equal (using the Is() method). The Register and FPRegister
@@ -1663,7 +1663,7 @@ class Assembler : public AssemblerBase {
 
   // Pseudo-instructions ------------------------------------------------------
 
-  // Parameters are described in a64/instructions-a64.h.
+  // Parameters are described in arm64/instructions-arm64.h.
   void debug(const char* message, uint32_t code, Instr params = BREAK);
 
   // Required by V8.
@@ -2220,4 +2220,4 @@ class EnsureSpace BASE_EMBEDDED {
 
 } }  // namespace v8::internal
 
-#endif  // V8_A64_ASSEMBLER_A64_H_
+#endif  // V8_ARM64_ASSEMBLER_ARM64_H_

src/a64/assembler-a64.h src/arm64/assembler-arm64.h

@@ -27,7 +27,7 @@
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_A64
+#if V8_TARGET_ARCH_ARM64
 
 #include "codegen.h"
 #include "debug.h"

src/a64/builtins-a64.cc src/arm64/builtins-arm64.cc

@@ -27,7 +27,7 @@
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_A64
+#if V8_TARGET_ARCH_ARM64
 
 #include "bootstrapper.h"
 #include "code-stubs.h"
@@ -1237,7 +1237,7 @@ void MathPowStub::Generate(MacroAssembler* masm) {
       __ Fadd(base_double, base_double, fp_zero);
       // The operation -0+0 results in +0 in all cases except where the
       // FPCR rounding mode is 'round towards minus infinity' (RM). The
-      // A64 simulator does not currently simulate FPCR (where the rounding
+      // ARM64 simulator does not currently simulate FPCR (where the rounding
       // mode is set), so test the operation with some debug code.
       if (masm->emit_debug_code()) {
         UseScratchRegisterScope temps(masm);
@@ -1259,7 +1259,7 @@ void MathPowStub::Generate(MacroAssembler* masm) {
 
       // If base is -INFINITY, make it +INFINITY.
       //  * Calculate base - base: All infinities will become NaNs since both
-      //    -INFINITY+INFINITY and +INFINITY-INFINITY are NaN in A64.
+      //    -INFINITY+INFINITY and +INFINITY-INFINITY are NaN in ARM64.
       //  * If the result is NaN, calculate abs(base).
       __ Fsub(scratch0_double, base_double, base_double);
       __ Fcmp(scratch0_double, 0.0);
@@ -1399,7 +1399,7 @@ void CodeStub::GenerateStubsAheadOfTime(Isolate* isolate) {
 
 
 void CodeStub::GenerateFPStubs(Isolate* isolate) {
-  // Floating-point code doesn't get special handling in A64, so there's
+  // Floating-point code doesn't get special handling in ARM64, so there's
   // nothing to do here.
   USE(isolate);
 }
@@ -4635,7 +4635,7 @@ void BinaryOpICWithAllocationSiteStub::Generate(MacroAssembler* masm) {
 
 
 bool CodeStub::CanUseFPRegisters() {
-  // FP registers always available on A64.
+  // FP registers always available on ARM64.
   return true;
 }
 
@@ -4933,7 +4933,7 @@ void ProfileEntryHookStub::Generate(MacroAssembler* masm) {
   // Compute the function's address as the first argument.
   __ Sub(x0, lr, kReturnAddressDistanceFromFunctionStart);
 
-#if V8_HOST_ARCH_A64
+#if V8_HOST_ARCH_ARM64
   uintptr_t entry_hook =
       reinterpret_cast<uintptr_t>(masm->isolate()->function_entry_hook());
   __ Mov(x10, entry_hook);
@@ -5726,4 +5726,4 @@ void CallApiGetterStub::Generate(MacroAssembler* masm) {
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_A64
+#endif  // V8_TARGET_ARCH_ARM64

src/a64/code-stubs-a64.cc src/arm64/code-stubs-arm64.cc

@@ -25,8 +25,8 @@
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-#ifndef V8_A64_CODE_STUBS_A64_H_
-#define V8_A64_CODE_STUBS_A64_H_
+#ifndef V8_ARM64_CODE_STUBS_ARM64_H_
+#define V8_ARM64_CODE_STUBS_ARM64_H_
 
 #include "ic-inl.h"
 
@@ -466,4 +466,4 @@ struct PlatformCallInterfaceDescriptor {
 
 } }  // namespace v8::internal
 
-#endif  // V8_A64_CODE_STUBS_A64_H_
+#endif  // V8_ARM64_CODE_STUBS_ARM64_H_

src/a64/code-stubs-a64.h src/arm64/code-stubs-arm64.h

@@ -27,26 +27,26 @@
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_A64
+#if V8_TARGET_ARCH_ARM64
 
 #include "codegen.h"
 #include "macro-assembler.h"
-#include "simulator-a64.h"
+#include "simulator-arm64.h"
 
 namespace v8 {
 namespace internal {
 
 #define __ ACCESS_MASM(masm)
 
 #if defined(USE_SIMULATOR)
-byte* fast_exp_a64_machine_code = NULL;
+byte* fast_exp_arm64_machine_code = NULL;
 double fast_exp_simulator(double x) {
   Simulator * simulator = Simulator::current(Isolate::Current());
   Simulator::CallArgument args[] = {
       Simulator::CallArgument(x),
       Simulator::CallArgument::End()
   };
-  return simulator->CallDouble(fast_exp_a64_machine_code, args);
+  return simulator->CallDouble(fast_exp_arm64_machine_code, args);
 }
 #endif
 
@@ -92,7 +92,7 @@ UnaryMathFunction CreateExpFunction() {
 #if !defined(USE_SIMULATOR)
   return FUNCTION_CAST<UnaryMathFunction>(buffer);
 #else
-  fast_exp_a64_machine_code = buffer;
+  fast_exp_arm64_machine_code = buffer;
   return &fast_exp_simulator;
 #endif
 }
@@ -546,7 +546,7 @@ void MathExpGenerator::EmitMathExp(MacroAssembler* masm,
   // Continue the common case first. 'mi' tests N == 1.
   __ B(&result_is_finite_non_zero, mi);
 
-  // TODO(jbramley): Consider adding a +infinity register for A64.
+  // TODO(jbramley): Consider adding a +infinity register for ARM64.
   __ Ldr(double_temp2, ExpConstant(constants, 2));    // Synthesize +infinity.
 
   // Select between +0.0 and +infinity. 'lo' tests C == 0.
@@ -612,4 +612,4 @@ void MathExpGenerator::EmitMathExp(MacroAssembler* masm,
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_A64
+#endif  // V8_TARGET_ARCH_ARM64