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Presubmit checks recover:
1) runtime/references checks temporarily disabled (56 items left) 2) other errors fixed [email protected] Review URL: https://codereview.chromium.org/277913002 git-svn-id: https://v8.googlecode.com/svn/branches/bleeding_edge@21222 ce2b1a6d-e550-0410-aec6-3dcde31c8c00
1 parent df04e59 commit 2c651e8

32 files changed

+219
-216
lines changed

include/v8-profiler.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ class V8_EXPORT OutputStream { // NOLINT
292292
*/
293293
virtual WriteResult WriteHeapStatsChunk(HeapStatsUpdate* data, int count) {
294294
return kAbort;
295-
};
295+
}
296296
};
297297

298298

include/v8-util.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -422,7 +422,7 @@ class PersistentValueVector {
422422
*/
423423
void Append(UniquePersistent<V> persistent) {
424424
Traits::Append(&impl_, ClearAndLeak(&persistent));
425-
};
425+
}
426426

427427
/**
428428
* Are there any values in the vector?

include/v8.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -1039,7 +1039,7 @@ class V8_EXPORT ScriptCompiler {
10391039
int length;
10401040
BufferPolicy buffer_policy;
10411041

1042-
private:
1042+
private:
10431043
// Prevent copying. Not implemented.
10441044
CachedData(const CachedData&);
10451045
CachedData& operator=(const CachedData&);

src/allocation-site-scopes.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ class AllocationSiteContext {
2020
public:
2121
explicit AllocationSiteContext(Isolate* isolate) {
2222
isolate_ = isolate;
23-
};
23+
}
2424

2525
Handle<AllocationSite> top() { return top_; }
2626
Handle<AllocationSite> current() { return current_; }

src/arm/constants-arm.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ inline Condition ReverseCondition(Condition cond) {
110110
return ge;
111111
default:
112112
return cond;
113-
};
113+
}
114114
}
115115

116116

src/arm/simulator-arm.cc

+3-3
Original file line numberDiff line numberDiff line change
@@ -694,9 +694,9 @@ void Simulator::CheckICache(v8::internal::HashMap* i_cache,
694694
char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask);
695695
if (cache_hit) {
696696
// Check that the data in memory matches the contents of the I-cache.
697-
CHECK(memcmp(reinterpret_cast<void*>(instr),
698-
cache_page->CachedData(offset),
699-
Instruction::kInstrSize) == 0);
697+
CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr),
698+
cache_page->CachedData(offset),
699+
Instruction::kInstrSize));
700700
} else {
701701
// Cache miss. Load memory into the cache.
702702
OS::MemCopy(cached_line, line, CachePage::kLineLength);

src/arm/simulator-arm.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -265,7 +265,7 @@ class Simulator {
265265

266266
inline int GetCarry() {
267267
return c_flag_ ? 1 : 0;
268-
};
268+
}
269269

270270
// Support for VFP.
271271
void Compute_FPSCR_Flags(double val1, double val2);

src/arm64/constants-arm64.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -293,7 +293,7 @@ inline Condition ReverseConditionForCmp(Condition cond) {
293293
// 'mi' for instance).
294294
UNREACHABLE();
295295
return nv;
296-
};
296+
}
297297
}
298298

299299
enum FlagsUpdate {

src/arm64/cpu-arm64.cc

+1-1
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@ class CacheLineSizes {
3232
__asm__ __volatile__ ("mrs %[ctr], ctr_el0" // NOLINT
3333
: [ctr] "=r" (cache_type_register_));
3434
#endif
35-
};
35+
}
3636

3737
uint32_t icache_line_size() const { return ExtractCacheLineSize(0); }
3838
uint32_t dcache_line_size() const { return ExtractCacheLineSize(16); }

src/arm64/cpu-arm64.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ class CpuFeatures : public AllStatic {
2525
static bool IsSupported(CpuFeature f) {
2626
ASSERT(initialized_);
2727
return Check(f, supported_);
28-
};
28+
}
2929

3030
static bool IsSafeForSnapshot(Isolate* isolate, CpuFeature f) {
3131
return IsSupported(f);

src/arm64/lithium-arm64.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -2452,7 +2452,7 @@ class LStoreKeyedExternal V8_FINAL : public LStoreKeyed<1> {
24522452
LOperand* temp) :
24532453
LStoreKeyed<1>(elements, key, value) {
24542454
temps_[0] = temp;
2455-
};
2455+
}
24562456

24572457
LOperand* temp() { return temps_[0]; }
24582458

@@ -2466,7 +2466,7 @@ class LStoreKeyedFixed V8_FINAL : public LStoreKeyed<1> {
24662466
LOperand* temp) :
24672467
LStoreKeyed<1>(elements, key, value) {
24682468
temps_[0] = temp;
2469-
};
2469+
}
24702470

24712471
LOperand* temp() { return temps_[0]; }
24722472

@@ -2480,7 +2480,7 @@ class LStoreKeyedFixedDouble V8_FINAL : public LStoreKeyed<1> {
24802480
LOperand* temp) :
24812481
LStoreKeyed<1>(elements, key, value) {
24822482
temps_[0] = temp;
2483-
};
2483+
}
24842484

24852485
LOperand* temp() { return temps_[0]; }
24862486

src/assembler.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@ class DontEmitDebugCodeScope BASE_EMBEDDED {
116116
}
117117
~DontEmitDebugCodeScope() {
118118
assembler_->set_emit_debug_code(old_value_);
119-
};
119+
}
120120
private:
121121
AssemblerBase* assembler_;
122122
bool old_value_;

src/counters.h

+3-1
Original file line numberDiff line numberDiff line change
@@ -265,11 +265,12 @@ class HistogramTimerScope BASE_EMBEDDED {
265265
} else {
266266
timer_->Start();
267267
}
268+
}
268269
#else
269270
: timer_(timer) {
270271
timer_->Start();
271-
#endif
272272
}
273+
#endif
273274
~HistogramTimerScope() {
274275
#ifdef DEBUG
275276
if (!skipped_timer_start_) {
@@ -279,6 +280,7 @@ class HistogramTimerScope BASE_EMBEDDED {
279280
timer_->Stop();
280281
#endif
281282
}
283+
282284
private:
283285
HistogramTimer* timer_;
284286
#ifdef DEBUG

src/elements.cc

+1-1
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ template<ElementsKind Kind> class ElementsKindTraits {
112112

113113
#define ELEMENTS_TRAITS(Class, KindParam, Store) \
114114
template<> class ElementsKindTraits<KindParam> { \
115-
public: \
115+
public: /* NOLINT */ \
116116
static const ElementsKind Kind = KindParam; \
117117
typedef Store BackingStore; \
118118
};

src/full-codegen.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -216,7 +216,7 @@ class FullCodeGenerator: public AstVisitor {
216216
++(*context_length);
217217
}
218218
return previous_;
219-
};
219+
}
220220
};
221221

222222
// The try block of a try/catch statement.

src/hydrogen-instructions.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -6406,7 +6406,7 @@ class ArrayInstructionInterface {
64066406
virtual int MaxIndexOffsetBits() = 0;
64076407
virtual bool IsDehoisted() = 0;
64086408
virtual void SetDehoisted(bool is_dehoisted) = 0;
6409-
virtual ~ArrayInstructionInterface() { };
6409+
virtual ~ArrayInstructionInterface() { }
64106410

64116411
static Representation KeyedAccessIndexRequirement(Representation r) {
64126412
return r.IsInteger32() || SmiValuesAre32Bits()

src/ia32/assembler-ia32.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -331,7 +331,7 @@ inline Condition ReverseCondition(Condition cc) {
331331
return greater_equal;
332332
default:
333333
return cc;
334-
};
334+
}
335335
}
336336

337337

src/mips/assembler-mips.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -896,10 +896,10 @@ class Assembler : public AssemblerBase {
896896
assem_->EndBlockGrowBuffer();
897897
}
898898

899-
private:
900-
Assembler* assem_;
899+
private:
900+
Assembler* assem_;
901901

902-
DISALLOW_IMPLICIT_CONSTRUCTORS(BlockGrowBufferScope);
902+
DISALLOW_IMPLICIT_CONSTRUCTORS(BlockGrowBufferScope);
903903
};
904904

905905
// Debugging.

src/mips/constants-mips.cc

+12-12
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,7 @@ bool Instruction::IsForbiddenInBranchDelay() const {
151151
return true;
152152
default:
153153
return false;
154-
};
154+
}
155155
break;
156156
case SPECIAL:
157157
switch (FunctionFieldRaw()) {
@@ -160,11 +160,11 @@ bool Instruction::IsForbiddenInBranchDelay() const {
160160
return true;
161161
default:
162162
return false;
163-
};
163+
}
164164
break;
165165
default:
166166
return false;
167-
};
167+
}
168168
}
169169

170170

@@ -180,17 +180,17 @@ bool Instruction::IsLinkingInstruction() const {
180180
return true;
181181
default:
182182
return false;
183-
};
183+
}
184184
case SPECIAL:
185185
switch (FunctionFieldRaw()) {
186186
case JALR:
187187
return true;
188188
default:
189189
return false;
190-
};
190+
}
191191
default:
192192
return false;
193-
};
193+
}
194194
}
195195

196196

@@ -209,7 +209,7 @@ bool Instruction::IsTrap() const {
209209
return true;
210210
default:
211211
return false;
212-
};
212+
}
213213
}
214214
}
215215

@@ -255,7 +255,7 @@ Instruction::Type Instruction::InstructionType() const {
255255
return kRegisterType;
256256
default:
257257
return kUnsupported;
258-
};
258+
}
259259
break;
260260
case SPECIAL2:
261261
switch (FunctionFieldRaw()) {
@@ -264,7 +264,7 @@ Instruction::Type Instruction::InstructionType() const {
264264
return kRegisterType;
265265
default:
266266
return kUnsupported;
267-
};
267+
}
268268
break;
269269
case SPECIAL3:
270270
switch (FunctionFieldRaw()) {
@@ -273,15 +273,15 @@ Instruction::Type Instruction::InstructionType() const {
273273
return kRegisterType;
274274
default:
275275
return kUnsupported;
276-
};
276+
}
277277
break;
278278
case COP1: // Coprocessor instructions.
279279
switch (RsFieldRawNoAssert()) {
280280
case BC1: // Branch on coprocessor condition.
281281
return kImmediateType;
282282
default:
283283
return kRegisterType;
284-
};
284+
}
285285
break;
286286
case COP1X:
287287
return kRegisterType;
@@ -326,7 +326,7 @@ Instruction::Type Instruction::InstructionType() const {
326326
return kJumpType;
327327
default:
328328
return kUnsupported;
329-
};
329+
}
330330
return kUnsupported;
331331
}
332332

src/mips/constants-mips.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -524,7 +524,7 @@ inline Condition ReverseCondition(Condition cc) {
524524
return greater_equal;
525525
default:
526526
return cc;
527-
};
527+
}
528528
}
529529

530530

src/mips/disasm-mips.cc

+5-5
Original file line numberDiff line numberDiff line change
@@ -277,7 +277,7 @@ void Decoder::PrintCode(Instruction* instr) {
277277
}
278278
default: // Not a break or trap instruction.
279279
break;
280-
};
280+
}
281281
}
282282

283283

@@ -407,7 +407,7 @@ int Decoder::FormatOption(Instruction* instr, const char* format) {
407407
PrintCc(instr);
408408
return 2;
409409
}
410-
};
410+
}
411411
UNREACHABLE();
412412
return -1;
413413
}
@@ -603,7 +603,7 @@ void Decoder::DecodeTypeRegister(Instruction* instr) {
603603
break;
604604
default:
605605
UNREACHABLE();
606-
};
606+
}
607607
break;
608608
case SPECIAL:
609609
switch (instr->FunctionFieldRaw()) {
@@ -796,7 +796,7 @@ void Decoder::DecodeTypeImmediate(Instruction* instr) {
796796
break;
797797
default:
798798
UNREACHABLE();
799-
};
799+
}
800800
break; // Case COP1.
801801
case REGIMM:
802802
switch (instr->RtFieldRaw()) {
@@ -909,7 +909,7 @@ void Decoder::DecodeTypeImmediate(Instruction* instr) {
909909
default:
910910
UNREACHABLE();
911911
break;
912-
};
912+
}
913913
}
914914

915915

src/mips/macro-assembler-mips.cc

+1-1
Original file line numberDiff line numberDiff line change
@@ -1194,7 +1194,7 @@ void MacroAssembler::BranchF(Label* target,
11941194
break;
11951195
default:
11961196
CHECK(0);
1197-
};
1197+
}
11981198
}
11991199

12001200
if (bd == PROTECT) {

src/mips/macro-assembler-mips.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -734,7 +734,7 @@ class MacroAssembler: public Assembler {
734734
FPURegister cmp1,
735735
FPURegister cmp2) {
736736
BranchF(target, nan, cc, cmp1, cmp2, bd);
737-
};
737+
}
738738

739739
// Truncates a double using a specific rounding mode, and writes the value
740740
// to the result register.

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