File tree 1 file changed +47
-47
lines changed
1 file changed +47
-47
lines changed Original file line number Diff line number Diff line change 1
- {
2
- "cSpell.words" : [
3
- " TXFULL" ,
4
- " Uart" ,
5
- " asid" ,
6
- " concat" ,
7
- " ebreak" ,
8
- " ebss" ,
9
- " edata" ,
10
- " eheap" ,
11
- " estack" ,
12
- " etext" ,
13
- " getc" ,
14
- " irqs" ,
15
- " kernel" ,
16
- " mcause" ,
17
- " mext" ,
18
- " msoft" ,
19
- " mstatus" ,
20
- " mtimer" ,
21
- " pagetable" ,
22
- " pending" ,
23
- " processtable" ,
24
- " putc" ,
25
- " riscv" ,
26
- " rt" ,
27
- " satp" ,
28
- " sbss" ,
29
- " sdata" ,
30
- " set" ,
31
- " sheap" ,
32
- " sidata" ,
33
- " sstack" ,
34
- " stext" ,
35
- " syscalls" ,
36
- " virt" ,
37
- " vmim" ,
38
- " vmip" ,
39
- " xous"
40
- ],
41
- "rust-analyzer.checkOnSave.allTargets" : false ,
42
- "rust-analyzer.cargo.target" : " riscv32imac-unknown-none-elf"
43
- // "rust-analyzer.checkOnSave.extraArgs": [
44
- // "--target",
45
- // "riscv32imac-unknown-none-elf"
46
- // ]
47
- }
1
+ {
2
+ "cSpell.words" : [
3
+ " TXFULL" ,
4
+ " Uart" ,
5
+ " asid" ,
6
+ " concat" ,
7
+ " ebreak" ,
8
+ " ebss" ,
9
+ " edata" ,
10
+ " eheap" ,
11
+ " estack" ,
12
+ " etext" ,
13
+ " getc" ,
14
+ " irqs" ,
15
+ " kernel" ,
16
+ " mcause" ,
17
+ " mext" ,
18
+ " msoft" ,
19
+ " mstatus" ,
20
+ " mtimer" ,
21
+ " pagetable" ,
22
+ " pending" ,
23
+ " processtable" ,
24
+ " putc" ,
25
+ " riscv" ,
26
+ " rt" ,
27
+ " satp" ,
28
+ " sbss" ,
29
+ " sdata" ,
30
+ " set" ,
31
+ " sheap" ,
32
+ " sidata" ,
33
+ " sstack" ,
34
+ " stext" ,
35
+ " syscalls" ,
36
+ " virt" ,
37
+ " vmim" ,
38
+ " vmip" ,
39
+ " xous"
40
+ ],
41
+ "rust-analyzer.checkOnSave.allTargets" : false ,
42
+ "rust-analyzer.cargo.target" : " riscv32imac-unknown-none-elf"
43
+ // "rust-analyzer.checkOnSave.extraArgs": [
44
+ // "--target",
45
+ // "riscv32imac-unknown-none-elf"
46
+ // ]
47
+ }
You can’t perform that action at this time.
0 commit comments