[enhancement] Automatically route RAM channels to the top-level

[rw1nkler]

What's hard to do? (limit 100 words)

Using RAMs can be somewhat cumbersome, particularly in large hierarchies of procs, because RAM rewriting is limited to the top-level proc. As a result, all RAM channels need to be created at the top-level and routed down to the procs that utilize them.

For example, [around ~75% of our channels in the toplevel ZSTD decoder proc are RAM channels

Current best alternative workaround (limit 100 words)

There is no alternative. One has to instantiate RAMs only in the top-level and route all channels from top-level to children

Your view of the "best case XLS enhancement" (limit 100 words)

It would be convenient to remove the need to pass RAM channels down through the proc hierarchy.

• One way to handle this could by by adding annotations to RAM channel declarations, that would cause the automatic routing of channels to the top-level:

  #[expose_port]
  let (req_s, req_r) = chan<RamRead>("req");

• Since the local RAM usage seems to be a common use case, another approach could be a built-in for creating local RAMs, with their channels automatically routed to the top level. In the upcoming syntax changes, this could be represented as a struct member of the procs.

  proc ProcWithRam<DATA_W: u32, SIZE: u32> {
      ram: LocalRam<DATA_W, SIZE>;
  }

  This may be more general as it could be used for example in “bus rewriting” mentioned in [enhancement] Add support for common bus interfaces (AXI, Wishbone, TileLink) #1452