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Step 3. To add the new delay model, first, you need to copy the {pdk_name}.textproto file to xls/estimators/delay_model/models/. Then, you'll need to add the new target for the delay model like this one here,
Thank you for the explanation. Before trying to generate a delay model 2 things I want to ask:
The PDK I am targeting works with Synopsys tools and I am not familiar with Yosys enough to work with that PDK in Yosys, I am guessing if I edit the run_op_characterization.py file to work with Design Compiler and PrimeTime I can get similar data. Will that work?
While I am targeting an educational PDK I am testing my design on an Xilinx Ultrascale FPGA, I am guessing I need to schedule for that FPGA instead of the PDK to get usable clock speeds. I see that yosys has experimental support for synthesizing for similar FPGAs. Can I do that with Yosys / Vivado tools?
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Moved from the discussion here #1625.
To create a new delay model, there are 3 steps,
Step 1. To generate the data points, you'll need to add a new xls_model_generation target to this build file,
xls/xls/estimators/delay_model/BUILD
Lines 266 to 270 in 3ca5faa
To build the target, you can run,
Step 2. To join the data points with the delay model's op models, you'll need to build the estimator_model_join target here
xls/xls/estimators/BUILD
Lines 95 to 109 in 3ca5faa
Then join the data points and the op models,
Step 3. To add the new delay model, first, you need to copy the {pdk_name}.textproto file to xls/estimators/delay_model/models/. Then, you'll need to add the new target for the delay model like this one here,
xls/xls/estimators/delay_model/models/BUILD
Lines 48 to 53 in 3ca5faa
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