From 58465b5789fb3b7a9bc5305892dcdcbc3e2f82cd Mon Sep 17 00:00:00 2001 From: ramilbakhshyiev <7597197+ramilbakhshyiev@users.noreply.github.com> Date: Thu, 15 Aug 2024 14:26:07 -0700 Subject: [PATCH] Add midding hipStream SWIG typedef to fix ROCm memleak in Python (#3760) Summary: Pull Request resolved: https://github.com/facebookresearch/faiss/pull/3760 This fixes the memleak and the warning received after running Python tests under ROCm since no destructor was declared and objects would remain allocated. Reviewed By: gtwang01 Differential Revision: D61357579 --- faiss/python/swigfaiss.swig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/faiss/python/swigfaiss.swig b/faiss/python/swigfaiss.swig index 43c8d6c422..752b64b55b 100644 --- a/faiss/python/swigfaiss.swig +++ b/faiss/python/swigfaiss.swig @@ -352,6 +352,8 @@ void gpu_sync_all_devices() %include %include +typedef ihipStream_t* hipStream_t; + %inline %{ // interop between pytorch exposed hipStream_t and faiss