diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
index d82b0b7b1c6f02..f7fb976b115b68 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
@@ -25,15 +25,6 @@ using namespace llvm;
 
 #include "XtensaGenAsmWriter.inc"
 
-void XtensaInstPrinter::printAddress(unsigned Base, int64_t Disp,
-                                     raw_ostream &O) {
-  O << Disp;
-  if (Base) {
-    O << '(';
-    O << getRegisterName(Base) << ')';
-  }
-}
-
 static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
   int Offset = 0;
   const MCSymbolRefExpr *SRE;
diff --git a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
index b1c6b063aa0007..8530c2560968b2 100644
--- a/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
+++ b/llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
@@ -35,9 +35,6 @@ class XtensaInstPrinter : public MCInstPrinter {
   // Print the given operand.
   static void printOperand(const MCOperand &MO, raw_ostream &O);
 
-  // Print an address
-  static void printAddress(unsigned Base, int64_t Disp, raw_ostream &O);
-
   // Override MCInstPrinter.
   void printRegName(raw_ostream &O, unsigned RegNo) const override;
   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
diff --git a/llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp b/llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
index 94ab837f6365ad..fe10dc84966ffe 100644
--- a/llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
@@ -258,18 +258,23 @@ bool XtensaAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
                                              unsigned OpNo,
                                              const char *ExtraCode,
                                              raw_ostream &OS) {
-  XtensaInstPrinter::printAddress(MI->getOperand(OpNo).getReg(),
-                                  MI->getOperand(OpNo + 1).getImm(), OS);
-  return false;
-}
+  if (ExtraCode && ExtraCode[0])
+    return true; // Unknown modifier.
+
+  assert(OpNo + 1 < MI->getNumOperands() && "Insufficient operands");
+
+  const MachineOperand &Base = MI->getOperand(OpNo);
+  const MachineOperand &Offset = MI->getOperand(OpNo + 1);
 
-void XtensaAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
-                                       raw_ostream &OS) {
-  OS << '%'
-     << XtensaInstPrinter::getRegisterName(MI->getOperand(opNum).getReg());
-  OS << "(";
-  OS << MI->getOperand(opNum + 1).getImm();
-  OS << ")";
+  assert(Base.isReg() &&
+         "Unexpected base pointer for inline asm memory operand.");
+  assert(Offset.isImm() && "Unexpected offset for inline asm memory operand.");
+
+  OS << XtensaInstPrinter::getRegisterName(Base.getReg());
+  OS << ", ";
+  OS << Offset.getImm();
+
+  return false;
 }
 
 // Force static initialization.
diff --git a/llvm/lib/Target/Xtensa/XtensaAsmPrinter.h b/llvm/lib/Target/Xtensa/XtensaAsmPrinter.h
index 50feaa0fcd2c0d..e17059a2d4c3bf 100644
--- a/llvm/lib/Target/Xtensa/XtensaAsmPrinter.h
+++ b/llvm/lib/Target/Xtensa/XtensaAsmPrinter.h
@@ -43,7 +43,6 @@ class LLVM_LIBRARY_VISIBILITY XtensaAsmPrinter : public AsmPrinter {
                        const char *ExtraCode, raw_ostream &O) override;
   bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
                              const char *ExtraCode, raw_ostream &OS) override;
-  void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &OS);
 };
 } // end namespace llvm
 
diff --git a/llvm/test/CodeGen/Xtensa/inline-asm.ll b/llvm/test/CodeGen/Xtensa/inline-asm.ll
new file mode 100644
index 00000000000000..7a267d51459811
--- /dev/null
+++ b/llvm/test/CodeGen/Xtensa/inline-asm.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=xtensa  -mcpu=esp32 -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefix=Xtensa %s
+
+
+define dso_local i32 @test_memptr(i32 noundef %0) local_unnamed_addr #0 {
+; Xtensa-LABEL: test_memptr:
+; Xtensa:       # %bb.0:
+; Xtensa-NEXT:    entry a1, 32
+; Xtensa-NEXT:    #APP
+; Xtensa-NEXT:    l32i	a2, a2, 0
+; Xtensa-NEXT:    #NO_APP
+; Xtensa-NEXT:    retw
+  %2 = inttoptr i32 %0 to i32*
+  %3 = call i32 asm sideeffect "l32i $0, $1", "=r,*m"(i32* elementtype(i32) %2)
+  ret i32 %3
+}
+
+attributes #0 = { nounwind }
+attributes #1 = { nounwind }
+