Skip to content

Commit d93245d

Browse files
GitshaoxiangGitshaoxiang
authored
add m5stack-core2 board (#4255)
* add m5stack-core2 board
1 parent c917ed2 commit d93245d

File tree

2 files changed

+159
-0
lines changed

2 files changed

+159
-0
lines changed

‎boards.txt‎

Lines changed: 99 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2616,6 +2616,105 @@ m5stack-atom.menu.DebugLevel.verbose=Verbose
26162616
m5stack-atom.menu.DebugLevel.verbose.build.code_debug=5
26172617

26182618

2619+
##############################################################
2620+
2621+
m5stack-core2.name=M5Stack-Core2
2622+
2623+
m5stack-core2.upload.tool=esptool_py
2624+
m5stack-core2.upload.maximum_size=6553600
2625+
m5stack-core2.upload.maximum_data_size=4521984
2626+
m5stack-core2.upload.wait_for_upload_port=true
2627+
2628+
m5stack-core2.serial.disableDTR=true
2629+
m5stack-core2.serial.disableRTS=true
2630+
2631+
m5stack-core2.build.mcu=esp32
2632+
m5stack-core2.build.core=esp32
2633+
m5stack-core2.build.variant=m5stack_core2
2634+
m5stack-core2.build.board=M5STACK_Core2
2635+
2636+
m5stack-core2.build.f_cpu=240000000L
2637+
m5stack-core2.build.flash_size=16MB
2638+
m5stack-core2.build.flash_freq=80m
2639+
m5stack-core2.build.flash_mode=dio
2640+
m5stack-core2.build.boot=dio
2641+
m5stack-core2.build.partitions=default_16MB
2642+
m5stack-core2.build.defines=
2643+
2644+
m5stack-core2.menu.PSRAM.enabled=Enabled
2645+
m5stack-core2.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM -mfix-esp32-psram-cache-issue
2646+
m5stack-core2.menu.PSRAM.disabled=Disabled
2647+
m5stack-core2.menu.PSRAM.disabled.build.defines=
2648+
2649+
m5stack-core2.menu.PartitionScheme.default=Default (2 x 6.5 MB app, 3.6 MB SPIFFS)
2650+
m5stack-core2.menu.PartitionScheme.default.build.partitions=default_16MB
2651+
m5stack-core2.menu.PartitionScheme.default.upload.maximum_size=6553600
2652+
m5stack-core2.menu.PartitionScheme.large_spiffs=Large SPIFFS (7 MB)
2653+
m5stack-core2.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
2654+
m5stack-core2.menu.PartitionScheme.large_spiffs.upload.maximum_size=4685824
2655+
2656+
m5stack-core2.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS)
2657+
m5stack-core2.menu.PartitionScheme.minimal.build.partitions=minimal
2658+
m5stack-core2.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS)
2659+
m5stack-core2.menu.PartitionScheme.no_ota.build.partitions=no_ota
2660+
m5stack-core2.menu.PartitionScheme.no_ota.upload.maximum_size=2097152
2661+
m5stack-core2.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS)
2662+
m5stack-core2.menu.PartitionScheme.noota_3g.build.partitions=noota_3g
2663+
m5stack-core2.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576
2664+
m5stack-core2.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS)
2665+
m5stack-core2.menu.PartitionScheme.huge_app.build.partitions=huge_app
2666+
m5stack-core2.menu.PartitionScheme.huge_app.upload.maximum_size=3145728
2667+
m5stack-core2.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS)
2668+
m5stack-core2.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs
2669+
m5stack-core2.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080
2670+
2671+
m5stack-core2.menu.CPUFreq.240=240MHz (WiFi/BT)
2672+
m5stack-core2.menu.CPUFreq.240.build.f_cpu=240000000L
2673+
m5stack-core2.menu.CPUFreq.160=160MHz (WiFi/BT)
2674+
m5stack-core2.menu.CPUFreq.160.build.f_cpu=160000000L
2675+
m5stack-core2.menu.CPUFreq.80=80MHz (WiFi/BT)
2676+
m5stack-core2.menu.CPUFreq.80.build.f_cpu=80000000L
2677+
m5stack-core2.menu.CPUFreq.40=40MHz (40MHz XTAL)
2678+
m5stack-core2.menu.CPUFreq.40.build.f_cpu=40000000L
2679+
m5stack-core2.menu.CPUFreq.26=26MHz (26MHz XTAL)
2680+
m5stack-core2.menu.CPUFreq.26.build.f_cpu=26000000L
2681+
m5stack-core2.menu.CPUFreq.20=20MHz (40MHz XTAL)
2682+
m5stack-core2.menu.CPUFreq.20.build.f_cpu=20000000L
2683+
m5stack-core2.menu.CPUFreq.13=13MHz (26MHz XTAL)
2684+
m5stack-core2.menu.CPUFreq.13.build.f_cpu=13000000L
2685+
m5stack-core2.menu.CPUFreq.10=10MHz (40MHz XTAL)
2686+
m5stack-core2.menu.CPUFreq.10.build.f_cpu=10000000L
2687+
2688+
m5stack-core2.menu.UploadSpeed.921600=921600
2689+
m5stack-core2.menu.UploadSpeed.921600.upload.speed=921600
2690+
m5stack-core2.menu.UploadSpeed.115200=115200
2691+
m5stack-core2.menu.UploadSpeed.115200.upload.speed=115200
2692+
m5stack-core2.menu.UploadSpeed.256000.windows=256000
2693+
m5stack-core2.menu.UploadSpeed.256000.upload.speed=256000
2694+
m5stack-core2.menu.UploadSpeed.230400.windows.upload.speed=256000
2695+
m5stack-core2.menu.UploadSpeed.230400=230400
2696+
m5stack-core2.menu.UploadSpeed.230400.upload.speed=230400
2697+
m5stack-core2.menu.UploadSpeed.460800.linux=460800
2698+
m5stack-core2.menu.UploadSpeed.460800.macosx=460800
2699+
m5stack-core2.menu.UploadSpeed.460800.upload.speed=460800
2700+
m5stack-core2.menu.UploadSpeed.512000.windows=512000
2701+
m5stack-core2.menu.UploadSpeed.512000.upload.speed=512000
2702+
m5stack-core2.menu.UploadSpeed.1500000=1500000
2703+
m5stack-core2.menu.UploadSpeed.1500000.upload.speed=1500000
2704+
2705+
m5stack-core2.menu.DebugLevel.none=None
2706+
m5stack-core2.menu.DebugLevel.none.build.code_debug=0
2707+
m5stack-core2.menu.DebugLevel.error=Error
2708+
m5stack-core2.menu.DebugLevel.error.build.code_debug=1
2709+
m5stack-core2.menu.DebugLevel.warn=Warn
2710+
m5stack-core2.menu.DebugLevel.warn.build.code_debug=2
2711+
m5stack-core2.menu.DebugLevel.info=Info
2712+
m5stack-core2.menu.DebugLevel.info.build.code_debug=3
2713+
m5stack-core2.menu.DebugLevel.debug=Debug
2714+
m5stack-core2.menu.DebugLevel.debug.build.code_debug=4
2715+
m5stack-core2.menu.DebugLevel.verbose=Verbose
2716+
m5stack-core2.menu.DebugLevel.verbose.build.code_debug=5
2717+
26192718
##############################################################
26202719

26212720
odroid_esp32.name=ODROID ESP32

‎variants/m5stack_core2/pins_arduino.h‎

Lines changed: 60 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,60 @@
1+
#ifndef Pins_Arduino_h
2+
#define Pins_Arduino_h
3+
4+
#include <stdint.h>
5+
6+
#define EXTERNAL_NUM_INTERRUPTS 16
7+
#define NUM_DIGITAL_PINS 20
8+
#define NUM_ANALOG_INPUTS 16
9+
10+
#define analogInputToDigitalPin(p) (((p)<20)?(esp32_adc2gpio[(p)]):-1)
11+
#define digitalPinToInterrupt(p) (((p)<40)?(p):-1)
12+
#define digitalPinHasPWM(p) (p < 34)
13+
14+
static const uint8_t TX = 1;
15+
static const uint8_t RX = 3;
16+
17+
static const uint8_t TXD2 = 14;
18+
static const uint8_t RXD2 = 13;
19+
20+
static const uint8_t SDA = 32;
21+
static const uint8_t SCL = 33;
22+
23+
static const uint8_t SS = 5;
24+
static const uint8_t MOSI = 23;
25+
static const uint8_t MISO = 38;
26+
static const uint8_t SCK = 18;
27+
28+
static const uint8_t G23 = 23;
29+
static const uint8_t G38 = 38;
30+
static const uint8_t G18 = 18;
31+
static const uint8_t G3 = 3;
32+
static const uint8_t G13 = 13;
33+
static const uint8_t G21 = 21;
34+
static const uint8_t G32 = 32;
35+
static const uint8_t G27 = 27;
36+
static const uint8_t G2 = 2;
37+
static const uint8_t G35 = 35;
38+
static const uint8_t G36 = 36;
39+
static const uint8_t G25 = 25;
40+
static const uint8_t G26 = 26;
41+
static const uint8_t G1 = 1;
42+
static const uint8_t G14 = 14;
43+
static const uint8_t G22 = 22;
44+
static const uint8_t G33 = 33;
45+
static const uint8_t G19 = 19;
46+
static const uint8_t G0 = 0;
47+
static const uint8_t G34 = 34;
48+
49+
static const uint8_t G12 = 12;
50+
static const uint8_t G15 = 15;
51+
static const uint8_t G17 = 17;
52+
static const uint8_t G5 = 5;
53+
54+
static const uint8_t DAC1 = 25;
55+
static const uint8_t DAC2 = 26;
56+
57+
static const uint8_t ADC1 = 35;
58+
static const uint8_t ADC2 = 36;
59+
60+
#endif /* Pins_Arduino_h */

0 commit comments

Comments
 (0)