@@ -115,8 +115,9 @@ static void IRAM_ATTR _uart_isr(void *arg)
115115 while (uart -> dev -> status .rxfifo_cnt || (uart -> dev -> mem_rx_status .wr_addr != uart -> dev -> mem_rx_status .rd_addr )) {
116116 c = uart -> dev -> fifo .rw_byte ;
117117#else
118+ uint32_t fifo_reg = UART_FIFO_AHB_REG (i );
118119 while (uart -> dev -> status .rxfifo_cnt ) {
119- c = READ_PERI_REG ( UART_FIFO_AHB_REG ( i ) );
120+ c = ESP_REG ( fifo_reg );
120121#endif
121122 if (uart -> queue != NULL ) {
122123 xQueueSendFromISR (uart -> queue , & c , & xHigherPriorityTaskWoken );
@@ -343,8 +344,9 @@ void uartRxFifoToQueue(uart_t* uart)
343344 while (uart -> dev -> status .rxfifo_cnt || (uart -> dev -> mem_rx_status .wr_addr != uart -> dev -> mem_rx_status .rd_addr )) {
344345 c = uart -> dev -> fifo .rw_byte ;
345346#else
347+ uint32_t fifo_reg = UART_FIFO_AHB_REG (uart -> num );
346348 while (uart -> dev -> status .rxfifo_cnt ) {
347- c = uart -> dev -> ahb_fifo . rw_byte ;
349+ c = ESP_REG ( fifo_reg ) ;
348350#endif
349351 xQueueSend (uart -> queue , & c , 0 );
350352 }
@@ -398,7 +400,7 @@ void uartWrite(uart_t* uart, uint8_t c)
398400#if CONFIG_IDF_TARGET_ESP32
399401 uart -> dev -> fifo .rw_byte = c ;
400402#else
401- uart -> dev -> ahb_fifo . rw_byte = c ;
403+ ESP_REG ( UART_FIFO_AHB_REG ( uart -> num )) = c ;
402404#endif
403405 UART_MUTEX_UNLOCK ();
404406}
@@ -409,12 +411,15 @@ void uartWriteBuf(uart_t* uart, const uint8_t * data, size_t len)
409411 return ;
410412 }
411413 UART_MUTEX_LOCK ();
414+ #ifndef CONFIG_IDF_TARGET_ESP32
415+ uint32_t fifo_reg = UART_FIFO_AHB_REG (uart -> num );
416+ #endif
412417 while (len ) {
413418 while (uart -> dev -> status .txfifo_cnt == 0x7F );
414419#if CONFIG_IDF_TARGET_ESP32
415420 uart -> dev -> fifo .rw_byte = * data ++ ;
416421#else
417- uart -> dev -> ahb_fifo . rw_byte = * data ++ ;
422+ ESP_REG ( fifo_reg ) = * data ++ ;
418423#endif
419424 len -- ;
420425 }
@@ -483,8 +488,9 @@ static void uart_on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old
483488 while (uart -> dev -> status .rxfifo_cnt != 0 || (uart -> dev -> mem_rx_status .wr_addr != uart -> dev -> mem_rx_status .rd_addr )) {
484489 c = uart -> dev -> fifo .rw_byte ;
485490#else
491+ uint32_t fifo_reg = UART_FIFO_AHB_REG (uart -> num );
486492 while (uart -> dev -> status .rxfifo_cnt != 0 ) {
487- c = uart -> dev -> ahb_fifo . rw_byte ;
493+ c = ESP_REG ( fifo_reg ) ;
488494#endif
489495 if (uart -> queue != NULL ) {
490496 xQueueSend (uart -> queue , & c , 1 ); //&xHigherPriorityTaskWoken);
@@ -537,7 +543,7 @@ static void IRAM_ATTR uart0_write_char(char c)
537543 ESP_REG (DR_REG_UART_BASE ) = c ;
538544#else
539545 while (UART0 .status .txfifo_cnt == 0x7F );
540- UART0 . ahb_fifo . rw_byte = c ;
546+ WRITE_PERI_REG ( UART_FIFO_AHB_REG ( 0 ), c ) ;
541547#endif
542548}
543549
@@ -548,7 +554,7 @@ static void IRAM_ATTR uart1_write_char(char c)
548554 ESP_REG (DR_REG_UART1_BASE ) = c ;
549555#else
550556 while (UART1 .status .txfifo_cnt == 0x7F );
551- UART1 . ahb_fifo . rw_byte = c ;
557+ WRITE_PERI_REG ( UART_FIFO_AHB_REG ( 1 ), c ) ;
552558#endif
553559}
554560
0 commit comments