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me-no-devme-no-dev
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Print full chip report when log level is sufficient (#8282)
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‎CMakeLists.txt‎

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@@ -25,6 +25,7 @@ endif()
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set(CORE_SRCS
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cores/esp32/base64.cpp
2727
cores/esp32/cbuf.cpp
28+
cores/esp32/chip-debug-report.cpp
2829
cores/esp32/esp32-hal-adc.c
2930
cores/esp32/esp32-hal-bt.c
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cores/esp32/esp32-hal-cpu.c

‎cores/esp32/Arduino.h‎

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@@ -200,6 +200,9 @@ uint16_t makeWord(uint8_t h, uint8_t l);
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size_t getArduinoLoopTaskStackSize(void);
201201
#define SET_LOOP_TASK_STACK_SIZE(sz) size_t getArduinoLoopTaskStackSize() { return sz;}
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203+
bool shouldPrintChipDebugReport(void);
204+
#define ENABLE_CHIP_DEBUG_REPORT bool shouldPrintChipDebugReport(void){return true;}
205+
203206
// allows user to bypass esp_spiram_test()
204207
bool esp_psram_extram_test(void);
205208
#define BYPASS_SPIRAM_TEST(bypass) bool testSPIRAM(void) { if (bypass) return true; else return esp_psram_extram_test(); }

‎cores/esp32/chip-debug-report.cpp‎

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#include "esp_heap_caps.h"
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#include "esp_chip_info.h"
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#include "esp_idf_version.h"
4+
#include "esp_arduino_version.h"
5+
#include "esp_rom_spiflash.h"
6+
#include "esp_flash.h"
7+
#include "esp_partition.h"
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#include "esp_app_format.h"
9+
#include "soc/efuse_reg.h"
10+
#include "soc/rtc.h"
11+
#include "soc/spi_reg.h"
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#if CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/spi_flash.h"
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#endif
15+
#include "esp_bit_defs.h"
16+
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#include "Arduino.h"
18+
#include "esp32-hal-periman.h"
19+
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#define chip_report_printf log_printf
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#define printMemCapsInfo(caps) _printMemCapsInfo(MALLOC_CAP_##caps, #caps)
23+
#define b2kb(b) ((float)b/1024.0)
24+
#define b2mb(b) ((float)b/(1024.0*1024.0))
25+
static void _printMemCapsInfo(uint32_t caps, const char * caps_str){
26+
multi_heap_info_t info;
27+
size_t total = heap_caps_get_total_size(caps);
28+
heap_caps_get_info(&info, caps);
29+
chip_report_printf("%s Memory Info:\n", caps_str);
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chip_report_printf("------------------------------------------\n");
31+
chip_report_printf(" Total Size : %8u B (%6.1f KB)\n", total, b2kb(total));
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chip_report_printf(" Free Bytes : %8u B (%6.1f KB)\n", info.total_free_bytes, b2kb(info.total_free_bytes));
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chip_report_printf(" Allocated Bytes : %8u B (%6.1f KB)\n", info.total_allocated_bytes, b2kb(info.total_allocated_bytes));
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chip_report_printf(" Minimum Free Bytes: %8u B (%6.1f KB)\n", info.minimum_free_bytes, b2kb(info.minimum_free_bytes));
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chip_report_printf(" Largest Free Block: %8u B (%6.1f KB)\n", info.largest_free_block, b2kb(info.largest_free_block));
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}
37+
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static void printPkgVersion(void){
39+
chip_report_printf(" Package : ");
40+
#if CONFIG_IDF_TARGET_ESP32
41+
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_PACKAGE);
42+
switch(pkg_ver){
43+
case EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3: chip_report_printf("D0WD-R2-V3"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6 : chip_report_printf("D0WD-Q6"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5 : chip_report_printf("D0WD-Q5"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5 : chip_report_printf("D2WD-Q5"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH : chip_report_printf("U4WD-H"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 : chip_report_printf("PICO-D4"); break;
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case EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302: chip_report_printf("PICO-V3-02"); break;
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}
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#elif CONFIG_IDF_TARGET_ESP32S2
52+
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_PKG_VERSION);
53+
switch (pkg_ver) {
54+
case 1: chip_report_printf("FH16"); break;
55+
case 2: chip_report_printf("FH32"); break;
56+
default: chip_report_printf("%lu", pkg_ver); break;
57+
}
58+
#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
59+
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SPI_SYS_3_REG, EFUSE_PKG_VERSION);
60+
chip_report_printf("%lu", pkg_ver);
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#elif CONFIG_IDF_TARGET_ESP32C2
62+
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_BLK2_DATA1_REG, EFUSE_PKG_VERSION);
63+
chip_report_printf("%lu", pkg_ver);
64+
#elif CONFIG_IDF_TARGET_ESP32H2
65+
uint32_t pkg_ver = REG_GET_FIELD(EFUSE_RD_MAC_SYS_4_REG, EFUSE_PKG_VERSION);
66+
chip_report_printf("%lu", pkg_ver);
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#else
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chip_report_printf("Unknown");
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#endif
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chip_report_printf("\n");
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}
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static void printChipInfo(void){
74+
esp_chip_info_t info;
75+
esp_chip_info(&info);
76+
chip_report_printf("Chip Info:\n");
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chip_report_printf("------------------------------------------\n");
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chip_report_printf(" Model : ");
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switch(info.model){
80+
case CHIP_ESP32: chip_report_printf("ESP32\n"); break;
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case CHIP_ESP32S2: chip_report_printf("ESP32-S2\n"); break;
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case CHIP_ESP32S3: chip_report_printf("ESP32-S3\n"); break;
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case CHIP_ESP32C2: chip_report_printf("ESP32-C2\n"); break;
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case CHIP_ESP32C3: chip_report_printf("ESP32-C3\n"); break;
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case CHIP_ESP32C6: chip_report_printf("ESP32-C6\n"); break;
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case CHIP_ESP32H2: chip_report_printf("ESP32-H2\n"); break;
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default: chip_report_printf("Unknown %d\n", info.model); break;
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}
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printPkgVersion();
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chip_report_printf(" Revision : ");
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if(info.revision > 0xFF){
92+
chip_report_printf("%d.%d\n", info.revision >> 8, info.revision & 0xFF);
93+
} else {
94+
chip_report_printf("%d\n", info.revision);
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}
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chip_report_printf(" Cores : %d\n", info.cores);
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rtc_cpu_freq_config_t conf;
98+
rtc_clk_cpu_freq_get_config(&conf);
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chip_report_printf(" Frequency : %lu MHz\n", conf.freq_mhz);
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chip_report_printf(" Embedded Flash : %s\n", (info.features & CHIP_FEATURE_EMB_FLASH)?"Yes":"No");
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chip_report_printf(" Embedded PSRAM : %s\n", (info.features & CHIP_FEATURE_EMB_PSRAM)?"Yes":"No");
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chip_report_printf(" 2.4GHz WiFi : %s\n", (info.features & CHIP_FEATURE_WIFI_BGN)?"Yes":"No");
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chip_report_printf(" Classic BT : %s\n", (info.features & CHIP_FEATURE_BT)?"Yes":"No");
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chip_report_printf(" BT Low Energy : %s\n", (info.features & CHIP_FEATURE_BLE)?"Yes":"No");
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chip_report_printf(" IEEE 802.15.4 : %s\n", (info.features & CHIP_FEATURE_IEEE802154)?"Yes":"No");
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}
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108+
static void printFlashInfo(void){
109+
#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2
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#define ESP_FLASH_IMAGE_BASE 0x1000
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#else
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#define ESP_FLASH_IMAGE_BASE 0x0000
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#endif
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// REG_SPI_BASE is not defined for S3/C3 ??
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#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
116+
#ifndef REG_SPI_BASE
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#define REG_SPI_BASE(i) (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
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#endif // REG_SPI_BASE
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#endif // TARGET
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chip_report_printf("Flash Info:\n");
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chip_report_printf("------------------------------------------\n");
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uint32_t hw_size = 1 << (g_rom_flashchip.device_id & 0xFF);
124+
chip_report_printf(" Chip Size : %8lu B (%.0f MB)\n", hw_size, b2mb(hw_size));
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chip_report_printf(" Block Size : %8lu B (%6.1f KB)\n", g_rom_flashchip.block_size, b2kb(g_rom_flashchip.block_size));
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chip_report_printf(" Sector Size : %8lu B (%6.1f KB)\n", g_rom_flashchip.sector_size, b2kb(g_rom_flashchip.sector_size));
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chip_report_printf(" Page Size : %8lu B (%6.1f KB)\n", g_rom_flashchip.page_size, b2kb(g_rom_flashchip.page_size));
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esp_image_header_t fhdr;
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esp_flash_read(esp_flash_default_chip, (void*)&fhdr, ESP_FLASH_IMAGE_BASE, sizeof(esp_image_header_t));
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if(fhdr.magic == ESP_IMAGE_HEADER_MAGIC) {
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uint32_t f_freq = 0;
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switch(fhdr.spi_speed) {
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#if CONFIG_IDF_TARGET_ESP32H2
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case 0x0: f_freq = 32; break;
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case 0x2: f_freq = 16; break;
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case 0xf: f_freq = 64; break;
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#else
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case 0x0: f_freq = 40; break;
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case 0x1: f_freq = 26; break;
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case 0x2: f_freq = 20; break;
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case 0xf: f_freq = 80; break;
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#endif
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default: f_freq = fhdr.spi_speed; break;
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}
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chip_report_printf(" Bus Speed : %lu MHz\n", f_freq);
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}
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chip_report_printf(" Bus Mode : ");
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#if CONFIG_ESPTOOLPY_OCT_FLASH
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chip_report_printf("OPI\n");
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#elif CONFIG_ESPTOOLPY_FLASHMODE_QIO
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chip_report_printf("QIO\n");
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#elif CONFIG_ESPTOOLPY_FLASHMODE_QOUT
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chip_report_printf("QOUT\n");
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DIO
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chip_report_printf("DIO\n");
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#elif CONFIG_ESPTOOLPY_FLASHMODE_DOUT
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chip_report_printf("DOUT\n");
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#endif
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}
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static void printPartitionsInfo(void){
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chip_report_printf("Partitions Info:\n");
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chip_report_printf("------------------------------------------\n");
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esp_partition_iterator_t iterator = esp_partition_find(ESP_PARTITION_TYPE_ANY, ESP_PARTITION_SUBTYPE_ANY, NULL);
165+
if(iterator != NULL){
166+
esp_partition_iterator_t it = iterator;
167+
while(it != NULL){
168+
const esp_partition_t* partition = esp_partition_get(it);
169+
if(partition){
170+
chip_report_printf(" %17s : addr: 0x%08X, size: %7.1f KB", partition->label, partition->address, b2kb(partition->size));
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if(partition->type == ESP_PARTITION_TYPE_APP){
172+
chip_report_printf(", type: APP");
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if(partition->subtype == 0){
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chip_report_printf(", subtype: FACTORY");
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} else if(partition->subtype >= 0x10 && partition->subtype < 0x20){
176+
chip_report_printf(", subtype: OTA_%lu", partition->subtype - 0x10);
177+
} else if(partition->subtype == 0x20){
178+
chip_report_printf(", subtype: TEST");
179+
} else {
180+
chip_report_printf(", subtype: 0x%02X", partition->subtype);
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}
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} else {
183+
chip_report_printf(", type: DATA");
184+
chip_report_printf(", subtype: ");
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switch(partition->subtype){
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case ESP_PARTITION_SUBTYPE_DATA_OTA: chip_report_printf("OTA"); break;
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case ESP_PARTITION_SUBTYPE_DATA_PHY: chip_report_printf("PHY"); break;
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case ESP_PARTITION_SUBTYPE_DATA_NVS: chip_report_printf("NVS"); break;
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case ESP_PARTITION_SUBTYPE_DATA_COREDUMP: chip_report_printf("COREDUMP"); break;
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case ESP_PARTITION_SUBTYPE_DATA_NVS_KEYS: chip_report_printf("NVS_KEYS"); break;
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case ESP_PARTITION_SUBTYPE_DATA_EFUSE_EM: chip_report_printf("EFUSE_EM"); break;
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case ESP_PARTITION_SUBTYPE_DATA_UNDEFINED: chip_report_printf("UNDEFINED"); break;
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case ESP_PARTITION_SUBTYPE_DATA_ESPHTTPD: chip_report_printf("ESPHTTPD"); break;
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case ESP_PARTITION_SUBTYPE_DATA_FAT: chip_report_printf("FAT"); break;
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case ESP_PARTITION_SUBTYPE_DATA_SPIFFS: chip_report_printf("SPIFFS"); break;
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default: chip_report_printf("0x%02X", partition->subtype); break;
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}
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}
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chip_report_printf("\n");
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}
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it = esp_partition_next(it);
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}
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//esp_partition_iterator_release(iterator);
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}
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}
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static void printSoftwareInfo(void){
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chip_report_printf("Software Info:\n");
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chip_report_printf("------------------------------------------\n");
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chip_report_printf(" Compile Date/Time : %s %s\n", __DATE__, __TIME__);
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#ifdef ARDUINO_HOST_OS
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chip_report_printf(" Compile Host OS : %s\n", ARDUINO_HOST_OS);
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#endif
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chip_report_printf(" ESP-IDF Version : %s\n", esp_get_idf_version());
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chip_report_printf(" Arduino Version : %s\n", ESP_ARDUINO_VERSION_STR);
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}
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static void printBoardInfo(void){
219+
chip_report_printf("Board Info:\n");
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chip_report_printf("------------------------------------------\n");
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chip_report_printf(" Arduino Board : %s\n", ARDUINO_BOARD);
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chip_report_printf(" Arduino Variant : %s\n", ARDUINO_VARIANT);
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#ifdef ARDUINO_FQBN
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chip_report_printf(" Arduino FQBN : %s\n", ARDUINO_FQBN);
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#else
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#ifdef CORE_DEBUG_LEVEL
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chip_report_printf(" Core Debug Level : %d\n", CORE_DEBUG_LEVEL);
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#endif
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#ifdef ARDUINO_RUNNING_CORE
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chip_report_printf(" Arduino Runs Core : %d\n", ARDUINO_RUNNING_CORE);
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chip_report_printf(" Arduino Events on : %d\n", ARDUINO_EVENT_RUNNING_CORE);
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#endif
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#ifdef ARDUINO_USB_MODE
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chip_report_printf(" Arduino USB Mode : %d\n", ARDUINO_USB_MODE);
235+
#endif
236+
#ifdef ARDUINO_USB_CDC_ON_BOOT
237+
chip_report_printf(" CDC On Boot : %d\n", ARDUINO_USB_CDC_ON_BOOT);
238+
#endif
239+
#endif /* ARDUINO_FQBN */
240+
}
241+
242+
static void printPerimanInfo(void){
243+
chip_report_printf("GPIO Info:\n");
244+
chip_report_printf("------------------------------------------\n");
245+
for(uint8_t i = 0; i < SOC_GPIO_PIN_COUNT; i++){
246+
if(!perimanPinIsValid(i)){
247+
continue;//invalid pin
248+
}
249+
peripheral_bus_type_t type = perimanGetPinBusType(i);
250+
if(type == ESP32_BUS_TYPE_INIT){
251+
continue;//unused pin
252+
}
253+
chip_report_printf(" %17u : ", i);
254+
switch(type){
255+
case ESP32_BUS_TYPE_GPIO: chip_report_printf("GPIO\n"); break;
256+
case ESP32_BUS_TYPE_UART: chip_report_printf("UART\n"); break;
257+
#if SOC_SDM_SUPPORTED
258+
case ESP32_BUS_TYPE_SIGMADELTA: chip_report_printf("SIGMADELTA\n"); break;
259+
#endif
260+
#if SOC_ADC_SUPPORTED
261+
case ESP32_BUS_TYPE_ADC_ONESHOT: chip_report_printf("ADC_ONESHOT\n"); break;
262+
case ESP32_BUS_TYPE_ADC_CONT: chip_report_printf("ADC_CONT\n"); break;
263+
#endif
264+
#if SOC_DAC_SUPPORTED
265+
case ESP32_BUS_TYPE_DAC_ONESHOT: chip_report_printf("DAC_ONESHOT\n"); break;
266+
case ESP32_BUS_TYPE_DAC_CONT: chip_report_printf("DAC_CONT\n"); break;
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case ESP32_BUS_TYPE_DAC_COSINE: chip_report_printf("DAC_COSINE\n"); break;
268+
#endif
269+
#if SOC_LEDC_SUPPORTED
270+
case ESP32_BUS_TYPE_LEDC: chip_report_printf("LEDC\n"); break;
271+
#endif
272+
#if SOC_RMT_SUPPORTED
273+
case ESP32_BUS_TYPE_RMT_TX: chip_report_printf("RMT_TX\n"); break;
274+
case ESP32_BUS_TYPE_RMT_RX: chip_report_printf("RMT_RX\n"); break;
275+
#endif
276+
#if SOC_I2S_SUPPORTED
277+
case ESP32_BUS_TYPE_I2S_STD: chip_report_printf("I2S_STD\n"); break;
278+
case ESP32_BUS_TYPE_I2S_PDM: chip_report_printf("I2S_PDM\n"); break;
279+
case ESP32_BUS_TYPE_I2S_TDM: chip_report_printf("I2S_TDM\n"); break;
280+
#endif
281+
#if SOC_I2C_SUPPORTED
282+
case ESP32_BUS_TYPE_I2C_MASTER: chip_report_printf("I2C_MASTER\n"); break;
283+
case ESP32_BUS_TYPE_I2C_SLAVE: chip_report_printf("I2C_SLAVE\n"); break;
284+
#endif
285+
#if SOC_GPSPI_SUPPORTED
286+
case ESP32_BUS_TYPE_SPI_MASTER: chip_report_printf("SPI_MASTER\n"); break;
287+
#endif
288+
#if SOC_SDMMC_HOST_SUPPORTED
289+
case ESP32_BUS_TYPE_SDMMC: chip_report_printf("SDMMC\n"); break;
290+
#endif
291+
#if SOC_TOUCH_SENSOR_SUPPORTED
292+
case ESP32_BUS_TYPE_TOUCH: chip_report_printf("TOUCH\n"); break;
293+
#endif
294+
#if SOC_USB_SERIAL_JTAG_SUPPORTED || SOC_USB_OTG_SUPPORTED
295+
case ESP32_BUS_TYPE_USB: chip_report_printf("USB\n"); break;
296+
#endif
297+
default: chip_report_printf("%d\n", type); break;
298+
}
299+
}
300+
}
301+
302+
void printBeforeSetupInfo(void){
303+
#if ARDUINO_USB_CDC_ON_BOOT
304+
Serial.begin(0);
305+
Serial.setDebugOutput(true);
306+
uint8_t t = 0;
307+
while(!Serial && (t++ < 200)) delay(10); //wait up to 2 seconds for the IDE to connect
308+
#endif
309+
chip_report_printf("=========== Before Setup Start ===========\n");
310+
printChipInfo();
311+
chip_report_printf("------------------------------------------\n");
312+
printMemCapsInfo(INTERNAL);
313+
chip_report_printf("------------------------------------------\n");
314+
if(psramFound()){
315+
printMemCapsInfo(SPIRAM);
316+
chip_report_printf(" Bus Mode : ");
317+
#if CONFIG_SPIRAM_MODE_OCT
318+
chip_report_printf("OPI\n");
319+
#else
320+
chip_report_printf("QSPI\n");
321+
#endif
322+
chip_report_printf("------------------------------------------\n");
323+
}
324+
printFlashInfo();
325+
chip_report_printf("------------------------------------------\n");
326+
printPartitionsInfo();
327+
chip_report_printf("------------------------------------------\n");
328+
printSoftwareInfo();
329+
chip_report_printf("------------------------------------------\n");
330+
printBoardInfo();
331+
chip_report_printf("============ Before Setup End ============\n");
332+
delay(100); //allow the print to finish
333+
}
334+
335+
void printAfterSetupInfo(void){
336+
chip_report_printf("=========== After Setup Start ============\n");
337+
printMemCapsInfo(INTERNAL);
338+
chip_report_printf("------------------------------------------\n");
339+
if(psramFound()){
340+
printMemCapsInfo(SPIRAM);
341+
chip_report_printf("------------------------------------------\n");
342+
}
343+
printPerimanInfo();
344+
chip_report_printf("============ After Setup End =============\n");
345+
delay(20); //allow the print to finish
346+
}

‎cores/esp32/chip-debug-report.h‎

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/*
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* SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
#pragma once
7+
8+
void printBeforeSetupInfo(void);
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void printAfterSetupInfo(void);

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