diff --git a/esp-hal-common/src/rtc_cntl/mod.rs b/esp-hal-common/src/rtc_cntl/mod.rs index 3b888c461b..dab04095f1 100644 --- a/esp-hal-common/src/rtc_cntl/mod.rs +++ b/esp-hal-common/src/rtc_cntl/mod.rs @@ -83,7 +83,7 @@ use crate::efuse::Efuse; use crate::peripherals::{LP_TIMER, LP_WDT}; #[cfg(not(any(esp32c6, esp32h2)))] use crate::peripherals::{RTC_CNTL, TIMG0}; -#[cfg(any(esp32, esp32s3, esp32c3))] +#[cfg(any(esp32, esp32s3, esp32c3, esp32c6))] use crate::rtc_cntl::sleep::{RtcSleepConfig, WakeSource, WakeTriggers}; use crate::{ clock::Clock, diff --git a/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs b/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs index 8fe478f700..fa1669303c 100644 --- a/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs +++ b/esp-hal-common/src/rtc_cntl/sleep/esp32c6.rs @@ -1,4 +1,4 @@ -use crate::system::RadioPeripherals; +use crate::{rtc_cntl::sleep::WakeTriggers, system::RadioPeripherals, Rtc}; bitfield::bitfield! { #[derive(Clone, Copy)] @@ -157,9 +157,9 @@ fn pmu_power_domain_force_default() { fn modem_clock_domain_power_state_icg_map_init() { // C6 has SOC_PM_SUPPORT_PMU_MODEM_STATE defined - // const ICG_NOGATING_SLEEP: u32 = 1 << 0; // unused - const ICG_NOGATING_MODEM: u32 = 1 << 1; - const ICG_NOGATING_ACTIVE: u32 = 1 << 2; + // const ICG_NOGATING_SLEEP: u8 = 1 << 0; // unused + const ICG_NOGATING_MODEM: u8 = 1 << 1; + const ICG_NOGATING_ACTIVE: u8 = 1 << 2; // the ICG code's bit 0, 1 and 2 indicates the ICG state // of pmu SLEEP, MODEM and ACTIVE mode respectively @@ -213,7 +213,7 @@ impl RtcSlowClockSource { fn current() -> Self { // clk_ll_rtc_slow_get_src() let lp_clkrst = unsafe { &*esp32c6::LP_CLKRST::ptr() }; - match lp_clkrst.lp_clk_conf.read().slow_clk_sel() { + match lp_clkrst.lp_clk_conf.read().slow_clk_sel().bits() { 0 => Self::RcSlow, 1 => Self::XTAL32K, 2 => Self::RC32K, @@ -307,7 +307,7 @@ fn modem_clock_hal_select_wifi_lpclk_source(src: ModemClockLpclkSource) { } } -fn modem_lpcon_ll_set_wifi_lpclk_divisor_value(divider: u32) { +fn modem_lpcon_ll_set_wifi_lpclk_divisor_value(divider: u16) { unsafe { modem_lpcon() .wifi_lp_clk_conf @@ -316,6 +316,7 @@ fn modem_lpcon_ll_set_wifi_lpclk_divisor_value(divider: u32) { } fn modem_clock_hal_enable_wifipwr_clock(enable: bool) { + // FIXME: esp-idf uses refcounting here for later revisions. unsafe { modem_lpcon() .clk_conf @@ -326,7 +327,7 @@ fn modem_clock_hal_enable_wifipwr_clock(enable: bool) { fn modem_clock_select_lp_clock_source( periph: RadioPeripherals, src: ModemClockLpclkSource, - divider: u32, + divider: u16, ) { match periph { RadioPeripherals::Wifi => { diff --git a/esp-hal-common/src/rtc_cntl/sleep/mod.rs b/esp-hal-common/src/rtc_cntl/sleep/mod.rs index 31ddfe8f2c..65c6463a4c 100644 --- a/esp-hal-common/src/rtc_cntl/sleep/mod.rs +++ b/esp-hal-common/src/rtc_cntl/sleep/mod.rs @@ -21,14 +21,14 @@ use core::{cell::RefCell, time::Duration}; -#[cfg(esp32c3)] +#[cfg(any(esp32c3, esp32c6))] use crate::gpio::RTCPinWithResistors; use crate::{gpio::RTCPin, Rtc}; #[cfg_attr(esp32, path = "esp32.rs")] #[cfg_attr(esp32s3, path = "esp32s3.rs")] #[cfg_attr(esp32c3, path = "esp32c3.rs")] -#[cfg_attr(feature = "esp32c6", path = "esp32c6.rs")] +#[cfg_attr(esp32c6, path = "esp32c6.rs")] mod sleep_impl; pub use sleep_impl::*; @@ -98,7 +98,7 @@ impl<'a, 'b> Ext1WakeupSource<'a, 'b> { pub struct RtcioWakeupSource<'a, 'b> { #[cfg(xtensa)] pins: RefCell<&'a mut [(&'b mut dyn RTCPin, WakeupLevel)]>, - #[cfg(esp32c3)] + #[cfg(any(esp32c3, esp32c6))] pins: RefCell<&'a mut [(&'b mut dyn RTCPinWithResistors, WakeupLevel)]>, } @@ -110,7 +110,7 @@ impl<'a, 'b> RtcioWakeupSource<'a, 'b> { } } - #[cfg(esp32c3)] + #[cfg(any(esp32c3, esp32c6))] pub fn new(pins: &'a mut [(&'b mut dyn RTCPinWithResistors, WakeupLevel)]) -> Self { Self { pins: RefCell::new(pins),