From dd689b4d35ade8e29ac3805e360157479671a0da Mon Sep 17 00:00:00 2001 From: Jacob Date: Tue, 22 Oct 2019 13:25:00 -0700 Subject: [PATCH 1/2] add deviceinfo registers --- devices/EFM32HG309F64.yaml | 265 +++++++++++++++++++++++++++++++++++++ 1 file changed, 265 insertions(+) diff --git a/devices/EFM32HG309F64.yaml b/devices/EFM32HG309F64.yaml index 4b98b44..d4c28f1 100644 --- a/devices/EFM32HG309F64.yaml +++ b/devices/EFM32HG309F64.yaml @@ -7,3 +7,268 @@ PRS: _modify: ASYNC: name: ASYNC_ + +_add: + DEVINFO: + description: The DI page contains calibration values, a unique identification number and other useful data + baseAddress: 0x0FE081B0 + addressBlock: + offset: 0 + size: 640 #bits + usage: registers + registers: + CAL: + description: Calibration temperature and checksum + addressOffset: 0x0 + size: 32 + fields: + CRC: + description: Integrity CRC checksum + bitOffset: 0 + bitWidth: 16 + access: read-only + TEMP: + description: Calibration temperature, DegC + bitOffset: 16 + bitWidth: 8 + access: read-only + ADC0CAL0: + description: ADC0 Calibration register 0 + addressOffset: 0x04 + size: 32 + fields: + 1V25_OFFSET: + description: Offset for 1V25 reference + bitOffset: 0 + bitWidth: 7 + access: read-only + 1V25_GAIN: + description: Gain for 1V25 reference + bitOffset: 8 + bitWidth: 7 + access: read-only + 2V5_OFFSET: + description: Offset for 2V5 reference + bitOffset: 16 + bitWidth: 7 + access: read-only + 2V5_GAIN: + description: Gain for 2V5 reference + bitOffset: 24 + bitWidth: 7 + access: read-only + ADC0CAL1: + description: ADC0 Calibration register 1 + addressOffset: 0x08 + size: 32 + fields: + VDD_OFFSET: + description: Offset for VDD reference + bitOffset: 0 + bitWidth: 7 + access: read-only + VDD_GAIN: + description: Gain for VDD reference + bitOffset: 8 + bitWidth: 7 + access: read-only + 5VDIFF_OFFSET: + description: Offset for 5VDIFF reference + bitOffset: 16 + bitWidth: 7 + access: read-only + 5VDIFF_GAIN: + description: Gain for 5VDIFF reference + bitOffset: 24 + bitWidth: 7 + access: read-only + ADC0CAL2: + description: ADC0 Calibration register 2 + addressOffset: 0x0c + size: 32 + fields: + 2XVDDVSS_OFFSET: + description: Offset for 2XVDDVSS reference + bitOffset: 0 + bitWidth: 7 + access: read-only + TEMP1V25: + description: Temperature reading at 1V25 reference + bitOffset: 20 + bitWidth: 12 + access: read-only + IDAC0CAL0: + description: IDAC0 calibration register + addressOffset: 0x18 + size: 32 + fields: + RANGE0: + description: Current range 0 tuning value for IDAC0 + bitOffset: 0 + bitWidth: 8 + access: read-only + RANGE1: + description: Current range 1 tuning value for IDAC0 + bitOffset: 8 + bitWidth: 8 + access: read-only + RANGE2: + description: Current range 2 tuning value for IDAC0 + bitOffset: 16 + bitWidth: 8 + access: read-only + RANGE3: + description: Current range 3 tuning value for IDAC0 + bitOffset: 24 + bitWidth: 8 + access: read-only + USHFRCOCAL0: + description: USHFRCO calibration register + addressOffset: 0x1c + size: 32 + fields: + BAND24_TUNING: + description: 24 MHz TUNING value for USFRCO + bitOffset: 0 + bitWidth: 7 + access: read-only + BAND24_FINETUNING: + description: 24 MHz FINETUNING value for USFRCO + bitOffset: 8 + bitWidth: 6 + access: read-only + BAND48_TUNING: + description: 24 MHz TUNING value for USFRCO + bitOffset: 16 + bitWidth: 7 + access: read-only + BAND48_FINETUNING: + description: 24 MHz FINETUNING value for USFRCO + bitOffset: 24 + bitWidth: 6 + access: read-only + AUXHFRCOCAL0: + description: AUXHFRCO calibration register 0 + addressOffset: 0x24 + size: 32 + fields: + BAND1: + description: 1MHz tuning value for AUXHFRCO + bitOffset: 0 + bitWidth: 8 + access: read-only + BAND7: + description: 7MHz tuning value for AUXHFRCO + bitOffset: 8 + bitWidth: 8 + access: read-only + BAND11: + description: 11MHz tuning value for AUXHFRCO + bitOffset: 16 + bitWidth: 8 + access: read-only + BAND14: + description: 14MHz tuning value for AUXHFRCO + bitOffset: 24 + bitWidth: 8 + access: read-only + AUXHFRCOCAL1: + description: AUXHFRCO calibration register 1 + addressOffset: 0x28 + size: 8 + fields: + BAND21: + description: 21MHz tuning value for AUXHFRCO + bitOffset: 0 + bitWidth: 8 + access: read-only + HFRCOCAL0: + description: HFRCO calibration register 0 + addressOffset: 0x2c + size: 32 + fields: + BAND1: + description: 1MHz tuning value for HFRCO + bitOffset: 0 + bitWidth: 8 + access: read-only + BAND7: + description: 7MHz tuning value for HFRCO + bitOffset: 8 + bitWidth: 8 + access: read-only + BAND11: + description: 11MHz tuning value for HFRCO + bitOffset: 16 + bitWidth: 8 + access: read-only + BAND14: + description: 14MHz tuning value for HFRCO + bitOffset: 24 + bitWidth: 8 + access: read-only + HFRCOCAL1: + description: HFRCO calibration register 1 + addressOffset: 0x30 + size: 8 + fields: + BAND21: + description: 21MHz tuning value for HFRCO + bitOffset: 0 + bitWidth: 8 + access: read-only + UNIQUEL: + description: Low 32 bits of device unique number + addressOffset: 0x40 + size: 32 + fields: + UNIQUEL: + description: Lower part of 64-bit device unique number + bitOffset: 0 + bitWidth: 32 + access: read-only + UNIQUEH: + description: High 32 bits of device unique number + addressOffset: 0x44 + size: 32 + fields: + UNIQUEH: + description: High part of 64-bit device unique number + bitOffset: 0 + bitWidth: 32 + access: read-only + MSIZE: + description: Flash and SRAM Memory size in KiloBytes + addressOffset: 0x48 + size: 32 + fields: + FLASH: + description: Flash size in kilobytes + bitOffset: 0 + bitWidth: 16 + access: read-only + SRAM: + description: SRAM size in kilobytes + bitOffset: 16 + bitWidth: 16 + access: read-only + PART: + description: Part description + addressOffset: 0x4c + size: 32 + fields: + PART_NUMBER: + description: Device part number + bitOffset: 0 + bitWidth: 16 + access: read-only + DEVICE_FAMILY: + description: Device Family, 0x47 for Gecko + bitOffset: 16 + bitWidth: 8 + access: read-only + PROD_REV: + description: Production revision + bitOffset: 24 + bitWidth: 8 + access: read-only From b268551f341e10438a2ceb4791678b2603fbcf16 Mon Sep 17 00:00:00 2001 From: Jacob Date: Fri, 13 Dec 2019 23:00:22 -0700 Subject: [PATCH 2/2] regen --- src/devinfo.rs | 162 ++++++++++++++++++++++++++++++++++++ src/devinfo/adc0cal0.rs | 32 +++++++ src/devinfo/adc0cal1.rs | 32 +++++++ src/devinfo/adc0cal2.rs | 18 ++++ src/devinfo/auxhfrcocal0.rs | 32 +++++++ src/devinfo/auxhfrcocal1.rs | 11 +++ src/devinfo/cal.rs | 18 ++++ src/devinfo/hfrcocal0.rs | 32 +++++++ src/devinfo/hfrcocal1.rs | 11 +++ src/devinfo/idac0cal0.rs | 32 +++++++ src/devinfo/msize.rs | 18 ++++ src/devinfo/part.rs | 25 ++++++ src/devinfo/uniqueh.rs | 11 +++ src/devinfo/uniquel.rs | 11 +++ src/devinfo/ushfrcocal0.rs | 32 +++++++ src/lib.rs | 25 ++++++ 16 files changed, 502 insertions(+) create mode 100644 src/devinfo.rs create mode 100644 src/devinfo/adc0cal0.rs create mode 100644 src/devinfo/adc0cal1.rs create mode 100644 src/devinfo/adc0cal2.rs create mode 100644 src/devinfo/auxhfrcocal0.rs create mode 100644 src/devinfo/auxhfrcocal1.rs create mode 100644 src/devinfo/cal.rs create mode 100644 src/devinfo/hfrcocal0.rs create mode 100644 src/devinfo/hfrcocal1.rs create mode 100644 src/devinfo/idac0cal0.rs create mode 100644 src/devinfo/msize.rs create mode 100644 src/devinfo/part.rs create mode 100644 src/devinfo/uniqueh.rs create mode 100644 src/devinfo/uniquel.rs create mode 100644 src/devinfo/ushfrcocal0.rs diff --git a/src/devinfo.rs b/src/devinfo.rs new file mode 100644 index 0000000..4e4394d --- /dev/null +++ b/src/devinfo.rs @@ -0,0 +1,162 @@ +#[doc = r"Register block"] +#[repr(C)] +pub struct RegisterBlock { + #[doc = "0x00 - Calibration temperature and checksum"] + pub cal: CAL, + #[doc = "0x04 - ADC0 Calibration register 0"] + pub adc0cal0: ADC0CAL0, + #[doc = "0x08 - ADC0 Calibration register 1"] + pub adc0cal1: ADC0CAL1, + #[doc = "0x0c - ADC0 Calibration register 2"] + pub adc0cal2: ADC0CAL2, + _reserved4: [u8; 8usize], + #[doc = "0x18 - IDAC0 calibration register"] + pub idac0cal0: IDAC0CAL0, + #[doc = "0x1c - USHFRCO calibration register"] + pub ushfrcocal0: USHFRCOCAL0, + _reserved6: [u8; 4usize], + #[doc = "0x24 - AUXHFRCO calibration register 0"] + pub auxhfrcocal0: AUXHFRCOCAL0, + #[doc = "0x28 - AUXHFRCO calibration register 1"] + pub auxhfrcocal1: AUXHFRCOCAL1, + _reserved8: [u8; 3usize], + #[doc = "0x2c - HFRCO calibration register 0"] + pub hfrcocal0: HFRCOCAL0, + #[doc = "0x30 - HFRCO calibration register 1"] + pub hfrcocal1: HFRCOCAL1, + _reserved10: [u8; 15usize], + #[doc = "0x40 - Low 32 bits of device unique number"] + pub uniquel: UNIQUEL, + #[doc = "0x44 - High 32 bits of device unique number"] + pub uniqueh: UNIQUEH, + #[doc = "0x48 - Flash and SRAM Memory size in KiloBytes"] + pub msize: MSIZE, + #[doc = "0x4c - Part description"] + pub part: PART, +} +#[doc = "Calibration temperature and checksum\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [cal](cal) module"] +pub type CAL = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _CAL; +#[doc = "`read()` method returns [cal::R](cal::R) reader structure"] +impl crate::Readable for CAL {} +#[doc = "Calibration temperature and checksum"] +pub mod cal; +#[doc = "ADC0 Calibration register 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [adc0cal0](adc0cal0) module"] +pub type ADC0CAL0 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _ADC0CAL0; +#[doc = "`read()` method returns [adc0cal0::R](adc0cal0::R) reader structure"] +impl crate::Readable for ADC0CAL0 {} +#[doc = "ADC0 Calibration register 0"] +pub mod adc0cal0; +#[doc = "ADC0 Calibration register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [adc0cal1](adc0cal1) module"] +pub type ADC0CAL1 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _ADC0CAL1; +#[doc = "`read()` method returns [adc0cal1::R](adc0cal1::R) reader structure"] +impl crate::Readable for ADC0CAL1 {} +#[doc = "ADC0 Calibration register 1"] +pub mod adc0cal1; +#[doc = "ADC0 Calibration register 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [adc0cal2](adc0cal2) module"] +pub type ADC0CAL2 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _ADC0CAL2; +#[doc = "`read()` method returns [adc0cal2::R](adc0cal2::R) reader structure"] +impl crate::Readable for ADC0CAL2 {} +#[doc = "ADC0 Calibration register 2"] +pub mod adc0cal2; +#[doc = "IDAC0 calibration register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [idac0cal0](idac0cal0) module"] +pub type IDAC0CAL0 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _IDAC0CAL0; +#[doc = "`read()` method returns [idac0cal0::R](idac0cal0::R) reader structure"] +impl crate::Readable for IDAC0CAL0 {} +#[doc = "IDAC0 calibration register"] +pub mod idac0cal0; +#[doc = "USHFRCO calibration register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ushfrcocal0](ushfrcocal0) module"] +pub type USHFRCOCAL0 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _USHFRCOCAL0; +#[doc = "`read()` method returns [ushfrcocal0::R](ushfrcocal0::R) reader structure"] +impl crate::Readable for USHFRCOCAL0 {} +#[doc = "USHFRCO calibration register"] +pub mod ushfrcocal0; +#[doc = "AUXHFRCO calibration register 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [auxhfrcocal0](auxhfrcocal0) module"] +pub type AUXHFRCOCAL0 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _AUXHFRCOCAL0; +#[doc = "`read()` method returns [auxhfrcocal0::R](auxhfrcocal0::R) reader structure"] +impl crate::Readable for AUXHFRCOCAL0 {} +#[doc = "AUXHFRCO calibration register 0"] +pub mod auxhfrcocal0; +#[doc = "AUXHFRCO calibration register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [auxhfrcocal1](auxhfrcocal1) module"] +pub type AUXHFRCOCAL1 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _AUXHFRCOCAL1; +#[doc = "`read()` method returns [auxhfrcocal1::R](auxhfrcocal1::R) reader structure"] +impl crate::Readable for AUXHFRCOCAL1 {} +#[doc = "AUXHFRCO calibration register 1"] +pub mod auxhfrcocal1; +#[doc = "HFRCO calibration register 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [hfrcocal0](hfrcocal0) module"] +pub type HFRCOCAL0 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _HFRCOCAL0; +#[doc = "`read()` method returns [hfrcocal0::R](hfrcocal0::R) reader structure"] +impl crate::Readable for HFRCOCAL0 {} +#[doc = "HFRCO calibration register 0"] +pub mod hfrcocal0; +#[doc = "HFRCO calibration register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [hfrcocal1](hfrcocal1) module"] +pub type HFRCOCAL1 = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _HFRCOCAL1; +#[doc = "`read()` method returns [hfrcocal1::R](hfrcocal1::R) reader structure"] +impl crate::Readable for HFRCOCAL1 {} +#[doc = "HFRCO calibration register 1"] +pub mod hfrcocal1; +#[doc = "Low 32 bits of device unique number\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [uniquel](uniquel) module"] +pub type UNIQUEL = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _UNIQUEL; +#[doc = "`read()` method returns [uniquel::R](uniquel::R) reader structure"] +impl crate::Readable for UNIQUEL {} +#[doc = "Low 32 bits of device unique number"] +pub mod uniquel; +#[doc = "High 32 bits of device unique number\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [uniqueh](uniqueh) module"] +pub type UNIQUEH = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _UNIQUEH; +#[doc = "`read()` method returns [uniqueh::R](uniqueh::R) reader structure"] +impl crate::Readable for UNIQUEH {} +#[doc = "High 32 bits of device unique number"] +pub mod uniqueh; +#[doc = "Flash and SRAM Memory size in KiloBytes\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [msize](msize) module"] +pub type MSIZE = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _MSIZE; +#[doc = "`read()` method returns [msize::R](msize::R) reader structure"] +impl crate::Readable for MSIZE {} +#[doc = "Flash and SRAM Memory size in KiloBytes"] +pub mod msize; +#[doc = "Part description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [part](part) module"] +pub type PART = crate::Reg; +#[allow(missing_docs)] +#[doc(hidden)] +pub struct _PART; +#[doc = "`read()` method returns [part::R](part::R) reader structure"] +impl crate::Readable for PART {} +#[doc = "Part description"] +pub mod part; diff --git a/src/devinfo/adc0cal0.rs b/src/devinfo/adc0cal0.rs new file mode 100644 index 0000000..54cb4b7 --- /dev/null +++ b/src/devinfo/adc0cal0.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register ADC0CAL0"] +pub type R = crate::R; +#[doc = "Reader of field `1V25_OFFSET`"] +pub type _1V25_OFFSET_R = crate::R; +#[doc = "Reader of field `1V25_GAIN`"] +pub type _1V25_GAIN_R = crate::R; +#[doc = "Reader of field `2V5_OFFSET`"] +pub type _2V5_OFFSET_R = crate::R; +#[doc = "Reader of field `2V5_GAIN`"] +pub type _2V5_GAIN_R = crate::R; +impl R { + #[doc = "Bits 0:6 - Offset for 1V25 reference"] + #[inline(always)] + pub fn _1v25_offset(&self) -> _1V25_OFFSET_R { + _1V25_OFFSET_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bits 8:14 - Gain for 1V25 reference"] + #[inline(always)] + pub fn _1v25_gain(&self) -> _1V25_GAIN_R { + _1V25_GAIN_R::new(((self.bits >> 8) & 0x7f) as u8) + } + #[doc = "Bits 16:22 - Offset for 2V5 reference"] + #[inline(always)] + pub fn _2v5_offset(&self) -> _2V5_OFFSET_R { + _2V5_OFFSET_R::new(((self.bits >> 16) & 0x7f) as u8) + } + #[doc = "Bits 24:30 - Gain for 2V5 reference"] + #[inline(always)] + pub fn _2v5_gain(&self) -> _2V5_GAIN_R { + _2V5_GAIN_R::new(((self.bits >> 24) & 0x7f) as u8) + } +} diff --git a/src/devinfo/adc0cal1.rs b/src/devinfo/adc0cal1.rs new file mode 100644 index 0000000..2bf9937 --- /dev/null +++ b/src/devinfo/adc0cal1.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register ADC0CAL1"] +pub type R = crate::R; +#[doc = "Reader of field `VDD_OFFSET`"] +pub type VDD_OFFSET_R = crate::R; +#[doc = "Reader of field `VDD_GAIN`"] +pub type VDD_GAIN_R = crate::R; +#[doc = "Reader of field `5VDIFF_OFFSET`"] +pub type _5VDIFF_OFFSET_R = crate::R; +#[doc = "Reader of field `5VDIFF_GAIN`"] +pub type _5VDIFF_GAIN_R = crate::R; +impl R { + #[doc = "Bits 0:6 - Offset for VDD reference"] + #[inline(always)] + pub fn vdd_offset(&self) -> VDD_OFFSET_R { + VDD_OFFSET_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bits 8:14 - Gain for VDD reference"] + #[inline(always)] + pub fn vdd_gain(&self) -> VDD_GAIN_R { + VDD_GAIN_R::new(((self.bits >> 8) & 0x7f) as u8) + } + #[doc = "Bits 16:22 - Offset for 5VDIFF reference"] + #[inline(always)] + pub fn _5vdiff_offset(&self) -> _5VDIFF_OFFSET_R { + _5VDIFF_OFFSET_R::new(((self.bits >> 16) & 0x7f) as u8) + } + #[doc = "Bits 24:30 - Gain for 5VDIFF reference"] + #[inline(always)] + pub fn _5vdiff_gain(&self) -> _5VDIFF_GAIN_R { + _5VDIFF_GAIN_R::new(((self.bits >> 24) & 0x7f) as u8) + } +} diff --git a/src/devinfo/adc0cal2.rs b/src/devinfo/adc0cal2.rs new file mode 100644 index 0000000..3b8e36c --- /dev/null +++ b/src/devinfo/adc0cal2.rs @@ -0,0 +1,18 @@ +#[doc = "Reader of register ADC0CAL2"] +pub type R = crate::R; +#[doc = "Reader of field `2XVDDVSS_OFFSET`"] +pub type _2XVDDVSS_OFFSET_R = crate::R; +#[doc = "Reader of field `TEMP1V25`"] +pub type TEMP1V25_R = crate::R; +impl R { + #[doc = "Bits 0:6 - Offset for 2XVDDVSS reference"] + #[inline(always)] + pub fn _2xvddvss_offset(&self) -> _2XVDDVSS_OFFSET_R { + _2XVDDVSS_OFFSET_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bits 20:31 - Temperature reading at 1V25 reference"] + #[inline(always)] + pub fn temp1v25(&self) -> TEMP1V25_R { + TEMP1V25_R::new(((self.bits >> 20) & 0x0fff) as u16) + } +} diff --git a/src/devinfo/auxhfrcocal0.rs b/src/devinfo/auxhfrcocal0.rs new file mode 100644 index 0000000..c5b0cc4 --- /dev/null +++ b/src/devinfo/auxhfrcocal0.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register AUXHFRCOCAL0"] +pub type R = crate::R; +#[doc = "Reader of field `BAND1`"] +pub type BAND1_R = crate::R; +#[doc = "Reader of field `BAND7`"] +pub type BAND7_R = crate::R; +#[doc = "Reader of field `BAND11`"] +pub type BAND11_R = crate::R; +#[doc = "Reader of field `BAND14`"] +pub type BAND14_R = crate::R; +impl R { + #[doc = "Bits 0:7 - 1MHz tuning value for AUXHFRCO"] + #[inline(always)] + pub fn band1(&self) -> BAND1_R { + BAND1_R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - 7MHz tuning value for AUXHFRCO"] + #[inline(always)] + pub fn band7(&self) -> BAND7_R { + BAND7_R::new(((self.bits >> 8) & 0xff) as u8) + } + #[doc = "Bits 16:23 - 11MHz tuning value for AUXHFRCO"] + #[inline(always)] + pub fn band11(&self) -> BAND11_R { + BAND11_R::new(((self.bits >> 16) & 0xff) as u8) + } + #[doc = "Bits 24:31 - 14MHz tuning value for AUXHFRCO"] + #[inline(always)] + pub fn band14(&self) -> BAND14_R { + BAND14_R::new(((self.bits >> 24) & 0xff) as u8) + } +} diff --git a/src/devinfo/auxhfrcocal1.rs b/src/devinfo/auxhfrcocal1.rs new file mode 100644 index 0000000..f39a506 --- /dev/null +++ b/src/devinfo/auxhfrcocal1.rs @@ -0,0 +1,11 @@ +#[doc = "Reader of register AUXHFRCOCAL1"] +pub type R = crate::R; +#[doc = "Reader of field `BAND21`"] +pub type BAND21_R = crate::R; +impl R { + #[doc = "Bits 0:7 - 21MHz tuning value for AUXHFRCO"] + #[inline(always)] + pub fn band21(&self) -> BAND21_R { + BAND21_R::new((self.bits & 0xff) as u8) + } +} diff --git a/src/devinfo/cal.rs b/src/devinfo/cal.rs new file mode 100644 index 0000000..dff57bd --- /dev/null +++ b/src/devinfo/cal.rs @@ -0,0 +1,18 @@ +#[doc = "Reader of register CAL"] +pub type R = crate::R; +#[doc = "Reader of field `CRC`"] +pub type CRC_R = crate::R; +#[doc = "Reader of field `TEMP`"] +pub type TEMP_R = crate::R; +impl R { + #[doc = "Bits 0:15 - Integrity CRC checksum"] + #[inline(always)] + pub fn crc(&self) -> CRC_R { + CRC_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bits 16:23 - Calibration temperature, DegC"] + #[inline(always)] + pub fn temp(&self) -> TEMP_R { + TEMP_R::new(((self.bits >> 16) & 0xff) as u8) + } +} diff --git a/src/devinfo/hfrcocal0.rs b/src/devinfo/hfrcocal0.rs new file mode 100644 index 0000000..ab90cb5 --- /dev/null +++ b/src/devinfo/hfrcocal0.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register HFRCOCAL0"] +pub type R = crate::R; +#[doc = "Reader of field `BAND1`"] +pub type BAND1_R = crate::R; +#[doc = "Reader of field `BAND7`"] +pub type BAND7_R = crate::R; +#[doc = "Reader of field `BAND11`"] +pub type BAND11_R = crate::R; +#[doc = "Reader of field `BAND14`"] +pub type BAND14_R = crate::R; +impl R { + #[doc = "Bits 0:7 - 1MHz tuning value for HFRCO"] + #[inline(always)] + pub fn band1(&self) -> BAND1_R { + BAND1_R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - 7MHz tuning value for HFRCO"] + #[inline(always)] + pub fn band7(&self) -> BAND7_R { + BAND7_R::new(((self.bits >> 8) & 0xff) as u8) + } + #[doc = "Bits 16:23 - 11MHz tuning value for HFRCO"] + #[inline(always)] + pub fn band11(&self) -> BAND11_R { + BAND11_R::new(((self.bits >> 16) & 0xff) as u8) + } + #[doc = "Bits 24:31 - 14MHz tuning value for HFRCO"] + #[inline(always)] + pub fn band14(&self) -> BAND14_R { + BAND14_R::new(((self.bits >> 24) & 0xff) as u8) + } +} diff --git a/src/devinfo/hfrcocal1.rs b/src/devinfo/hfrcocal1.rs new file mode 100644 index 0000000..424d560 --- /dev/null +++ b/src/devinfo/hfrcocal1.rs @@ -0,0 +1,11 @@ +#[doc = "Reader of register HFRCOCAL1"] +pub type R = crate::R; +#[doc = "Reader of field `BAND21`"] +pub type BAND21_R = crate::R; +impl R { + #[doc = "Bits 0:7 - 21MHz tuning value for HFRCO"] + #[inline(always)] + pub fn band21(&self) -> BAND21_R { + BAND21_R::new((self.bits & 0xff) as u8) + } +} diff --git a/src/devinfo/idac0cal0.rs b/src/devinfo/idac0cal0.rs new file mode 100644 index 0000000..c449631 --- /dev/null +++ b/src/devinfo/idac0cal0.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register IDAC0CAL0"] +pub type R = crate::R; +#[doc = "Reader of field `RANGE0`"] +pub type RANGE0_R = crate::R; +#[doc = "Reader of field `RANGE1`"] +pub type RANGE1_R = crate::R; +#[doc = "Reader of field `RANGE2`"] +pub type RANGE2_R = crate::R; +#[doc = "Reader of field `RANGE3`"] +pub type RANGE3_R = crate::R; +impl R { + #[doc = "Bits 0:7 - Current range 0 tuning value for IDAC0"] + #[inline(always)] + pub fn range0(&self) -> RANGE0_R { + RANGE0_R::new((self.bits & 0xff) as u8) + } + #[doc = "Bits 8:15 - Current range 1 tuning value for IDAC0"] + #[inline(always)] + pub fn range1(&self) -> RANGE1_R { + RANGE1_R::new(((self.bits >> 8) & 0xff) as u8) + } + #[doc = "Bits 16:23 - Current range 2 tuning value for IDAC0"] + #[inline(always)] + pub fn range2(&self) -> RANGE2_R { + RANGE2_R::new(((self.bits >> 16) & 0xff) as u8) + } + #[doc = "Bits 24:31 - Current range 3 tuning value for IDAC0"] + #[inline(always)] + pub fn range3(&self) -> RANGE3_R { + RANGE3_R::new(((self.bits >> 24) & 0xff) as u8) + } +} diff --git a/src/devinfo/msize.rs b/src/devinfo/msize.rs new file mode 100644 index 0000000..9547fee --- /dev/null +++ b/src/devinfo/msize.rs @@ -0,0 +1,18 @@ +#[doc = "Reader of register MSIZE"] +pub type R = crate::R; +#[doc = "Reader of field `FLASH`"] +pub type FLASH_R = crate::R; +#[doc = "Reader of field `SRAM`"] +pub type SRAM_R = crate::R; +impl R { + #[doc = "Bits 0:15 - Flash size in kilobytes"] + #[inline(always)] + pub fn flash(&self) -> FLASH_R { + FLASH_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bits 16:31 - SRAM size in kilobytes"] + #[inline(always)] + pub fn sram(&self) -> SRAM_R { + SRAM_R::new(((self.bits >> 16) & 0xffff) as u16) + } +} diff --git a/src/devinfo/part.rs b/src/devinfo/part.rs new file mode 100644 index 0000000..dde8c56 --- /dev/null +++ b/src/devinfo/part.rs @@ -0,0 +1,25 @@ +#[doc = "Reader of register PART"] +pub type R = crate::R; +#[doc = "Reader of field `PART_NUMBER`"] +pub type PART_NUMBER_R = crate::R; +#[doc = "Reader of field `DEVICE_FAMILY`"] +pub type DEVICE_FAMILY_R = crate::R; +#[doc = "Reader of field `PROD_REV`"] +pub type PROD_REV_R = crate::R; +impl R { + #[doc = "Bits 0:15 - Device part number"] + #[inline(always)] + pub fn part_number(&self) -> PART_NUMBER_R { + PART_NUMBER_R::new((self.bits & 0xffff) as u16) + } + #[doc = "Bits 16:23 - Device Family, 0x47 for Gecko"] + #[inline(always)] + pub fn device_family(&self) -> DEVICE_FAMILY_R { + DEVICE_FAMILY_R::new(((self.bits >> 16) & 0xff) as u8) + } + #[doc = "Bits 24:31 - Production revision"] + #[inline(always)] + pub fn prod_rev(&self) -> PROD_REV_R { + PROD_REV_R::new(((self.bits >> 24) & 0xff) as u8) + } +} diff --git a/src/devinfo/uniqueh.rs b/src/devinfo/uniqueh.rs new file mode 100644 index 0000000..8106924 --- /dev/null +++ b/src/devinfo/uniqueh.rs @@ -0,0 +1,11 @@ +#[doc = "Reader of register UNIQUEH"] +pub type R = crate::R; +#[doc = "Reader of field `UNIQUEH`"] +pub type UNIQUEH_R = crate::R; +impl R { + #[doc = "Bits 0:31 - High part of 64-bit device unique number"] + #[inline(always)] + pub fn uniqueh(&self) -> UNIQUEH_R { + UNIQUEH_R::new((self.bits & 0xffff_ffff) as u32) + } +} diff --git a/src/devinfo/uniquel.rs b/src/devinfo/uniquel.rs new file mode 100644 index 0000000..a3f55f3 --- /dev/null +++ b/src/devinfo/uniquel.rs @@ -0,0 +1,11 @@ +#[doc = "Reader of register UNIQUEL"] +pub type R = crate::R; +#[doc = "Reader of field `UNIQUEL`"] +pub type UNIQUEL_R = crate::R; +impl R { + #[doc = "Bits 0:31 - Lower part of 64-bit device unique number"] + #[inline(always)] + pub fn uniquel(&self) -> UNIQUEL_R { + UNIQUEL_R::new((self.bits & 0xffff_ffff) as u32) + } +} diff --git a/src/devinfo/ushfrcocal0.rs b/src/devinfo/ushfrcocal0.rs new file mode 100644 index 0000000..a37b4a5 --- /dev/null +++ b/src/devinfo/ushfrcocal0.rs @@ -0,0 +1,32 @@ +#[doc = "Reader of register USHFRCOCAL0"] +pub type R = crate::R; +#[doc = "Reader of field `BAND24_TUNING`"] +pub type BAND24_TUNING_R = crate::R; +#[doc = "Reader of field `BAND24_FINETUNING`"] +pub type BAND24_FINETUNING_R = crate::R; +#[doc = "Reader of field `BAND48_TUNING`"] +pub type BAND48_TUNING_R = crate::R; +#[doc = "Reader of field `BAND48_FINETUNING`"] +pub type BAND48_FINETUNING_R = crate::R; +impl R { + #[doc = "Bits 0:6 - 24 MHz TUNING value for USFRCO"] + #[inline(always)] + pub fn band24_tuning(&self) -> BAND24_TUNING_R { + BAND24_TUNING_R::new((self.bits & 0x7f) as u8) + } + #[doc = "Bits 8:13 - 24 MHz FINETUNING value for USFRCO"] + #[inline(always)] + pub fn band24_finetuning(&self) -> BAND24_FINETUNING_R { + BAND24_FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8) + } + #[doc = "Bits 16:22 - 24 MHz TUNING value for USFRCO"] + #[inline(always)] + pub fn band48_tuning(&self) -> BAND48_TUNING_R { + BAND48_TUNING_R::new(((self.bits >> 16) & 0x7f) as u8) + } + #[doc = "Bits 24:29 - 24 MHz FINETUNING value for USFRCO"] + #[inline(always)] + pub fn band48_finetuning(&self) -> BAND48_FINETUNING_R { + BAND48_FINETUNING_R::new(((self.bits >> 24) & 0x3f) as u8) + } +} diff --git a/src/lib.rs b/src/lib.rs index c33ee5c..f71a93c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -640,6 +640,26 @@ impl Deref for MTB { } #[doc = "MTB"] pub mod mtb; +#[doc = "The DI page contains calibration values, a unique identification number and other useful data"] +pub struct DEVINFO { + _marker: PhantomData<*const ()>, +} +unsafe impl Send for DEVINFO {} +impl DEVINFO { + #[doc = r"Returns a pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const devinfo::RegisterBlock { + 0x0fe0_81b0 as *const _ + } +} +impl Deref for DEVINFO { + type Target = devinfo::RegisterBlock; + fn deref(&self) -> &Self::Target { + unsafe { &*DEVINFO::ptr() } + } +} +#[doc = "The DI page contains calibration values, a unique identification number and other useful data"] +pub mod devinfo; #[no_mangle] static mut DEVICE_PERIPHERALS: bool = false; #[doc = r"All the peripherals"] @@ -693,6 +713,8 @@ pub struct Peripherals { pub WDOG: WDOG, #[doc = "MTB"] pub MTB: MTB, + #[doc = "DEVINFO"] + pub DEVINFO: DEVINFO, } impl Peripherals { #[doc = r"Returns all the peripherals *once*"] @@ -782,6 +804,9 @@ impl Peripherals { MTB: MTB { _marker: PhantomData, }, + DEVINFO: DEVINFO { + _marker: PhantomData, + }, } } }