diff --git a/src/coreclr/jit/codegenriscv64.cpp b/src/coreclr/jit/codegenriscv64.cpp index eabf3edd1ab5dc..822df98dd01f0a 100644 --- a/src/coreclr/jit/codegenriscv64.cpp +++ b/src/coreclr/jit/codegenriscv64.cpp @@ -2499,7 +2499,7 @@ void CodeGen::genCodeForDivMod(GenTreeOp* tree) // Generate code for InitBlk by performing a loop unroll // Preconditions: // a) Both the size and fill byte value are integer constants. -// b) The size of the struct to initialize is smaller than INITBLK_UNROLL_LIMIT bytes. +// b) The size of the struct to initialize is smaller than getUnrollThreshold() bytes. void CodeGen::genCodeForInitBlkUnroll(GenTreeBlk* node) { assert(node->OperIs(GT_STORE_BLK)); @@ -6138,7 +6138,7 @@ void CodeGen::genCodeForIndir(GenTreeIndir* tree) // None // // Assumption: -// The size argument of the CpBlk node is a constant and <= CPBLK_UNROLL_LIMIT bytes. +// The size argument of the CpBlk node is a constant and <= getUnrollThreshold() bytes. // void CodeGen::genCodeForCpBlkUnroll(GenTreeBlk* cpBlkNode) { diff --git a/src/coreclr/jit/compiler.h b/src/coreclr/jit/compiler.h index fefa99c750b1a3..ffd6355e82b71b 100644 --- a/src/coreclr/jit/compiler.h +++ b/src/coreclr/jit/compiler.h @@ -9221,6 +9221,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX // | arm64 | 256 | 128 | ldp/stp (2x128bit) // | arm | 32 | 16 | no SIMD support // | loongarch64 | 64 | 32 | no SIMD support + // | riscv64 | 64 | 32 | no SIMD support // // We might want to use a different multiplier for truly hot/cold blocks based on PGO data // diff --git a/src/coreclr/jit/lowerriscv64.cpp b/src/coreclr/jit/lowerriscv64.cpp index 7bf3dba619419b..22830e92ba25c2 100644 --- a/src/coreclr/jit/lowerriscv64.cpp +++ b/src/coreclr/jit/lowerriscv64.cpp @@ -245,7 +245,7 @@ void Lowering::LowerBlockStore(GenTreeBlk* blkNode) src = src->AsUnOp()->gtGetOp1(); } - if ((size <= INITBLK_UNROLL_LIMIT) && src->OperIs(GT_CNS_INT)) + if ((size <= comp->getUnrollThreshold(Compiler::UnrollKind::Memset)) && src->OperIs(GT_CNS_INT)) { blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindUnroll; @@ -298,10 +298,11 @@ void Lowering::LowerBlockStore(GenTreeBlk* blkNode) comp->lvaSetVarDoNotEnregister(srcLclNum DEBUGARG(DoNotEnregisterReason::BlockOp)); } - ClassLayout* layout = blkNode->GetLayout(); - bool doCpObj = layout->HasGCPtr(); + ClassLayout* layout = blkNode->GetLayout(); + bool doCpObj = layout->HasGCPtr(); + unsigned copyBlockUnrollLimit = comp->getUnrollThreshold(Compiler::UnrollKind::Memcpy); - if (doCpObj && (size <= CPBLK_UNROLL_LIMIT)) + if (doCpObj && (size <= copyBlockUnrollLimit)) { // No write barriers are needed on the stack. // If the layout contains a byref, then we know it must live on the stack. @@ -321,7 +322,7 @@ void Lowering::LowerBlockStore(GenTreeBlk* blkNode) assert((dstAddr->TypeGet() == TYP_BYREF) || (dstAddr->TypeGet() == TYP_I_IMPL)); blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindCpObjUnroll; } - else if (blkNode->OperIs(GT_STORE_BLK) && (size <= CPBLK_UNROLL_LIMIT)) + else if (blkNode->OperIs(GT_STORE_BLK) && (size <= copyBlockUnrollLimit)) { blkNode->gtBlkOpKind = GenTreeBlk::BlkOpKindUnroll; diff --git a/src/coreclr/jit/targetriscv64.h b/src/coreclr/jit/targetriscv64.h index 9cf0185a569351..5ac82fa9a00974 100644 --- a/src/coreclr/jit/targetriscv64.h +++ b/src/coreclr/jit/targetriscv64.h @@ -12,8 +12,6 @@ #define ROUND_FLOAT 0 // Do not round intermed float expression results #define CPU_HAS_BYTE_REGS 0 - #define CPBLK_UNROLL_LIMIT 64 // Upper bound to let the code generator to loop unroll CpBlk - #define INITBLK_UNROLL_LIMIT 64 // Upper bound to let the code generator to loop unroll InitBlk #ifdef FEATURE_SIMD #pragma error("SIMD Unimplemented yet RISCV64")