From fbcd761f9af1fb331b2a181bbc26173320a9970d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tomek=20Sowi=C5=84ski?= Date: Thu, 15 Feb 2024 10:51:53 +0100 Subject: [PATCH 1/3] Remove unnecessary assertion It fired a false positive when W^X was enabled --- src/coreclr/jit/emitriscv64.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp index 6ac9e13293aa85..d61b95c9b7a4b9 100644 --- a/src/coreclr/jit/emitriscv64.cpp +++ b/src/coreclr/jit/emitriscv64.cpp @@ -3158,7 +3158,6 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) size_t sz = 0; assert(REG_NA == static_cast(REG_NA)); - assert(writeableOffset == 0); insOpts insOp = id->idInsOpt(); From 457daad27c5995aef4201aee7a769a8c0a221b50 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tomek=20Sowi=C5=84ski?= Date: Thu, 15 Feb 2024 14:49:50 +0100 Subject: [PATCH 2/3] Use uint32 write instead of memcpy to be faster There shouldn't be a problem when we introduce compressed instructions, VF2 supports unaligned stores (sw) Also, replace compile-time conditions with static_asserts. --- src/coreclr/jit/emitriscv64.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp index d61b95c9b7a4b9..ca93f7ec8fa6d7 100644 --- a/src/coreclr/jit/emitriscv64.cpp +++ b/src/coreclr/jit/emitriscv64.cpp @@ -2118,8 +2118,8 @@ void emitter::emitJumpDistBind() unsigned emitter::emitOutput_Instr(BYTE* dst, code_t code) const { assert(dst != nullptr); - assert(sizeof(code_t) == 4); - memcpy(dst + writeableOffset, &code, sizeof(code_t)); + static_assert(sizeof(code_t) == 4, "code_t must be 4 bytes"); + *(code_t*)(dst + writeableOffset) = code; return sizeof(code_t); } @@ -3157,7 +3157,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) instruction ins; size_t sz = 0; - assert(REG_NA == static_cast(REG_NA)); + static_assert(REG_NA == static_cast(REG_NA), "REG_NA must fit in an int"); insOpts insOp = id->idInsOpt(); From a6552fd2fce7ecba30dc6c1c037e667a127be81c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tomek=20Sowi=C5=84ski?= Date: Mon, 19 Feb 2024 12:23:30 +0100 Subject: [PATCH 3/3] Bring back memcpy because plain RV64 ISA allows trapping on misaligned load/stores --- src/coreclr/jit/emitriscv64.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp index ca93f7ec8fa6d7..66cb371aeeeca5 100644 --- a/src/coreclr/jit/emitriscv64.cpp +++ b/src/coreclr/jit/emitriscv64.cpp @@ -2119,7 +2119,7 @@ unsigned emitter::emitOutput_Instr(BYTE* dst, code_t code) const { assert(dst != nullptr); static_assert(sizeof(code_t) == 4, "code_t must be 4 bytes"); - *(code_t*)(dst + writeableOffset) = code; + memcpy(dst + writeableOffset, &code, sizeof(code)); return sizeof(code_t); }