; Assembly listing for method Vector64As.TestClass:byte_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Byte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op "Inlining Arg"
;
; Lcl frame size = 32

G_M33987_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M33987_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M33987_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=48877b3c) for method Vector64As.TestClass:byte_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Byte]
; ============================================================

byte : <11, 11, 11, 11, 11, 11, 11, 11>
; Assembly listing for method Vector64As.TestClass:sbyte_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[SByte]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M25603_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M25603_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M25603_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=ace49bfc) for method Vector64As.TestClass:sbyte_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[SByte]
; ============================================================

sbyte : <11, 11, 11, 11, 11, 11, 11, 11>
; Assembly listing for method Vector64As.TestClass:short_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int16]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M54405_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M54405_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M54405_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=44462b7a) for method Vector64As.TestClass:short_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int16]
; ============================================================

short : <2827, 2827, 2827, 2827>
; Assembly listing for method Vector64As.TestClass:ushort_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt16]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M59749_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M59749_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M59749_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=7dc6169a) for method Vector64As.TestClass:ushort_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt16]
; ============================================================

ushort : <2827, 2827, 2827, 2827>
; Assembly listing for method Vector64As.TestClass:int_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int32]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M61794_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M61794_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M61794_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=fb200e9d) for method Vector64As.TestClass:int_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int32]
; ============================================================

int : <185273099, 185273099>
; Assembly listing for method Vector64As.TestClass:uint_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt32]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M60386_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M60386_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M60386_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=258e141d) for method Vector64As.TestClass:uint_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt32]
; ============================================================

uint : <185273099, 185273099>
; Assembly listing for method Vector64As.TestClass:long_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M19960_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M19960_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M19960_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=05b7b207) for method Vector64As.TestClass:long_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

long : <795741901218843403>
; Assembly listing for method Vector64As.TestClass:ulong_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M54712_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M54712_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M54712_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=957d2a47) for method Vector64As.TestClass:ulong_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[UInt64]
; ============================================================

ulong : <795741901218843403>
; Assembly listing for method Vector64As.TestClass:float_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Single]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M14633_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M14633_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M14633_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=881fc6d6) for method Vector64As.TestClass:float_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Single]
; ============================================================

float : <2.6778734E-32, 2.6778734E-32>
; Assembly listing for method Vector64As.TestClass:double_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Double]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M24355_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M24355_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V02 tmp1]
        FD400FA0          ldr     d0, [fp,#24]	// [V02 tmp1]
						;; bbWeight=1    PerfScore 5.00
G_M24355_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=0cd6a0dc) for method Vector64As.TestClass:double_As(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Double]
; ============================================================

double : <1.8010707049728718E-255>