; Assembly listing for method Vector128WithUpper.TestClass:byte_WithUpper(System.Runtime.Intrinsics.Vector128`1[Byte],System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M60459_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M60459_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M60459_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=9a4913d4) for method Vector128WithUpper.TestClass:byte_WithUpper(System.Runtime.Intrinsics.Vector128`1[Byte],System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; ============================================================ <11, 11, 11, 11, 11, 11, 11, 11, 22, 22, 22, 22, 22, 22, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:sbyte_WithUpper(System.Runtime.Intrinsics.Vector128`1[SByte],System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M16555_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M16555_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M16555_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=2df0bf54) for method Vector128WithUpper.TestClass:sbyte_WithUpper(System.Runtime.Intrinsics.Vector128`1[SByte],System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; ============================================================ <11, 11, 11, 11, 11, 11, 11, 11, 22, 22, 22, 22, 22, 22, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:short_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int16],System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M56813_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M56813_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M56813_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=f0312212) for method Vector128WithUpper.TestClass:short_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int16],System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; ============================================================ <11, 11, 11, 11, 22, 22, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:ushort_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt16],System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M13805_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M13805_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M13805_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=4b7eca12) for method Vector128WithUpper.TestClass:ushort_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt16],System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; ============================================================ <11, 11, 11, 11, 22, 22, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:int_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int32],System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M14218_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M14218_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M14218_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=db7bc875) for method Vector128WithUpper.TestClass:int_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int32],System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; ============================================================ <11, 11, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:uint_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt32],System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M6378_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M6378_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M6378_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=3a64e715) for method Vector128WithUpper.TestClass:uint_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt32],System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; ============================================================ <11, 11, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:long_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int64],System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M35632_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M35632_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M35632_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=a55d74cf) for method Vector128WithUpper.TestClass:long_WithUpper(System.Runtime.Intrinsics.Vector128`1[Int64],System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; ============================================================ <11, 22> ; Assembly listing for method Vector128WithUpper.TestClass:ulong_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt64],System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M58800_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M58800_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M58800_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=786a1a4f) for method Vector128WithUpper.TestClass:ulong_WithUpper(System.Runtime.Intrinsics.Vector128`1[UInt64],System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; ============================================================ <11, 22> ; Assembly listing for method Vector128WithUpper.TestClass:float_WithUpper(System.Runtime.Intrinsics.Vector128`1[Single],System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M21025_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M21025_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M21025_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=5a04adde) for method Vector128WithUpper.TestClass:float_WithUpper(System.Runtime.Intrinsics.Vector128`1[Single],System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; ============================================================ <11, 11, 22, 22> ; Assembly listing for method Vector128WithUpper.TestClass:double_WithUpper(System.Runtime.Intrinsics.Vector128`1[Double],System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M7211_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M7211_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 4E083E20 umov x0, v17.d[0] 4E181C10 ins v16.d[1], x0 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 6.50 G_M7211_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 44, prolog size 8, PerfScore 16.40, (MethodHash=94a4e3d4) for method Vector128WithUpper.TestClass:double_WithUpper(System.Runtime.Intrinsics.Vector128`1[Double],System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; ============================================================ <11, 22>