baseline: <9, 10, 11, 12, 5, 6, 7, 8> ; Assembly listing for method Vector128WithLower.TestClass:byte_WithLower(System.Runtime.Intrinsics.Vector128`1[Byte],System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M15819_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M15819_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M15819_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=6de5c234) for method Vector128WithLower.TestClass:byte_WithLower(System.Runtime.Intrinsics.Vector128`1[Byte],System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector128`1[Byte] ; ============================================================ <22, 22, 22, 22, 22, 22, 22, 22, 11, 11, 11, 11, 11, 11, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:sbyte_WithLower(System.Runtime.Intrinsics.Vector128`1[SByte],System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M23019_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M23019_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M23019_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=4677a614) for method Vector128WithLower.TestClass:sbyte_WithLower(System.Runtime.Intrinsics.Vector128`1[SByte],System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector128`1[SByte] ; ============================================================ <22, 22, 22, 22, 22, 22, 22, 22, 11, 11, 11, 11, 11, 11, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:short_WithLower(System.Runtime.Intrinsics.Vector128`1[Int16],System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M37357_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M37357_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M37357_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=d6266e12) for method Vector128WithLower.TestClass:short_WithLower(System.Runtime.Intrinsics.Vector128`1[Int16],System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector128`1[Int16] ; ============================================================ <22, 22, 22, 22, 11, 11, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:ushort_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt16],System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M50893_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M50893_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M50893_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=29943932) for method Vector128WithLower.TestClass:ushort_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt16],System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector128`1[UInt16] ; ============================================================ <22, 22, 22, 22, 11, 11, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:int_WithLower(System.Runtime.Intrinsics.Vector128`1[Int32],System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M40266_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M40266_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M40266_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=ade062b5) for method Vector128WithLower.TestClass:int_WithLower(System.Runtime.Intrinsics.Vector128`1[Int32],System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector128`1[Int32] ; ============================================================ <22, 22, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:uint_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt32],System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M51082_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M51082_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M51082_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=b2e13875) for method Vector128WithLower.TestClass:uint_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt32],System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector128`1[UInt32] ; ============================================================ <22, 22, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:long_WithLower(System.Runtime.Intrinsics.Vector128`1[Int64],System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M27024_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M27024_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M27024_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=b4c6966f) for method Vector128WithLower.TestClass:long_WithLower(System.Runtime.Intrinsics.Vector128`1[Int64],System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector128`1[Int64] ; ============================================================ <22, 11> ; Assembly listing for method Vector128WithLower.TestClass:ulong_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt64],System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M48112_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M48112_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M48112_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=d70b440f) for method Vector128WithLower.TestClass:ulong_WithLower(System.Runtime.Intrinsics.Vector128`1[UInt64],System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector128`1[UInt64] ; ============================================================ <22, 11> ; Assembly listing for method Vector128WithLower.TestClass:float_WithLower(System.Runtime.Intrinsics.Vector128`1[Single],System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M24929_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M24929_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M24929_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=61759e9e) for method Vector128WithLower.TestClass:float_WithLower(System.Runtime.Intrinsics.Vector128`1[Single],System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector128`1[Single] ; ============================================================ <22, 22, 11, 11> ; Assembly listing for method Vector128WithLower.TestClass:double_WithLower(System.Runtime.Intrinsics.Vector128`1[Double],System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; partially interruptible ; Final local variable assignments ; ; V00 arg0 [V00 ] ( 3, 3 ) simd16 -> [fp+0x20] HFA(simd16) do-not-enreg[XS] addr-exposed ; V01 arg1 [V01 ] ( 3, 3 ) simd8 -> [fp+0x18] HFA(double) do-not-enreg[XS] addr-exposed ;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ; V03 tmp1 [V03,T02] ( 2, 2 ) simd16 -> d16 HFA(simd16) "Inline return value spill temp" ; V04 tmp2 [V04,T00] ( 2, 4 ) simd16 -> d16 HFA(simd16) "Inlining Arg" ; V05 tmp3 [V05,T01] ( 2, 4 ) simd8 -> d17 HFA(double) "Inlining Arg" ; ; Lcl frame size = 32 G_M31179_IG01: A9BD7BFD stp fp, lr, [sp,#-48]! 910003FD mov fp, sp 3D800BA0 str q0, [fp,#32] FD000FA1 str d1, [fp,#24] ;; bbWeight=1 PerfScore 3.50 G_M31179_IG02: 3DC00BB0 ldr q16, [fp,#32] FD400FB1 ldr d17, [fp,#24] 6E080630 mov v16.d[0], v17.d[0] 4EB01E00 mov v0.16b, v16.16b ;; bbWeight=1 PerfScore 5.50 G_M31179_IG03: A8C37BFD ldp fp, lr, [sp],#48 D65F03C0 ret lr ;; bbWeight=1 PerfScore 2.00 ; Total bytes of code 40, prolog size 8, PerfScore 15.00, (MethodHash=acdc8634) for method Vector128WithLower.TestClass:double_WithLower(System.Runtime.Intrinsics.Vector128`1[Double],System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector128`1[Double] ; ============================================================ <22, 11>