; Assembly listing for method Vector64As.TestClass:AsInt64_byte(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M63625_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M63625_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M63625_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=f8890776) for method Vector64As.TestClass:AsInt64_byte(System.Runtime.Intrinsics.Vector64`1[Byte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<723401728380766730>
; Assembly listing for method Vector64As.TestClass:AsInt64_sbyte(System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M30857_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M30857_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M30857_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=4b4e8776) for method Vector64As.TestClass:AsInt64_sbyte(System.Runtime.Intrinsics.Vector64`1[SByte]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<723401728380766730>
; Assembly listing for method Vector64As.TestClass:AsInt64_short(System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M46447_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M46447_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M46447_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=efe14a90) for method Vector64As.TestClass:AsInt64_short(System.Runtime.Intrinsics.Vector64`1[Int16]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<2814792717434890>
; Assembly listing for method Vector64As.TestClass:AsInt64_ushort(System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M35535_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M35535_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M35535_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=885d7530) for method Vector64As.TestClass:AsInt64_ushort(System.Runtime.Intrinsics.Vector64`1[UInt16]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<2814792717434890>
; Assembly listing for method Vector64As.TestClass:AsInt64_int(System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M39240_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M39240_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M39240_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=4bb366b7) for method Vector64As.TestClass:AsInt64_int(System.Runtime.Intrinsics.Vector64`1[Int32]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<42949672970>
; Assembly listing for method Vector64As.TestClass:AsInt64_uint(System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M51784_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M51784_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M51784_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=6d3f35b7) for method Vector64As.TestClass:AsInt64_uint(System.Runtime.Intrinsics.Vector64`1[UInt32]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<42949672970>
; Assembly listing for method Vector64As.TestClass:AsInt64_long(System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op "Inlining Arg"
;
; Lcl frame size = 32

G_M55090_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M55090_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M55090_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=056028cd) for method Vector64As.TestClass:AsInt64_long(System.Runtime.Intrinsics.Vector64`1[Int64]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<10>
; Assembly listing for method Vector64As.TestClass:AsInt64_ulong(System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M5490_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M5490_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M5490_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=fb81ea8d) for method Vector64As.TestClass:AsInt64_ulong(System.Runtime.Intrinsics.Vector64`1[UInt64]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<10>
; Assembly listing for method Vector64As.TestClass:AsInt64_float(System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M51299_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M51299_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M51299_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=849a379c) for method Vector64As.TestClass:AsInt64_float(System.Runtime.Intrinsics.Vector64`1[Single]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<4693201174493501850>
; Assembly listing for method Vector64As.TestClass:AsInt64_double(System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector64`1[Int64]
; Emitting BLENDED_CODE for generic ARM64 CPU - Windows
; optimized code
; fp based frame
; partially interruptible
; Final local variable assignments
;
;  V00 arg0         [V00    ] (  3,  3   )   simd8  ->  [fp+0x28]   HFA(double)  do-not-enreg[XS] addr-exposed
;# V01 OutArgs      [V01    ] (  1,  1   )  lclBlk ( 0) [sp+0x00]   "OutgoingArgSpace"
;  V02 tmp1         [V02,T00] (  2,  4   )   simd8  ->   d0         HFA(double)  "Inlining Arg"
;  V03 tmp2         [V03,T01] (  2,  4   )   simd8  ->  [fp+0x18]   HFA(double)  do-not-enreg[SF] ld-addr-op overlapping-fields "Inlining Arg"
;
; Lcl frame size = 32

G_M16201_IG01:
        A9BD7BFD          stp     fp, lr, [sp,#-48]!
        910003FD          mov     fp, sp
        FD0017A0          str     d0, [fp,#40]	// [V00 arg0]
						;; bbWeight=1    PerfScore 2.50
G_M16201_IG02:
        FD4017A0          ldr     d0, [fp,#40]
        FD000FA0          str     d0, [fp,#24]	// [V03 tmp2]
        FD400FA0          ldr     d0, [fp,#24]	// [V03 tmp2]
						;; bbWeight=1    PerfScore 5.00
G_M16201_IG03:
        A8C37BFD          ldp     fp, lr, [sp],#48
        D65F03C0          ret     lr
						;; bbWeight=1    PerfScore 2.00

; Total bytes of code 32, prolog size 8, PerfScore 12.70, (MethodHash=4f86c0b6) for method Vector64As.TestClass:AsInt64_double(System.Runtime.Intrinsics.Vector64`1[Double]):System.Runtime.Intrinsics.Vector64`1[Int64]
; ============================================================

<4622100592565682176>