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Handle more than 64 registers - Part 3 (#102592)
* Add `high` in regMaskTP * Introduce SingleTypeRegSet * Use SingleTypeRegSet in few places * Delete some methods in regMaskTP * Delete some more methods of regMaskTP * Fix actualRegistersMask * Use SingleTypeRegSet in consecutive register code * Use SingleTypeRegSet in consecutive registers codebase * Change genRegMask*() method to return SingleTypeRegSet * wip * another wip * Everything except newRefPosition/killMask * refactor code around buildkill * fix build errors * some more errors * jit format * fixed build error for arm64 * REVERT: temporary add #ifdef TARGET_ARM64 for accessing regMaskTP methods * forgot to add the new file * make addRegsForKill only on low * jit format * Revert "REVERT: temporary add #ifdef TARGET_ARM64 for accessing regMaskTP methods" This reverts commit 325bc6e. * Various fixes after merge * passing arm64 build * clrjit build works * clrjit_universal_arm_x64 build works * clrjit_unix_x64_x64 build works * clrjit_win_x86_x64 build works * fix a bug in size * delete unwanted method * jit format * Remove high * Continue using regMaskTP for NodeInternalRegisters * Pass regType to getConstrainedRegMask() * jit format * fix a wrong parameter for consecutive register * fix riscv64 build errors * jit format
1 parent 80374cc commit ce1477b

21 files changed

+589
-578
lines changed

src/coreclr/jit/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -167,6 +167,7 @@ set( JIT_SOURCES
167167
redundantbranchopts.cpp
168168
regalloc.cpp
169169
registerargconvention.cpp
170+
regMaskTPOps.cpp
170171
regset.cpp
171172
scev.cpp
172173
scopeinfo.cpp

src/coreclr/jit/codegencommon.cpp

Lines changed: 15 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -6252,26 +6252,26 @@ regMaskTP CodeGen::genPushRegs(regMaskTP regs, regMaskTP* byrefRegs, regMaskTP*
62526252

62536253
regMaskTP pushedRegs = regs;
62546254

6255-
for (regNumber reg = REG_INT_FIRST; regs != RBM_NONE; reg = REG_NEXT(reg))
6255+
for (regNumber reg = REG_INT_FIRST; reg <= REG_INT_LAST; reg = REG_NEXT(reg))
62566256
{
6257-
regMaskTP regBit = regMaskTP(1) << reg;
6257+
regMaskTP regMask = genRegMask(reg);
62586258

6259-
if ((regBit & regs) == RBM_NONE)
6259+
if ((regMask & pushedRegs) == RBM_NONE)
62606260
continue;
62616261

62626262
var_types type;
6263-
if (regBit & gcInfo.gcRegGCrefSetCur)
6263+
if (regMask & gcInfo.gcRegGCrefSetCur)
62646264
{
62656265
type = TYP_REF;
62666266
}
6267-
else if (regBit & gcInfo.gcRegByrefSetCur)
6267+
else if (regMask & gcInfo.gcRegByrefSetCur)
62686268
{
6269-
*byrefRegs |= regBit;
6269+
*byrefRegs |= regMask;
62706270
type = TYP_BYREF;
62716271
}
62726272
else if (noRefRegs != NULL)
62736273
{
6274-
*noRefRegs |= regBit;
6274+
*noRefRegs |= regMask;
62756275
type = TYP_I_IMPL;
62766276
}
62776277
else
@@ -6282,9 +6282,7 @@ regMaskTP CodeGen::genPushRegs(regMaskTP regs, regMaskTP* byrefRegs, regMaskTP*
62826282
inst_RV(INS_push, reg, type);
62836283

62846284
genSinglePush();
6285-
gcInfo.gcMarkRegSetNpt(regBit);
6286-
6287-
regs &= ~regBit;
6285+
gcInfo.gcMarkRegSetNpt(regMask);
62886286
}
62896287

62906288
return pushedRegs;
@@ -6323,20 +6321,22 @@ void CodeGen::genPopRegs(regMaskTP regs, regMaskTP byrefRegs, regMaskTP noRefReg
63236321
noway_assert(genTypeStSz(TYP_REF) == genTypeStSz(TYP_INT));
63246322
noway_assert(genTypeStSz(TYP_BYREF) == genTypeStSz(TYP_INT));
63256323

6324+
regMaskTP popedRegs = regs;
6325+
63266326
// Walk the registers in the reverse order as genPushRegs()
6327-
for (regNumber reg = REG_INT_LAST; regs != RBM_NONE; reg = REG_PREV(reg))
6327+
for (regNumber reg = REG_INT_LAST; reg >= REG_INT_LAST; reg = REG_PREV(reg))
63286328
{
6329-
regMaskTP regBit = regMaskTP(1) << reg;
6329+
regMaskTP regMask = genRegMask(reg);
63306330

6331-
if ((regBit & regs) == RBM_NONE)
6331+
if ((regMask & popedRegs) == RBM_NONE)
63326332
continue;
63336333

63346334
var_types type;
6335-
if (regBit & byrefRegs)
6335+
if (regMask & byrefRegs)
63366336
{
63376337
type = TYP_BYREF;
63386338
}
6339-
else if (regBit & noRefRegs)
6339+
else if (regMask & noRefRegs)
63406340
{
63416341
type = TYP_INT;
63426342
}
@@ -6350,8 +6350,6 @@ void CodeGen::genPopRegs(regMaskTP regs, regMaskTP byrefRegs, regMaskTP noRefReg
63506350

63516351
if (type != TYP_INT)
63526352
gcInfo.gcMarkRegPtrVal(reg, type);
6353-
6354-
regs &= ~regBit;
63556353
}
63566354

63576355
#endif // FEATURE_FIXED_OUT_ARGS

src/coreclr/jit/codegeninterface.h

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -75,31 +75,31 @@ class CodeGenInterface
7575
}
7676

7777
#if defined(TARGET_AMD64)
78-
regMaskTP rbmAllFloat;
79-
regMaskTP rbmFltCalleeTrash;
78+
SingleTypeRegSet rbmAllFloat;
79+
SingleTypeRegSet rbmFltCalleeTrash;
8080

81-
FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
81+
FORCEINLINE SingleTypeRegSet get_RBM_ALLFLOAT() const
8282
{
8383
return this->rbmAllFloat;
8484
}
85-
FORCEINLINE regMaskTP get_RBM_FLT_CALLEE_TRASH() const
85+
FORCEINLINE SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH() const
8686
{
8787
return this->rbmFltCalleeTrash;
8888
}
8989
#endif // TARGET_AMD64
9090

9191
#if defined(TARGET_XARCH)
92-
regMaskTP rbmAllMask;
93-
regMaskTP rbmMskCalleeTrash;
92+
SingleTypeRegSet rbmAllMask;
93+
SingleTypeRegSet rbmMskCalleeTrash;
9494

9595
// Call this function after the equivalent fields in Compiler have been initialized.
9696
void CopyRegisterInfo();
9797

98-
FORCEINLINE regMaskTP get_RBM_ALLMASK() const
98+
FORCEINLINE SingleTypeRegSet get_RBM_ALLMASK() const
9999
{
100100
return this->rbmAllMask;
101101
}
102-
FORCEINLINE regMaskTP get_RBM_MSK_CALLEE_TRASH() const
102+
FORCEINLINE SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH() const
103103
{
104104
return this->rbmMskCalleeTrash;
105105
}

src/coreclr/jit/compiler.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3485,12 +3485,12 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
34853485
// Make sure we copy the register info and initialize the
34863486
// trash regs after the underlying fields are initialized
34873487

3488-
const regMaskTP vtCalleeTrashRegs[TYP_COUNT]{
3488+
const SingleTypeRegSet vtCalleeTrashRegs[TYP_COUNT]{
34893489
#define DEF_TP(tn, nm, jitType, sz, sze, asze, st, al, regTyp, regFld, csr, ctr, tf) ctr,
34903490
#include "typelist.h"
34913491
#undef DEF_TP
34923492
};
3493-
memcpy(varTypeCalleeTrashRegs, vtCalleeTrashRegs, sizeof(regMaskTP) * TYP_COUNT);
3493+
memcpy(varTypeCalleeTrashRegs, vtCalleeTrashRegs, sizeof(SingleTypeRegSet) * TYP_COUNT);
34943494

34953495
codeGen->CopyRegisterInfo();
34963496
#endif // TARGET_XARCH

src/coreclr/jit/compiler.h

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -11246,8 +11246,8 @@ class Compiler
1124611246
//
1124711247
// Users of these values need to define four accessor functions:
1124811248
//
11249-
// regMaskTP get_RBM_ALLFLOAT();
11250-
// regMaskTP get_RBM_FLT_CALLEE_TRASH();
11249+
// SingleTypeRegSet get_RBM_ALLFLOAT();
11250+
// SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH();
1125111251
// unsigned get_CNT_CALLEE_TRASH_FLOAT();
1125211252
// unsigned get_AVAILABLE_REG_COUNT();
1125311253
//
@@ -11256,16 +11256,16 @@ class Compiler
1125611256
// This was done to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
1125711257
// TARGET_AMD64 requires one.
1125811258
//
11259-
regMaskTP rbmAllFloat;
11260-
regMaskTP rbmFltCalleeTrash;
11261-
unsigned cntCalleeTrashFloat;
11259+
SingleTypeRegSet rbmAllFloat;
11260+
SingleTypeRegSet rbmFltCalleeTrash;
11261+
unsigned cntCalleeTrashFloat;
1126211262

1126311263
public:
11264-
FORCEINLINE regMaskTP get_RBM_ALLFLOAT() const
11264+
FORCEINLINE SingleTypeRegSet get_RBM_ALLFLOAT() const
1126511265
{
1126611266
return this->rbmAllFloat;
1126711267
}
11268-
FORCEINLINE regMaskTP get_RBM_FLT_CALLEE_TRASH() const
11268+
FORCEINLINE SingleTypeRegSet get_RBM_FLT_CALLEE_TRASH() const
1126911269
{
1127011270
return this->rbmFltCalleeTrash;
1127111271
}
@@ -11284,8 +11284,8 @@ class Compiler
1128411284
//
1128511285
// Users of these values need to define four accessor functions:
1128611286
//
11287-
// regMaskTP get_RBM_ALLMASK();
11288-
// regMaskTP get_RBM_MSK_CALLEE_TRASH();
11287+
// SingleTypeRegSet get_RBM_ALLMASK();
11288+
// SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH();
1128911289
// unsigned get_CNT_CALLEE_TRASH_MASK();
1129011290
// unsigned get_AVAILABLE_REG_COUNT();
1129111291
//
@@ -11294,17 +11294,17 @@ class Compiler
1129411294
// This was done to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
1129511295
// TARGET_XARCH requires one.
1129611296
//
11297-
regMaskTP rbmAllMask;
11298-
regMaskTP rbmMskCalleeTrash;
11299-
unsigned cntCalleeTrashMask;
11300-
regMaskTP varTypeCalleeTrashRegs[TYP_COUNT];
11297+
SingleTypeRegSet rbmAllMask;
11298+
SingleTypeRegSet rbmMskCalleeTrash;
11299+
unsigned cntCalleeTrashMask;
11300+
SingleTypeRegSet varTypeCalleeTrashRegs[TYP_COUNT];
1130111301

1130211302
public:
11303-
FORCEINLINE regMaskTP get_RBM_ALLMASK() const
11303+
FORCEINLINE SingleTypeRegSet get_RBM_ALLMASK() const
1130411304
{
1130511305
return this->rbmAllMask;
1130611306
}
11307-
FORCEINLINE regMaskTP get_RBM_MSK_CALLEE_TRASH() const
11307+
FORCEINLINE SingleTypeRegSet get_RBM_MSK_CALLEE_TRASH() const
1130811308
{
1130911309
return this->rbmMskCalleeTrash;
1131011310
}

src/coreclr/jit/compiler.hpp

Lines changed: 3 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -935,7 +935,7 @@ inline unsigned Compiler::funGetFuncIdx(BasicBlock* block)
935935

936936
inline regNumber genRegNumFromMask(regMaskTP mask)
937937
{
938-
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
938+
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero
939939

940940
/* Convert the mask to a register number */
941941

@@ -960,7 +960,7 @@ inline regNumber genRegNumFromMask(regMaskTP mask)
960960

961961
inline regNumber genFirstRegNumFromMaskAndToggle(regMaskTP& mask)
962962
{
963-
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
963+
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero
964964

965965
/* Convert the mask to a register number */
966966

@@ -983,7 +983,7 @@ inline regNumber genFirstRegNumFromMaskAndToggle(regMaskTP& mask)
983983

984984
inline regNumber genFirstRegNumFromMask(regMaskTP mask)
985985
{
986-
assert(mask != 0); // Must have one bit set, so can't have a mask of zero
986+
assert(mask.IsNonEmpty()); // Must have one bit set, so can't have a mask of zero
987987

988988
/* Convert the mask to a register number */
989989

@@ -3496,39 +3496,6 @@ inline unsigned genMapRegNumToRegArgNum(regNumber regNum, var_types type, CorInf
34963496
}
34973497
}
34983498

3499-
/*****************************************************************************/
3500-
/* Return a register mask with the first 'numRegs' argument registers set.
3501-
*/
3502-
3503-
inline regMaskTP genIntAllRegArgMask(unsigned numRegs)
3504-
{
3505-
assert(numRegs <= MAX_REG_ARG);
3506-
3507-
regMaskTP result = RBM_NONE;
3508-
for (unsigned i = 0; i < numRegs; i++)
3509-
{
3510-
result |= intArgMasks[i];
3511-
}
3512-
return result;
3513-
}
3514-
3515-
inline regMaskTP genFltAllRegArgMask(unsigned numRegs)
3516-
{
3517-
#ifndef TARGET_X86
3518-
assert(numRegs <= MAX_FLOAT_REG_ARG);
3519-
3520-
regMaskTP result = RBM_NONE;
3521-
for (unsigned i = 0; i < numRegs; i++)
3522-
{
3523-
result |= fltArgMasks[i];
3524-
}
3525-
return result;
3526-
#else
3527-
assert(!"no x86 float arg regs\n");
3528-
return RBM_NONE;
3529-
#endif
3530-
}
3531-
35323499
/*
35333500
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
35343501
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

src/coreclr/jit/emit.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10062,7 +10062,7 @@ void emitter::emitStackPopLargeStk(BYTE* addr, bool isCall, unsigned char callIn
1006210062
// of callee-saved registers only).
1006310063
for (unsigned calleeSavedRegIdx = 0; calleeSavedRegIdx < CNT_CALL_GC_REGS; calleeSavedRegIdx++)
1006410064
{
10065-
regMaskTP calleeSavedRbm = raRbmCalleeSaveOrder[calleeSavedRegIdx];
10065+
regMaskSmall calleeSavedRbm = raRbmCalleeSaveOrder[calleeSavedRegIdx];
1006610066
if (emitThisGCrefRegs & calleeSavedRbm)
1006710067
{
1006810068
gcrefRegs |= (1 << calleeSavedRegIdx);

src/coreclr/jit/gcencode.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4620,7 +4620,7 @@ void GCInfo::gcInfoRecordGCRegStateChange(GcInfoEncoder* gcInfoEncoder,
46204620
while (regMask)
46214621
{
46224622
// Get hold of the next register bit.
4623-
regMaskTP tmpMask = genFindLowestBit(regMask);
4623+
regMaskSmall tmpMask = genFindLowestBit(regMask);
46244624
assert(tmpMask);
46254625

46264626
// Remember the new state of this register.

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