Arm64: don't fold ldr page offset (PAGEOFFSET_12L) for NativeAOT (#129966)

Fixes #129936.

PR #129589 added an Arm64 fold of `adrp+add+ldr` into
`adrp+ldr[#:lo12:]` via a 64-bit `PAGEOFFSET_12L` reloc
(`R_AARCH64_LDST64_ABS_LO12_NC`). That reloc encodes the offset scaled
by 8, so the target must be 8-byte aligned. In R2R the relocatable loads
always go through pointer-aligned indirection cells, but NativeAOT can
fold a direct 64-bit load of byte-packed frozen data (4-byte aligned),
which `ld.lld` rejects:

```
ld.lld : error : improper alignment for relocation R_AARCH64_LDST64_ABS_LO12_NC: 0x74A52C is not aligned to 8 bytes
```

The fold is purely a size optimization, so this restricts it to
non-NativeAOT and falls back to the always-safe `adrp+add+ldr`.

Validation (SPMI, linux-arm64):
- `benchmarks.run` (R2R, ~427K contexts): **0 asm diffs** — the win is
preserved.
- `smoke_tests.nativeaot` (18891 ctx): clean replay, no diffs.

---------

Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Co-authored-by: Jakob Botsch Nielsen <Jakob.botsch.nielsen@gmail.com>

Author: 3 people

src/coreclr/inc/corinfo.h

@@ -3190,6 +3190,15 @@ class ICorStaticInfo
     // Returns the primitive type for passing/returning a Wasm struct by value,
     // or CORINFO_WASM_TYPE_VOID if passing/returning must be by reference.
     virtual CorInfoWasmType getWasmLowering(CORINFO_CLASS_HANDLE structHnd) = 0;
+
+    // Returns the guaranteed alignment, in bytes, of the data referenced by 'address'.
+    // 'address' is a relocation target such as a static, RVA, or frozen-data blob. The JIT
+    // uses this to decide whether it can emit an alignment-sensitive relocation against the
+    // target (e.g. the Arm64 LDST64 ':lo12:' page-offset fold, which requires the target to
+    // be 8-byte aligned).
+    virtual uint32_t getAddressAlignment(
+            void* address
+            ) = 0;
 };
 
 /*****************************************************************************

src/coreclr/inc/icorjitinfoimpl_generated.h

@@ -536,6 +536,9 @@ void getFpStructLowering(
 CorInfoWasmType getWasmLowering(
           CORINFO_CLASS_HANDLE structHnd) override;
 
+uint32_t getAddressAlignment(
+          void* address) override;
+
 uint32_t getThreadTLSIndex(
           void** ppIndirection) override;
 

src/coreclr/inc/jiteeversionguid.h

@@ -37,11 +37,11 @@
 
 #include <minipal/guid.h>
 
-constexpr GUID JITEEVersionIdentifier = { /* 5fe1ab78-3c99-4866-8771-5596c7a0e181 */
-    0x5fe1ab78,
-    0x3c99,
-    0x4866,
-    {0x87, 0x71, 0x55, 0x96, 0xc7, 0xa0, 0xe1, 0x81}
+constexpr GUID JITEEVersionIdentifier = { /* 58dd28fc-38f0-4782-989a-25e2d721a98b */
+    0x58dd28fc,
+    0x38f0,
+    0x4782,
+    {0x98, 0x9a, 0x25, 0xe2, 0xd7, 0x21, 0xa9, 0x8b}
   };
 
 #endif // JIT_EE_VERSIONING_GUID_H

src/coreclr/jit/ICorJitInfo_names_generated.h

@@ -133,6 +133,7 @@ DEF_CLR_API(getSystemVAmd64PassStructInRegisterDescriptor)
 DEF_CLR_API(getSwiftLowering)
 DEF_CLR_API(getFpStructLowering)
 DEF_CLR_API(getWasmLowering)
+DEF_CLR_API(getAddressAlignment)
 DEF_CLR_API(getThreadTLSIndex)
 DEF_CLR_API(getAddrOfCaptureThreadGlobal)
 DEF_CLR_API(getHelperFtn)

src/coreclr/jit/ICorJitInfo_wrapper_generated.hpp

@@ -1269,6 +1269,15 @@ CorInfoWasmType WrapICorJitInfo::getWasmLowering(
     return temp;
 }
 
+uint32_t WrapICorJitInfo::getAddressAlignment(
+          void* address)
+{
+    API_ENTER(getAddressAlignment);
+    uint32_t temp = wrapHnd->getAddressAlignment(address);
+    API_LEAVE(getAddressAlignment);
+    return temp;
+}
+
 uint32_t WrapICorJitInfo::getThreadTLSIndex(
           void** ppIndirection)
 {

src/coreclr/jit/compiler.h

@@ -9688,6 +9688,8 @@ class Compiler
 
     CorInfoReloc eeGetRelocTypeHint(void* target);
 
+    uint32_t eeGetAddressAlignment(void* address);
+
     // ICorStaticInfo wrapper functions
 
 #if defined(UNIX_AMD64_ABI)

src/coreclr/jit/ee_il_dll.cpp

@@ -1399,6 +1399,30 @@ CorInfoReloc Compiler::eeGetRelocTypeHint(void* target)
     }
 }
 
+//------------------------------------------------------------------------
+// eeGetAddressAlignment: Get the guaranteed alignment, in bytes, of the data referenced by
+//   'address' (a relocation target such as a static, RVA, or frozen-data blob).
+//
+// Arguments:
+//   address - the relocation target to query
+//
+// Return Value:
+//   The guaranteed alignment in bytes, or 1 when it cannot be determined (e.g. when the JIT's
+//   target does not match the VM). The JIT uses this to gate alignment-sensitive relocations.
+//
+uint32_t Compiler::eeGetAddressAlignment(void* address)
+{
+    if (info.compMatchedVM)
+    {
+        return info.compCompHnd->getAddressAlignment(address);
+    }
+    else
+    {
+        // The VM does not match the JIT target, so we cannot assume any alignment.
+        return 1;
+    }
+}
+
 CORINFO_FIELD_HANDLE Compiler::eeFindJitDataOffs(unsigned dataOffs)
 {
     // Data offsets are marked by the fact that the low two bits are 0b01 0x1

src/coreclr/jit/emitarm64.cpp

@@ -18094,6 +18094,15 @@ bool emitter::TryFoldPageOffsetIntoLdr(instruction ins, emitAttr attr, regNumber
 
     void* sym = prevId->idAddr()->iiaAddr;
 
+    // PAGEOFFSET_12L encodes the :lo12: page offset scaled by 8, so the reloc target must be at
+    // least 8-byte aligned. Only fold when the VM guarantees that alignment for 'sym' (e.g. in
+    // NativeAOT a byte-packed non-GC static region may be only 4-byte aligned, which the linker
+    // rejects for R_AARCH64_LDST64_ABS_LO12_NC).
+    if (m_compiler->eeGetAddressAlignment(sym) < 8)
+    {
+        return false;
+    }
+
     // Drop the "add"; the preceding "adrp" already put the page base of 'sym' into reg1.
     emitRemoveLastInstruction();
 

src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs

@@ -4525,6 +4525,17 @@ private CorInfoReloc getRelocTypeHint(void* target)
             }
         }
 
+        private uint getAddressAlignment(void* address)
+        {
+            if (address != null && HandleToObject(address) is IObjectNodeWithAlignment node)
+            {
+                return (uint)node.GetAlignment(_compilation.NodeFactory);
+            }
+
+            // Null or unknown target: report unaligned so the JIT avoids alignment-sensitive relocations.
+            return 1;
+        }
+
         private uint getExpectedTargetArchitecture()
         {
             TargetArchitecture arch = _compilation.TypeSystemContext.Target.Architecture;

src/coreclr/tools/Common/JitInterface/CorInfoImpl_generated.cs

@@ -149,6 +149,7 @@ static ICorJitInfoCallbacks()
                 s_callbacks.getSwiftLowering = &_getSwiftLowering;
                 s_callbacks.getFpStructLowering = &_getFpStructLowering;
                 s_callbacks.getWasmLowering = &_getWasmLowering;
+                s_callbacks.getAddressAlignment = &_getAddressAlignment;
                 s_callbacks.getThreadTLSIndex = &_getThreadTLSIndex;
                 s_callbacks.getAddrOfCaptureThreadGlobal = &_getAddrOfCaptureThreadGlobal;
                 s_callbacks.getHelperFtn = &_getHelperFtn;
@@ -331,6 +332,7 @@ static ICorJitInfoCallbacks()
             public delegate* unmanaged<IntPtr, IntPtr*, CORINFO_CLASS_STRUCT_*, CORINFO_SWIFT_LOWERING*, void> getSwiftLowering;
             public delegate* unmanaged<IntPtr, IntPtr*, CORINFO_CLASS_STRUCT_*, CORINFO_FPSTRUCT_LOWERING*, void> getFpStructLowering;
             public delegate* unmanaged<IntPtr, IntPtr*, CORINFO_CLASS_STRUCT_*, CorInfoWasmType> getWasmLowering;
+            public delegate* unmanaged<IntPtr, IntPtr*, void*, uint> getAddressAlignment;
             public delegate* unmanaged<IntPtr, IntPtr*, void**, uint> getThreadTLSIndex;
             public delegate* unmanaged<IntPtr, IntPtr*, void**, int*> getAddrOfCaptureThreadGlobal;
             public delegate* unmanaged<IntPtr, IntPtr*, CorInfoHelpFunc, CORINFO_CONST_LOOKUP*, CORINFO_METHOD_STRUCT_**, void> getHelperFtn;
@@ -2292,6 +2294,21 @@ private static CorInfoWasmType _getWasmLowering(IntPtr thisHandle, IntPtr* ppExc
             }
         }
 
+        [UnmanagedCallersOnly]
+        private static uint _getAddressAlignment(IntPtr thisHandle, IntPtr* ppException, void* address)
+        {
+            var _this = GetThis(thisHandle);
+            try
+            {
+                return _this.getAddressAlignment(address);
+            }
+            catch (Exception ex)
+            {
+                *ppException = _this.AllocException(ex);
+                return default;
+            }
+        }
+
         [UnmanagedCallersOnly]
         private static uint _getThreadTLSIndex(IntPtr thisHandle, IntPtr* ppException, void** ppIndirection)
         {