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kode54kode54
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Update lazyusf2 from Cog and mupen64plus
Upstream the changes I made for Cog, which included blocking out great portions of the dynarec code with ifdefs. Also include updates to the RSP HLE code, such as memory bounds limiting on many arguments throughout. This fixes a major crash with Conker's Bad Fur Day.
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56 files changed

+1643
-250
lines changed

‎Makefile

+15-3
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,9 @@
11

2+
CPU := $(shell uname -m)
23
ARCH := $(shell getconf LONG_BIT)
34

5+
OPTFLAGS = -Os
6+
47
FLAGS_32 = -msse -mmmx -msse2
58
FLAGS_64 = -fPIC
69

@@ -10,10 +13,19 @@ OBJS_RECOMPILER_32 = r4300/x86/assemble.o r4300/x86/gbc.o r4300/x86/gcop0.o r430
1013

1114
OBJS_RECOMPILER_64 = r4300/x86_64/assemble.o r4300/x86_64/gbc.o r4300/x86_64/gcop0.o r4300/x86_64/gcop1.o r4300/x86_64/gcop1_d.o r4300/x86_64/gcop1_l.o r4300/x86_64/gcop1_s.o r4300/x86_64/gcop1_w.o r4300/x86_64/gr4300.o r4300/x86_64/gregimm.o r4300/x86_64/gspecial.o r4300/x86_64/gtlb.o r4300/x86_64/regcache.o r4300/x86_64/rjump.o
1215

13-
OBJS = ai/ai_controller.o api/callbacks.o debugger/dbg_decoder.o main/main.o main/rom.o main/savestates.o main/util.o memory/memory.o pi/cart_rom.o pi/pi_controller.o r4300/cached_interp.o r4300/cp0.o r4300/cp1.o r4300/exception.o r4300/interupt.o r4300/mi_controller.o r4300/pure_interp.o r4300/r4300.o r4300/r4300_core.o r4300/recomp.o r4300/reset.o r4300/tlb.o rdp/rdp_core.o ri/rdram.o ri/rdram_detection_hack.o ri/ri_controller.o rsp/rsp_core.o rsp_hle/alist.o rsp_hle/alist_audio.o rsp_hle/alist_naudio.o rsp_hle/alist_nead.o rsp_hle/audio.o rsp_hle/cicx105.o rsp_hle/hle.o rsp_hle/jpeg.o rsp_hle/memory.o rsp_hle/mp3.o rsp_hle/musyx.o rsp_hle/plugin.o rsp_lle/rsp.o si/cic.o si/game_controller.o si/n64_cic_nus_6105.o si/pif.o si/si_controller.o usf/usf.o usf/barray.o usf/resampler.o vi/vi_controller.o $(OBJS_RECOMPILER_$(ARCH))
16+
OBJS = ai/ai_controller.o api/callbacks.o debugger/dbg_decoder.o main/main.o main/rom.o main/savestates.o main/util.o memory/memory.o pi/cart_rom.o pi/pi_controller.o r4300/cached_interp.o r4300/cp0.o r4300/cp1.o r4300/exception.o r4300/interupt.o r4300/mi_controller.o r4300/pure_interp.o r4300/r4300.o r4300/r4300_core.o r4300/recomp.o r4300/reset.o r4300/tlb.o rdp/rdp_core.o ri/rdram.o ri/rdram_detection_hack.o ri/ri_controller.o rsp/rsp_core.o rsp_hle/alist.o rsp_hle/alist_audio.o rsp_hle/alist_naudio.o rsp_hle/alist_nead.o rsp_hle/audio.o rsp_hle/cicx105.o rsp_hle/hle.o rsp_hle/hvqm.o rsp_hle/jpeg.o rsp_hle/memory.o rsp_hle/mp3.o rsp_hle/musyx.o rsp_hle/plugin.o rsp_hle/re2.o rsp_lle/rsp.o si/cic.o si/game_controller.o si/n64_cic_nus_6105.o si/pif.o si/si_controller.o usf/usf.o usf/barray.o usf/resampler.o vi/vi_controller.o $(OBJS_RECOMPILER_$(ARCH))
17+
18+
OPTS_x86_64 = -DDYNAREC
19+
OPTS_AArch64 =
20+
OPTS_arm64 =
21+
22+
OPTS = $(OPTS_$(CPU))
23+
24+
ROPTS_x86_64 = -DARCH_MIN_SSE2
25+
ROPTS_AArch64 = -DARCH_MIN_ARM_NEON
26+
ROPTS_arm64 = -DARCH_MIN_ARM_NEON
1427

15-
OPTS = -DDYNAREC
16-
ROPTS = -DARCH_MIN_SSE2
28+
ROPTS = $(ROPTS_$(CPU))
1729

1830
all: liblazyusf.a bench dumpresampled
1931

‎main/savestates.c

+5-5
Original file line numberDiff line numberDiff line change
@@ -355,7 +355,7 @@ static int savestates_load_pj64(usf_state_t * state, unsigned char * ptr, unsign
355355

356356
unsigned char * state_ptr = ptr;
357357
unsigned int state_size = size;
358-
unsigned int count_per_scanline;
358+
unsigned int count_per_scanline;
359359

360360
size_t savestateSize;
361361
unsigned char *savestateData = 0, *curr;
@@ -598,10 +598,10 @@ static int savestates_load_pj64(usf_state_t * state, unsigned char * ptr, unsign
598598

599599
open_rom_header(state, savestateData, sizeof(m64p_rom_header));
600600

601-
// Needs the rom header parsed first before the delay can be calculated
602-
count_per_scanline = (unsigned int)((float)state->ROM_PARAMS.aidacrate / (float)state->ROM_PARAMS.vilimit) / (state->g_vi.regs[VI_V_SYNC_REG] + 1);
603-
state->g_vi.delay = (state->g_vi.regs[VI_V_SYNC_REG] + 1) * count_per_scanline;
604-
601+
// Needs the rom header parsed first before the delay can be calculated
602+
count_per_scanline = (unsigned int)((float)state->ROM_PARAMS.aidacrate / (float)state->ROM_PARAMS.vilimit) / (state->g_vi.regs[VI_V_SYNC_REG] + 1);
603+
state->g_vi.delay = (state->g_vi.regs[VI_V_SYNC_REG] + 1) * count_per_scanline;
604+
605605
#ifdef NEW_DYNAREC
606606
if (state->r4300emu == CORE_DYNAREC) {
607607
state->pcaddr = state->last_addr;

‎pi/pi_controller.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ static void dma_pi_write(usf_state_t * state, struct pi_controller* pi)
6363
{
6464
unsigned int longueur;
6565
int i;
66-
66+
6767
#ifdef DEBUG_INFO
6868
if (state->debug_log)
6969
fprintf(state->debug_log, "PI DMA WRITE: %08x to %08x for %08x bytes\n", pi->regs[PI_CART_ADDR_REG], pi->regs[PI_DRAM_ADDR_REG], pi->regs[PI_WR_LEN_REG] + 1);
@@ -101,7 +101,7 @@ static void dma_pi_write(usf_state_t * state, struct pi_controller* pi)
101101
longueur = (pi->regs[PI_WR_LEN_REG] & 0xFFFFFF)+1;
102102
i = (pi->regs[PI_CART_ADDR_REG]-0x10000000)&0x3FFFFFF;
103103
longueur = (i + (int) longueur) > pi->cart_rom.rom_size ?
104-
(pi->cart_rom.rom_size - i) : longueur;
104+
(unsigned int)(pi->cart_rom.rom_size - i) : longueur;
105105
longueur = (pi->regs[PI_DRAM_ADDR_REG] + longueur) > 0x7FFFFF ?
106106
(0x7FFFFF - pi->regs[PI_DRAM_ADDR_REG]) : longueur;
107107

@@ -132,7 +132,7 @@ static void dma_pi_write(usf_state_t * state, struct pi_controller* pi)
132132
bit_array_set(state->barray_ram_written_first, ram_address / 4);
133133
}
134134
}
135-
135+
136136
((unsigned char*)pi->ri->rdram.dram)[ram_address^S8]=
137137
pi->cart_rom.rom[rom_address^S8];
138138

‎prj/msvc/lazyusf2.vcxproj

+3-1
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,7 @@
6363
</ClCompile>
6464
<ClCompile Include="..\..\rsp_hle\cicx105.c" />
6565
<ClCompile Include="..\..\rsp_hle\hle.c" />
66+
<ClCompile Include="..\..\rsp_hle\hvqm.c" />
6667
<ClCompile Include="..\..\rsp_hle\jpeg.c" />
6768
<ClCompile Include="..\..\rsp_hle\memory.c">
6869
<ObjectFileName Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">$(IntDir)/memory_hle.obj</ObjectFileName>
@@ -71,6 +72,7 @@
7172
<ClCompile Include="..\..\rsp_hle\mp3.c" />
7273
<ClCompile Include="..\..\rsp_hle\musyx.c" />
7374
<ClCompile Include="..\..\rsp_hle\plugin.c" />
75+
<ClCompile Include="..\..\rsp_hle\re2.c" />
7476
<ClCompile Include="..\..\rsp_lle\rsp.c">
7577
<PreprocessorDefinitions Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">WIN32;ARCH_MIN_SSE2;_DEBUG;_LIB;%(PreprocessorDefinitions)</PreprocessorDefinitions>
7678
<PreprocessorDefinitions Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">WIN32;ARCH_MIN_SSE2;NDEBUG;_LIB;%(PreprocessorDefinitions)</PreprocessorDefinitions>
@@ -287,4 +289,4 @@
287289
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
288290
<ImportGroup Label="ExtensionTargets">
289291
</ImportGroup>
290-
</Project>
292+
</Project>

‎prj/msvc/lazyusf2.vcxproj.filters

+7-1
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,9 @@
9090
<ClCompile Include="..\..\rsp_hle\hle.c">
9191
<Filter>rsp_hle\Source Files</Filter>
9292
</ClCompile>
93+
<ClCompile Include="..\..\rsp_hle\hvqm.c">
94+
<Filter>rsp_hle\Source Files</Filter>
95+
</ClCompile>
9396
<ClCompile Include="..\..\rsp_hle\jpeg.c">
9497
<Filter>rsp_hle\Source Files</Filter>
9598
</ClCompile>
@@ -105,6 +108,9 @@
105108
<ClCompile Include="..\..\rsp_hle\plugin.c">
106109
<Filter>rsp_hle\Source Files</Filter>
107110
</ClCompile>
111+
<ClCompile Include="..\..\rsp_hle\re2.c">
112+
<Filter>rsp_hle\Source Files</Filter>
113+
</ClCompile>
108114
<ClCompile Include="..\..\rsp_lle\rsp.c">
109115
<Filter>rsp_lle\Source Files</Filter>
110116
</ClCompile>
@@ -644,4 +650,4 @@
644650
<Filter>r4300</Filter>
645651
</None>
646652
</ItemGroup>
647-
</Project>
653+
</Project>

‎r4300/cached_interp.c

+8
Original file line numberDiff line numberDiff line change
@@ -154,7 +154,9 @@ static void osal_fastcall FIN_BLOCK(usf_state_t * state)
154154
Used by dynarec only, check should be unnecessary
155155
*/
156156
state->PC->ops(state);
157+
#ifdef DYNAREC
157158
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
159+
#endif
158160
}
159161
else
160162
{
@@ -176,7 +178,9 @@ Used by dynarec only, check should be unnecessary
176178
else
177179
state->PC->ops(state);
178180

181+
#ifdef DYNAREC
179182
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
183+
#endif
180184
}
181185
}
182186

@@ -196,8 +200,10 @@ The preceeding update_debugger SHOULD be unnecessary since it should have been
196200
called before NOTCOMPILED would have been executed
197201
*/
198202
state->PC->ops(state);
203+
#ifdef DYNAREC
199204
if (state->r4300emu == CORE_DYNAREC)
200205
dyna_jump(state);
206+
#endif
201207
}
202208

203209
static void osal_fastcall NOTCOMPILED2(usf_state_t * state)
@@ -537,7 +543,9 @@ void osal_fastcall jump_to_func(usf_state_t * state)
537543
}
538544
state->PC=state->actual->block+((addr-state->actual->start)>>2);
539545

546+
#ifdef DYNAREC
540547
if (state->r4300emu == CORE_DYNAREC) dyna_jump(state);
548+
#endif
541549
}
542550
#undef addr
543551

‎r4300/exception.c

+4
Original file line numberDiff line numberDiff line change
@@ -96,11 +96,13 @@ void TLB_refill_exception(usf_state_t * state, unsigned int address, int w)
9696

9797
state->last_addr = state->PC->addr;
9898

99+
#ifdef DYNAREC
99100
if (state->r4300emu == CORE_DYNAREC)
100101
{
101102
dyna_jump(state);
102103
if (!state->dyna_interp) state->delay_slot = 0;
103104
}
105+
#endif
104106

105107
if (state->r4300emu != CORE_DYNAREC || state->dyna_interp)
106108
{
@@ -132,11 +134,13 @@ void osal_fastcall exception_general(usf_state_t * state)
132134
}
133135
generic_jump_to(state, 0x80000180);
134136
state->last_addr = state->PC->addr;
137+
#ifdef DYNAREC
135138
if (state->r4300emu == CORE_DYNAREC)
136139
{
137140
dyna_jump(state);
138141
if (!state->dyna_interp) state->delay_slot = 0;
139142
}
143+
#endif
140144
if (state->r4300emu != CORE_DYNAREC || state->dyna_interp)
141145
{
142146
state->dyna_interp = 0;

‎r4300/interupt.c

+4-2
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ void add_interupt_event_count(usf_state_t * state, int type, unsigned int count)
149149
{
150150
struct node* event;
151151
struct node* e;
152-
152+
153153
if (get_event(state, type)) {
154154
DebugMessage(state, M64MSG_WARNING, "two events of type 0x%x in interrupt queue", type);
155155
}
@@ -343,7 +343,7 @@ void check_interupt(usf_state_t * state)
343343

344344
state->g_r4300.mi.regs[MI_INTR_REG] &= ~MI_INTR_AI;
345345
state->g_r4300.mi.regs[MI_INTR_REG] |= state->g_r4300.mi.AudioIntrReg & MI_INTR_AI;
346-
346+
347347
#ifdef DEBUG_INFO
348348
if (state->g_r4300.mi.regs[MI_INTR_REG] && state->debug_log)
349349
fprintf(state->debug_log, "Interrupt %d - ", state->g_r4300.mi.regs[MI_INTR_REG]);
@@ -496,7 +496,9 @@ void osal_fastcall gen_interupt(usf_state_t * state)
496496
if (state->stop == 1)
497497
{
498498
state->g_gs_vi_counter = 0; // debug
499+
#ifdef DYNAREC
499500
dyna_stop(state);
501+
#endif
500502
}
501503

502504
if (!state->interupt_unsafe_state)

‎r4300/r4300.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -208,6 +208,7 @@ void r4300_reset_soft(usf_state_t * state)
208208
/* ready to execute IPL3 */
209209
}
210210

211+
#ifdef DYNAREC
211212
#if !defined(NO_ASM)
212213
static void dynarec_setup_code()
213214
{
@@ -218,7 +219,7 @@ static void dynarec_setup_code()
218219
mov state, esi
219220
}
220221
#else
221-
asm volatile
222+
__asm __volatile
222223
#ifdef __x86_64__
223224
(" mov %%r15, (%[state]) \n"
224225
#else
@@ -238,6 +239,7 @@ static void dynarec_setup_code()
238239
dyna_stop(state);
239240
}
240241
#endif
242+
#endif
241243

242244
void r4300_begin(usf_state_t * state)
243245
{

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