@@ -1089,6 +1089,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
10891089 u32 mac_reg ;
10901090 s32 ret_val = 0 ;
10911091 u16 phy_reg ;
1092+ u16 oem_reg = 0 ;
10921093
10931094 if ((hw -> mac .type < e1000_pch_lpt ) ||
10941095 (hw -> adapter -> pdev -> device == E1000_DEV_ID_PCH_LPT_I217_LM ) ||
@@ -1130,33 +1131,37 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
11301131 if (ret_val )
11311132 goto out ;
11321133
1134+ /* Force SMBus mode in PHY */
1135+ ret_val = e1000_read_phy_reg_hv_locked (hw , CV_SMB_CTRL , & phy_reg );
1136+ if (ret_val )
1137+ goto release ;
1138+ phy_reg |= CV_SMB_CTRL_FORCE_SMBUS ;
1139+ e1000_write_phy_reg_hv_locked (hw , CV_SMB_CTRL , phy_reg );
1140+
1141+ /* Force SMBus mode in MAC */
1142+ mac_reg = er32 (CTRL_EXT );
1143+ mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS ;
1144+ ew32 (CTRL_EXT , mac_reg );
1145+
11331146 /* Si workaround for ULP entry flow on i127/rev6 h/w. Enable
11341147 * LPLU and disable Gig speed when entering ULP
11351148 */
11361149 if ((hw -> phy .type == e1000_phy_i217 ) && (hw -> phy .revision == 6 )) {
11371150 ret_val = e1000_read_phy_reg_hv_locked (hw , HV_OEM_BITS ,
1138- & phy_reg );
1151+ & oem_reg );
11391152 if (ret_val )
11401153 goto release ;
1154+
1155+ phy_reg = oem_reg ;
11411156 phy_reg |= HV_OEM_BITS_LPLU | HV_OEM_BITS_GBE_DIS ;
1157+
11421158 ret_val = e1000_write_phy_reg_hv_locked (hw , HV_OEM_BITS ,
11431159 phy_reg );
1160+
11441161 if (ret_val )
11451162 goto release ;
11461163 }
11471164
1148- /* Force SMBus mode in PHY */
1149- ret_val = e1000_read_phy_reg_hv_locked (hw , CV_SMB_CTRL , & phy_reg );
1150- if (ret_val )
1151- goto release ;
1152- phy_reg |= CV_SMB_CTRL_FORCE_SMBUS ;
1153- e1000_write_phy_reg_hv_locked (hw , CV_SMB_CTRL , phy_reg );
1154-
1155- /* Force SMBus mode in MAC */
1156- mac_reg = er32 (CTRL_EXT );
1157- mac_reg |= E1000_CTRL_EXT_FORCE_SMBUS ;
1158- ew32 (CTRL_EXT , mac_reg );
1159-
11601165 /* Set Inband ULP Exit, Reset to SMBus mode and
11611166 * Disable SMBus Release on PERST# in PHY
11621167 */
@@ -1168,10 +1173,15 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
11681173 if (to_sx ) {
11691174 if (er32 (WUFC ) & E1000_WUFC_LNKC )
11701175 phy_reg |= I218_ULP_CONFIG1_WOL_HOST ;
1176+ else
1177+ phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST ;
11711178
11721179 phy_reg |= I218_ULP_CONFIG1_STICKY_ULP ;
1180+ phy_reg &= ~I218_ULP_CONFIG1_INBAND_EXIT ;
11731181 } else {
11741182 phy_reg |= I218_ULP_CONFIG1_INBAND_EXIT ;
1183+ phy_reg &= ~I218_ULP_CONFIG1_STICKY_ULP ;
1184+ phy_reg &= ~I218_ULP_CONFIG1_WOL_HOST ;
11751185 }
11761186 e1000_write_phy_reg_hv_locked (hw , I218_ULP_CONFIG1 , phy_reg );
11771187
@@ -1183,6 +1193,15 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
11831193 /* Commit ULP changes in PHY by starting auto ULP configuration */
11841194 phy_reg |= I218_ULP_CONFIG1_START ;
11851195 e1000_write_phy_reg_hv_locked (hw , I218_ULP_CONFIG1 , phy_reg );
1196+
1197+ if ((hw -> phy .type == e1000_phy_i217 ) && (hw -> phy .revision == 6 ) &&
1198+ to_sx && (er32 (STATUS ) & E1000_STATUS_LU )) {
1199+ ret_val = e1000_write_phy_reg_hv_locked (hw , HV_OEM_BITS ,
1200+ oem_reg );
1201+ if (ret_val )
1202+ goto release ;
1203+ }
1204+
11861205release :
11871206 hw -> phy .ops .release (hw );
11881207out :
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