|
249 | 249 | status = "disabled"; |
250 | 250 | }; |
251 | 251 |
|
| 252 | + pdm: pdm@ff040000 { |
| 253 | + compatible = "rockchip,pdm"; |
| 254 | + reg = <0x0 0xff040000 0x0 0x1000>; |
| 255 | + clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>; |
| 256 | + clock-names = "pdm_clk", "pdm_hclk"; |
| 257 | + dmas = <&dmac 16>; |
| 258 | + dma-names = "rx"; |
| 259 | + pinctrl-names = "default", "sleep"; |
| 260 | + pinctrl-0 = <&pdmm0_clk |
| 261 | + &pdmm0_sdi0 |
| 262 | + &pdmm0_sdi1 |
| 263 | + &pdmm0_sdi2 |
| 264 | + &pdmm0_sdi3>; |
| 265 | + pinctrl-1 = <&pdmm0_clk_sleep |
| 266 | + &pdmm0_sdi0_sleep |
| 267 | + &pdmm0_sdi1_sleep |
| 268 | + &pdmm0_sdi2_sleep |
| 269 | + &pdmm0_sdi3_sleep>; |
| 270 | + status = "disabled"; |
| 271 | + }; |
| 272 | + |
252 | 273 | grf: syscon@ff100000 { |
253 | 274 | compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; |
254 | 275 | reg = <0x0 0xff100000 0x0 0x1000>; |
|
931 | 952 | }; |
932 | 953 | }; |
933 | 954 |
|
| 955 | + pdm-0 { |
| 956 | + pdmm0_clk: pdmm0-clk { |
| 957 | + rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>; |
| 958 | + }; |
| 959 | + |
| 960 | + pdmm0_fsync: pdmm0-fsync { |
| 961 | + rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>; |
| 962 | + }; |
| 963 | + |
| 964 | + pdmm0_sdi0: pdmm0-sdi0 { |
| 965 | + rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>; |
| 966 | + }; |
| 967 | + |
| 968 | + pdmm0_sdi1: pdmm0-sdi1 { |
| 969 | + rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>; |
| 970 | + }; |
| 971 | + |
| 972 | + pdmm0_sdi2: pdmm0-sdi2 { |
| 973 | + rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>; |
| 974 | + }; |
| 975 | + |
| 976 | + pdmm0_sdi3: pdmm0-sdi3 { |
| 977 | + rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>; |
| 978 | + }; |
| 979 | + |
| 980 | + pdmm0_clk_sleep: pdmm0-clk-sleep { |
| 981 | + rockchip,pins = |
| 982 | + <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>; |
| 983 | + }; |
| 984 | + |
| 985 | + pdmm0_sdi0_sleep: pdmm0-sdi0-sleep { |
| 986 | + rockchip,pins = |
| 987 | + <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>; |
| 988 | + }; |
| 989 | + |
| 990 | + pdmm0_sdi1_sleep: pdmm0-sdi1-sleep { |
| 991 | + rockchip,pins = |
| 992 | + <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>; |
| 993 | + }; |
| 994 | + |
| 995 | + pdmm0_sdi2_sleep: pdmm0-sdi2-sleep { |
| 996 | + rockchip,pins = |
| 997 | + <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>; |
| 998 | + }; |
| 999 | + |
| 1000 | + pdmm0_sdi3_sleep: pdmm0-sdi3-sleep { |
| 1001 | + rockchip,pins = |
| 1002 | + <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>; |
| 1003 | + }; |
| 1004 | + |
| 1005 | + pdmm0_fsync_sleep: pdmm0-fsync-sleep { |
| 1006 | + rockchip,pins = |
| 1007 | + <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; |
| 1008 | + }; |
| 1009 | + }; |
| 1010 | + |
934 | 1011 | tsadc { |
935 | 1012 | otp_gpio: otp-gpio { |
936 | 1013 | rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; |
|
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