@@ -75,41 +75,8 @@ void ALWAYS_INLINE MixColumn(sph_u64 W[16][2], int ia, int ib, int ic, int id)
7575 W[id][n] = abx ^ bcx ^ cdx ^ ab ^ c;
7676 }
7777}
78- } // anonymous namespace
79-
80- void FullStateRound (sph_u64 W[16 ][2 ], sph_u32& K0, sph_u32& K1, sph_u32& K2, sph_u32& K3)
81- {
82- for (int n = 0 ; n < 16 ; n ++) {
83- sph_u64 Wl = W[n][0 ];
84- sph_u64 Wh = W[n][1 ];
85- sph_u32 X0 = (sph_u32)Wl;
86- sph_u32 X1 = (sph_u32)(Wl >> 32 );
87- sph_u32 X2 = (sph_u32)Wh;
88- sph_u32 X3 = (sph_u32)(Wh >> 32 );
89- sph_u32 Y0, Y1, Y2, Y3;
90- soft_aes::Round (X0, X1, X2, X3, K0, K1, K2, K3, Y0, Y1, Y2, Y3);
91- soft_aes::RoundKeyless (Y0, Y1, Y2, Y3, X0, X1, X2, X3);
92- W[n][0 ] = (sph_u64)X0 | ((sph_u64)X1 << 32 );
93- W[n][1 ] = (sph_u64)X2 | ((sph_u64)X3 << 32 );
94- if ((K0 = T32 (K0 + 1 )) == 0 ) {
95- if ((K1 = T32 (K1 + 1 )) == 0 ) {
96- if ((K2 = T32 (K2 + 1 )) == 0 ) {
97- K3 = T32 (K3 + 1 );
98- }
99- }
100- }
101- }
102- }
103-
104- void MixColumns (uint64_t W[16 ][2 ])
105- {
106- MixColumn (W, 0 , 1 , 2 , 3 );
107- MixColumn (W, 4 , 5 , 6 , 7 );
108- MixColumn (W, 8 , 9 , 10 , 11 );
109- MixColumn (W, 12 , 13 , 14 , 15 );
110- }
11178
112- void ShiftRows (uint64_t W[16 ][2 ])
79+ void ALWAYS_INLINE ShiftRows (uint64_t W[16 ][2 ])
11380{
11481#define SHIFT_ROW1 (a, b, c, d ) do { \
11582 sph_u64 tmp; \
@@ -151,12 +118,45 @@ void ShiftRows(uint64_t W[16][2])
151118#undef SHIFT_ROW2
152119#undef SHIFT_ROW3
153120}
121+ } // anonymous namespace
122+
123+ void FullStateRound (sph_u64 W[16 ][2 ], sph_u32& K0, sph_u32& K1, sph_u32& K2, sph_u32& K3)
124+ {
125+ for (int n = 0 ; n < 16 ; n ++) {
126+ sph_u64 Wl = W[n][0 ];
127+ sph_u64 Wh = W[n][1 ];
128+ sph_u32 X0 = (sph_u32)Wl;
129+ sph_u32 X1 = (sph_u32)(Wl >> 32 );
130+ sph_u32 X2 = (sph_u32)Wh;
131+ sph_u32 X3 = (sph_u32)(Wh >> 32 );
132+ sph_u32 Y0, Y1, Y2, Y3;
133+ soft_aes::Round (X0, X1, X2, X3, K0, K1, K2, K3, Y0, Y1, Y2, Y3);
134+ soft_aes::RoundKeyless (Y0, Y1, Y2, Y3, X0, X1, X2, X3);
135+ W[n][0 ] = (sph_u64)X0 | ((sph_u64)X1 << 32 );
136+ W[n][1 ] = (sph_u64)X2 | ((sph_u64)X3 << 32 );
137+ if ((K0 = T32 (K0 + 1 )) == 0 ) {
138+ if ((K1 = T32 (K1 + 1 )) == 0 ) {
139+ if ((K2 = T32 (K2 + 1 )) == 0 ) {
140+ K3 = T32 (K3 + 1 );
141+ }
142+ }
143+ }
144+ }
145+ }
146+
147+ void ShiftAndMix (uint64_t W[16 ][2 ])
148+ {
149+ ShiftRows (W);
150+ MixColumn (W, 0 , 1 , 2 , 3 );
151+ MixColumn (W, 4 , 5 , 6 , 7 );
152+ MixColumn (W, 8 , 9 , 10 , 11 );
153+ MixColumn (W, 12 , 13 , 14 , 15 );
154+ }
154155} // namespace soft_echo
155156} // namespace sapphire
156157
157- sapphire::dispatch::EchoMixCols echo_mix_columns = sapphire::soft_echo::MixColumns;
158158sapphire::dispatch::EchoRoundFn echo_round = sapphire::soft_echo::FullStateRound;
159- sapphire::dispatch::EchoShiftRows echo_shift_rows = sapphire::soft_echo::ShiftRows ;
159+ sapphire::dispatch::EchoShiftMix echo_shift_mix = sapphire::soft_echo::ShiftAndMix ;
160160
161161#define DECL_STATE_BIG \
162162 alignas (16 ) sph_u64 W[16][2];
@@ -174,8 +174,7 @@ sapphire::dispatch::EchoShiftRows echo_shift_rows = sapphire::soft_echo::ShiftRo
174174
175175#define BIG_ROUND do { \
176176 echo_round (W, K0, K1, K2, K3); \
177- echo_shift_rows (W); \
178- echo_mix_columns (W); \
177+ echo_shift_mix (W); \
179178 } while (0 )
180179
181180#define FINAL_BIG do { \
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