CVC: debug command does not correctly process hierarchal power

[d-m-bailey]

If the original design contains hierarchal power settings
#instance *(cellname) power VDD
the power definitions from the file are copied verbatim into the debug power file. The power name will NOT be converted.

Power names should be converted to the inherited power name.
This may be accomplished by including the #instance definition in the debug power file instead of the expanded definitions.