Skip to content

Commit 781d772

Browse files
committed
[AArch64] Macros renamed to SysRegRead and SysRegWrite
1 parent ccc8927 commit 781d772

File tree

2 files changed

+21
-21
lines changed

2 files changed

+21
-21
lines changed

aarch64/corefreqk.c

+17-17
Original file line numberDiff line numberDiff line change
@@ -566,7 +566,7 @@ static void Query_Features(void *pArg)
566566
:
567567
: "memory"
568568
);
569-
mmfr2.value = MOV_SR_GPR(ID_AA64MMFR2_EL1);
569+
mmfr2.value = SysRegRead(ID_AA64MMFR2_EL1);
570570

571571
iArg->Features->Info.Signature.Stepping = midr.Revision
572572
| (midr.Variant << 4);
@@ -1032,7 +1032,7 @@ static void Query_Features(void *pArg)
10321032
break;
10331033
}
10341034
if (iArg->Features->AMU_vers > 0) {
1035-
AMCGCR amcgc = {.value = MOV_SR_GPR(AMCGCR_EL0)};
1035+
AMCGCR amcgc = {.value = SysRegRead(AMCGCR_EL0)};
10361036
iArg->Features->PerfMon.FixCtrs += amcgc.CG0NC + amcgc.CG1NC;
10371037
}
10381038
switch (pfr0.RME) {
@@ -1124,7 +1124,7 @@ static void Query_Features(void *pArg)
11241124
}
11251125
if (iArg->Features->SVE | iArg->Features->SME)
11261126
{
1127-
volatile AA64ZFR0 zfr0 = {.value = MOV_SR_GPR(ID_AA64ZFR0_EL1)};
1127+
volatile AA64ZFR0 zfr0 = {.value = SysRegRead(ID_AA64ZFR0_EL1)};
11281128

11291129
switch (zfr0.SVE_F64MM) {
11301130
case 0b0001:
@@ -1215,7 +1215,7 @@ static void Query_Features(void *pArg)
12151215
}
12161216
}
12171217
if (iArg->Features->SME) {
1218-
volatile AA64SMFR0 smfr0 = {.value = MOV_SR_GPR(ID_AA64SMFR0_EL1)};
1218+
volatile AA64SMFR0 smfr0 = {.value = SysRegRead(ID_AA64SMFR0_EL1)};
12191219

12201220
switch (smfr0.SMEver) {
12211221
case 0b0010:
@@ -1280,7 +1280,7 @@ static void Query_Features(void *pArg)
12801280
}
12811281
if (Experimental && (iArg->HypervisorID == HYPERV_NONE)) {
12821282
/* Query the Cluster Configuration */
1283-
volatile CLUSTERCFR clustercfg = {.value = MOV_SR_GPR(CLUSTERCFR_EL1)};
1283+
volatile CLUSTERCFR clustercfg = {.value = SysRegRead(CLUSTERCFR_EL1)};
12841284
if (clustercfg.NUMCORE) {
12851285
iArg->SMT_Count = iArg->SMT_Count + clustercfg.NUMCORE;
12861286
}
@@ -1997,7 +1997,7 @@ void SystemRegisters(CORE_RO *Core)
19971997
volatile AA64MMFR1 mmfr1;
19981998
volatile AA64PFR0 pfr0;
19991999

2000-
isar2.value = MOV_SR_GPR(ID_AA64ISAR2_EL1);
2000+
isar2.value = SysRegRead(ID_AA64ISAR2_EL1);
20012001

20022002
__asm__ __volatile__(
20032003
"mrs %[sctlr], sctlr_el1" "\n\t"
@@ -2029,14 +2029,14 @@ void SystemRegisters(CORE_RO *Core)
20292029
}
20302030
Core->Query.SCTLRX = 0;
20312031
if (Experimental) {
2032-
volatile AA64MMFR3 mmfr3 = {.value = MOV_SR_GPR(ID_AA64MMFR3_EL1)};
2032+
volatile AA64MMFR3 mmfr3 = {.value = SysRegRead(ID_AA64MMFR3_EL1)};
20332033
if ((Core->Query.SCTLRX = mmfr3.SCTLRX) == 0b0001) {
2034-
Core->SystemRegister.SCTLR2 = MOV_SR_GPR(SCTLR2_EL1);
2034+
Core->SystemRegister.SCTLR2 = SysRegRead(SCTLR2_EL1);
20352035
}
20362036
}
20372037
if (PUBLIC(RO(Proc))->Features.DIT) {
20382038
Core->SystemRegister.FLAGS |= (
2039-
MOV_SR_GPR(MRS_DIT) & (1LLU << FLAG_DIT)
2039+
SysRegRead(MRS_DIT) & (1LLU << FLAG_DIT)
20402040
);
20412041
}
20422042
if (isar2.CLRBHB == 0b0001) {
@@ -2109,7 +2109,7 @@ void SystemRegisters(CORE_RO *Core)
21092109
}
21102110
if (PUBLIC(RO(Proc))->Features.SSBS == 0b0010)
21112111
{
2112-
SSBS2 mrs_ssbs = {.value = MOV_SR_GPR(MRS_SSBS2)};
2112+
SSBS2 mrs_ssbs = {.value = SysRegRead(MRS_SSBS2)};
21132113

21142114
if (mrs_ssbs.SSBS) {
21152115
BITSET_CC(LOCKLESS, PUBLIC(RW(Proc))->SSBS, Core->Bind);
@@ -2120,31 +2120,31 @@ void SystemRegisters(CORE_RO *Core)
21202120
}
21212121
if (PUBLIC(RO(Proc))->Features.PAN) {
21222122
Core->SystemRegister.FLAGS |= (
2123-
MOV_SR_GPR(MRS_PAN) & (1LLU << FLAG_PAN)
2123+
SysRegRead(MRS_PAN) & (1LLU << FLAG_PAN)
21242124
);
21252125
}
21262126
if (PUBLIC(RO(Proc))->Features.UAO) {
21272127
Core->SystemRegister.FLAGS |= (
2128-
MOV_SR_GPR(MRS_UAO) & (1LLU << FLAG_UAO)
2128+
SysRegRead(MRS_UAO) & (1LLU << FLAG_UAO)
21292129
);
21302130
}
21312131
if (PUBLIC(RO(Proc))->Features.MTE) {
21322132
Core->SystemRegister.FLAGS |= (
2133-
MOV_SR_GPR(MRS_TCO) & (1LLU << FLAG_TCO)
2133+
SysRegRead(MRS_TCO) & (1LLU << FLAG_TCO)
21342134
);
21352135
}
21362136
if (PUBLIC(RO(Proc))->Features.NMI) {
21372137
Core->SystemRegister.FLAGS |= (
2138-
MOV_SR_GPR(MRS_ALLINT) & (1LLU << FLAG_NMI)
2138+
SysRegRead(MRS_ALLINT) & (1LLU << FLAG_NMI)
21392139
);
21402140
}
21412141
if (PUBLIC(RO(Proc))->Features.EBEP) {
21422142
Core->SystemRegister.FLAGS |= (
2143-
MOV_SR_GPR(MRS_PM) & (1LLU << FLAG_PM)
2143+
SysRegRead(MRS_PM) & (1LLU << FLAG_PM)
21442144
);
21452145
}
21462146
if (PUBLIC(RO(Proc))->Features.SME) {
2147-
Core->SystemRegister.SVCR = MOV_SR_GPR(MRS_SVCR);
2147+
Core->SystemRegister.SVCR = SysRegRead(MRS_SVCR);
21482148
}
21492149
BITSET_CC(LOCKLESS, PUBLIC(RO(Proc))->CR_Mask, Core->Bind);
21502150
}
@@ -2197,7 +2197,7 @@ static void PerCore_GenericMachine(void *arg)
21972197
Core->Boost[BOOST(MIN)] = 4;
21982198

21992199
if (Experimental && (PUBLIC(RO(Proc))->HypervisorID == HYPERV_NONE)) {
2200-
cpupwrctl.value = MOV_SR_GPR(CPUPWRCTLR_EL1);
2200+
cpupwrctl.value = SysRegRead(CPUPWRCTLR_EL1);
22012201
Core->Query.CStateBaseAddr = cpupwrctl.WFI_RET_CTRL;
22022202
}
22032203
Core->Query.Revision = revid.Revision;

aarch64/corefreqk.h

+4-4
Original file line numberDiff line numberDiff line change
@@ -15,14 +15,14 @@
1515
#endif
1616

1717
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 9, 0)
18-
#define MOV_SR_GPR(_reg) read_sysreg_s(_reg)
19-
#define MOV_GPR_SR(_val, _reg) write_sysreg_s(_val, _reg)
18+
#define SysRegRead(_reg) read_sysreg_s(_reg)
19+
#define SysRegWrite(_val, _reg) write_sysreg_s(_val, _reg)
2020
#else
21-
#define MOV_SR_GPR(_reg) ({ \
21+
#define SysRegRead(_reg) ({ \
2222
UNUSED(_reg); \
2323
0; \
2424
})
25-
#define MOV_GPR_SR(_val, _reg) ({ \
25+
#define SysRegWrite(_val, _reg) ({ \
2626
UNUSED(_val); \
2727
UNUSED(_reg); \
2828
})

0 commit comments

Comments
 (0)