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Commit 7d53428

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author
Figueroa
committed
work in progress, adds eeprom_direct lcov
1 parent 9e69631 commit 7d53428

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1 file changed

+69
-16
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1 file changed

+69
-16
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unit-test-coverage/modules/eeprom_direct/coveragetest-eeprom_direct.c

+69-16
Original file line numberDiff line numberDiff line change
@@ -43,33 +43,85 @@
4343
#include "cfe_psp_config.h"
4444
#include "cfe_psp_module.h"
4545

46+
#define UT_RAMBLOCK_SIZE 32
47+
48+
static union
49+
{
50+
uint8 u8[UT_RAMBLOCK_SIZE];
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uint16 u16[UT_RAMBLOCK_SIZE / sizeof(uint16)];
52+
uint32 u32[UT_RAMBLOCK_SIZE / sizeof(uint32)];
53+
} UT_RAM_BLOCK;
54+
4655
extern void eeprom_direct_Init(uint32 PspModuleId);
4756

57+
/*
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* --------------------------------------------
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* TEST FUNCTIONS
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* --------------------------------------------
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*/
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63+
/* ********************************
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* eeprom_direct_Init
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* ********************************/
4866
void Test_eeprom_direct_Init(void)
4967
{
50-
/*
51-
void eeprom_direct_Init(uint32 PspModuleId)
52-
*/
53-
68+
/* Test For:
69+
* void eeprom_direct_Init(uint32 PspModuleId)
70+
*/
5471
UtAssert_VOIDCALL(eeprom_direct_Init(1));
5572
}
5673

57-
void Test_CFE_PSP_EepromWrite32(void)
74+
/* ********************************
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* CFE_PSP_EepromWrite32
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* ********************************/
77+
void Test_CFE_PSP_EepromWrite32_Nominal(void)
5878
{
59-
/*
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int32 CFE_PSP_EepromWrite32(cpuaddr MemoryAddress, uint32 uint32Value)
61-
*/
62-
UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(0, 1), CFE_PSP_SUCCESS);
79+
/* Arrange */
80+
cpuaddr UtAddress = (cpuaddr)&UT_RAM_BLOCK.u32[0];
81+
uint32 writevalue = 0x12345678;
82+
83+
/* Act */
84+
UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(UtAddress, writevalue), CFE_PSP_SUCCESS);
85+
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/* Assert */
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UtAssert_INT32_EQ(*((uint32 *)UtAddress), writevalue);
6388
}
6489

65-
void Test_CFE_PSP_EepromWrite16(void)
90+
void Test_CFE_PSP_EepromWrite32_AddressMisaligned(void)
6691
{
67-
/*
68-
int32 CFE_PSP_EepromWrite16(cpuaddr MemoryAddress, uint16 uint16Value)
69-
*/
70-
UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(0, 1), CFE_PSP_SUCCESS);
92+
/* Arrange */
93+
cpuaddr UtAddress = (cpuaddr)&UT_RAM_BLOCK.u32[1];
94+
uint32 writevalue = 0x12345678;
95+
96+
/* Act */
97+
UtAssert_INT32_EQ(CFE_PSP_EepromWrite32(UtAddress, writevalue), CFE_PSP_ERROR_ADDRESS_MISALIGNED);
98+
}
99+
100+
/* ********************************
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* CFE_PSP_EepromWrite16
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* ********************************/
103+
void Test_CFE_PSP_EepromWrite16_Nominal(void)
104+
{
105+
/* Arrange */
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cpuaddr address = 0x1000; // Properly aligned address
107+
uint32 writevalue = 1;
108+
109+
/* Act */
110+
UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(address, writevalue), CFE_PSP_SUCCESS);
111+
112+
/* Assert */
113+
UtAssert_INT32_EQ(*((uint32 *)address), 1);
71114
}
72115

116+
void Test_CFE_PSP_EepromWrite16_AddressMisaligned(void)
117+
{
118+
/* Arrange */
119+
cpuaddr address = 0x1001; // Misaligned address
120+
uint32 writevalue = 1;
121+
122+
/* Act */
123+
UtAssert_INT32_EQ(CFE_PSP_EepromWrite16(address, writevalue), CFE_PSP_ERROR_ADDRESS_MISALIGNED);
124+
}
73125
void Test_CFE_PSP_EepromWrite8(void)
74126
{
75127
/*
@@ -121,8 +173,9 @@ void Test_CFE_PSP_EepromPowerDown(void)
121173
void UtTest_Setup(void)
122174
{
123175
ADD_TEST(Test_eeprom_direct_Init);
124-
ADD_TEST(Test_CFE_PSP_EepromWrite32);
125-
ADD_TEST(Test_CFE_PSP_EepromWrite16);
176+
ADD_TEST(Test_CFE_PSP_EepromWrite32_Nominal);
177+
ADD_TEST(Test_CFE_PSP_EepromWrite32_AddressMisaligned);
178+
ADD_TEST(Test_CFE_PSP_EepromWrite16_Nominal);
126179
ADD_TEST(Test_CFE_PSP_EepromWrite8);
127180
ADD_TEST(Test_CFE_PSP_EepromWriteEnable);
128181
ADD_TEST(Test_CFE_PSP_EepromWriteDisable);

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