diff --git a/.editorconfig b/.editorconfig index d18f64f246..e404989886 100644 --- a/.editorconfig +++ b/.editorconfig @@ -13,5 +13,10 @@ indent_size = 4 indent_style = tab indent_size = 8 +# OCaml bindings +[*.ml] +indent_style = tab +indent_size = 4 + [Makefile] indent_style = tab diff --git a/bindings/java/capstone/Capstone.java b/bindings/java/capstone/Capstone.java index 040c79e2b4..b1117d242d 100644 --- a/bindings/java/capstone/Capstone.java +++ b/bindings/java/capstone/Capstone.java @@ -354,6 +354,9 @@ public NativeLong cs_disasm(Pointer handle, byte[] code, NativeLong code_len, public static final int CS_MODE_MIPS32 = CS_MODE_32; // Mips32 ISA public static final int CS_MODE_MIPS64 = CS_MODE_64; // Mips64 ISA public static final int CS_MODE_QPX = 1 << 4; // Quad Processing eXtensions mode (PPC) + public static final int CS_MODE_SPE = 1 << 5; // Signal Processing Engine mode (PPC) + public static final int CS_MODE_BOOKE = 1 << 6; // Book-E mode (PPC) + public static final int CS_MODE_PS = 1 << 7; // Paired-singles mode (PPC) public static final int CS_MODE_M680X_6301 = 1 << 1; // M680X Hitachi 6301,6303 mode public static final int CS_MODE_M680X_6309 = 1 << 2; // M680X Hitachi 6309 mode public static final int CS_MODE_M680X_6800 = 1 << 3; // M680X Motorola 6800,6802 mode diff --git a/bindings/ocaml/capstone.ml b/bindings/ocaml/capstone.ml index 9d7a8dbc30..9019cde996 100644 --- a/bindings/ocaml/capstone.ml +++ b/bindings/ocaml/capstone.ml @@ -39,12 +39,15 @@ type mode = | CS_MODE_MICRO (* MicroMips mode (MIPS architecture) *) | CS_MODE_MIPS3 (* Mips3 mode (MIPS architecture) *) | CS_MODE_MIPS32R6 (* Mips32-R6 mode (MIPS architecture) *) - | CS_MODE_MIPS2 (* Mips2 mode (MIPS architecture) *) + | CS_MODE_MIPS2 (* Mips2 mode (MIPS architecture) *) | CS_MODE_V9 (* SparcV9 mode (Sparc architecture) *) | CS_MODE_BIG_ENDIAN (* big-endian mode *) | CS_MODE_MIPS32 (* Mips32 mode (for Mips) *) | CS_MODE_MIPS64 (* Mips64 mode (for Mips) *) - | CS_MODE_QPX (* Quad Processing eXtensions mode (PowerPC) *) + | CS_MODE_QPX (* Quad Processing eXtensions mode (PowerPC) *) + | CS_MODE_SPE (* Signal Processing Engine mode (PowerPC) *) + | CS_MODE_BOOKE (* Book-E mode (PowerPC) *) + | CS_MODE_PS (* Paired-singles mode (PowerPC) *) | CS_MODE_M680X_6301 (* M680X Hitachi 6301,6303 mode *) | CS_MODE_M680X_6309 (* M680X Hitachi 6309 mode *) | CS_MODE_M680X_6800 (* M680X Motorola 6800,6802 mode *) diff --git a/bindings/python/capstone/__init__.py b/bindings/python/capstone/__init__.py index 4f913ce579..5156b431e9 100755 --- a/bindings/python/capstone/__init__.py +++ b/bindings/python/capstone/__init__.py @@ -57,6 +57,7 @@ 'CS_MODE_QPX', 'CS_MODE_SPE', 'CS_MODE_BOOKE', + 'CS_MODE_PS', 'CS_MODE_M68K_000', 'CS_MODE_M68K_010', 'CS_MODE_M68K_020', @@ -193,6 +194,7 @@ CS_MODE_QPX = (1 << 4) # Quad Processing eXtensions mode (PPC) CS_MODE_SPE = (1 << 5) # Signal Processing Engine mode (PPC) CS_MODE_BOOKE = (1 << 6) # Book-E mode (PPC) +CS_MODE_PS = (1 << 7) # Paired-singles mode (PPC) CS_MODE_M68K_000 = (1 << 1) # M68K 68000 mode CS_MODE_M68K_010 = (1 << 2) # M68K 68010 mode CS_MODE_M68K_020 = (1 << 3) # M68K 68020 mode diff --git a/bindings/python/capstone/bpf_const.py b/bindings/python/capstone/bpf_const.py index 51dadb42ce..2dfe9ba288 100644 --- a/bindings/python/capstone/bpf_const.py +++ b/bindings/python/capstone/bpf_const.py @@ -88,15 +88,16 @@ BPF_INS_JSGT = 57 BPF_INS_JSGE = 58 BPF_INS_CALL = 59 -BPF_INS_EXIT = 60 -BPF_INS_JLT = 61 -BPF_INS_JLE = 62 -BPF_INS_JSLT = 63 -BPF_INS_JSLE = 64 -BPF_INS_RET = 65 -BPF_INS_TAX = 66 -BPF_INS_TXA = 67 -BPF_INS_ENDING = 68 +BPF_INS_CALLX = 60 +BPF_INS_EXIT = 61 +BPF_INS_JLT = 62 +BPF_INS_JLE = 63 +BPF_INS_JSLT = 64 +BPF_INS_JSLE = 65 +BPF_INS_RET = 66 +BPF_INS_TAX = 67 +BPF_INS_TXA = 68 +BPF_INS_ENDING = 69 BPF_INS_LD = BPF_INS_LDW BPF_INS_LDX = BPF_INS_LDXW BPF_INS_ST = BPF_INS_STW diff --git a/bindings/python/test_ppc.py b/bindings/python/test_ppc.py index 1a069bac2e..acb4b26ae4 100755 --- a/bindings/python/test_ppc.py +++ b/bindings/python/test_ppc.py @@ -8,10 +8,12 @@ PPC_CODE = b"\x43\x20\x0c\x07\x41\x56\xff\x17\x80\x20\x00\x00\x80\x3f\x00\x00\x10\x43\x23\x0e\xd0\x44\x00\x80\x4c\x43\x22\x02\x2d\x03\x00\x80\x7c\x43\x20\x14\x7c\x43\x20\x93\x4f\x20\x00\x21\x4c\xc8\x00\x21\x40\x82\x00\x14" PPC_CODE2 = b"\x10\x60\x2a\x10\x10\x64\x28\x88\x7c\x4a\x5d\x0f" +PPC_CODE3 = b"\x10\x00\x1f\xec\xe0\x6d\x80\x04\xe4\x6d\x80\x04\x10\x60\x1c\x4c\x10\x60\x1c\x0c\xf0\x6d\x80\x04\xf4\x6d\x80\x04\x10\x60\x1c\x4e\x10\x60\x1c\x0e\x10\x60\x1a\x10\x10\x60\x1a\x11\x10\x63\x20\x2a\x10\x63\x20\x2b\x10\x83\x20\x40\x10\x83\x20\xC0\x10\x83\x20\x00\x10\x83\x20\x80\x10\x63\x20\x24\x10\x63\x20\x25\x10\x63\x29\x3a\x10\x63\x29\x3b\x10\x63\x29\x1c\x10\x63\x29\x1d\x10\x63\x29\x1e\x10\x63\x29\x1f\x10\x63\x24\x20\x10\x63\x24\x21\x10\x63\x24\x60\x10\x63\x24\x61\x10\x63\x24\xA0\x10\x63\x24\xA1\x10\x63\x24\xE0\x10\x63\x24\xE1\x10\x60\x20\x90\x10\x60\x20\x91\x10\x63\x29\x38\x10\x63\x29\x39\x10\x63\x01\x32\x10\x63\x01\x33\x10\x63\x01\x18\x10\x63\x01\x19\x10\x63\x01\x1A\x10\x63\x01\x1B\x10\x60\x19\x10\x10\x60\x19\x11\x10\x60\x18\x50\x10\x60\x18\x51\x10\x63\x29\x3e\x10\x63\x29\x3f\x10\x63\x29\x3c\x10\x63\x29\x3d\x10\x60\x18\x30\x10\x60\x18\x31\x10\x60\x18\x34\x10\x60\x18\x35\x10\x63\x29\x2e\x10\x63\x29\x2f\x10\x63\x20\x28\x10\x63\x20\x29\x10\x63\x29\x14\x10\x63\x29\x15\x10\x63\x29\x16\x10\x63\x29\x17" all_tests = ( (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN, PPC_CODE, "PPC-64"), (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_QPX, PPC_CODE2, "PPC-64 + QPX"), + (CS_ARCH_PPC, CS_MODE_BIG_ENDIAN + CS_MODE_32 + CS_MODE_PS, PPC_CODE3, "PPC + PS"), )