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ppc: fix registers overflow #1687

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Merged
aquynh merged 1 commit into from
Mar 19, 2021
Merged

ppc: fix registers overflow #1687

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28 changes: 15 additions & 13 deletions arch/PowerPC/PPCDisassembler.c
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Original file line number Diff line number Diff line change
Expand Up @@ -164,9 +164,11 @@ static uint64_t getFeatureBits(int feature)
}

static DecodeStatus decodeRegisterClass(MCInst *Inst, uint64_t RegNo,
const unsigned *Regs)
const unsigned *Regs, size_t RegsLen)
{
// assert(RegNo < N && "Invalid register number");
if (RegNo >= RegsLen / sizeof(unsigned)) {
return MCDisassembler_Fail;
}
MCOperand_CreateReg0(Inst, Regs[RegNo]);
return MCDisassembler_Success;
}
Expand All @@ -175,70 +177,70 @@ static DecodeStatus DecodeCRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, CRRegs);
return decodeRegisterClass(Inst, RegNo, CRRegs, sizeof(CRRegs));
}

static DecodeStatus DecodeCRBITRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, CRBITRegs);
return decodeRegisterClass(Inst, RegNo, CRBITRegs, sizeof(CRBITRegs));
}

static DecodeStatus DecodeF4RCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, FRegs);
return decodeRegisterClass(Inst, RegNo, FRegs, sizeof(FRegs));
}

static DecodeStatus DecodeF8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, FRegs);
return decodeRegisterClass(Inst, RegNo, FRegs, sizeof(FRegs));
}

static DecodeStatus DecodeVRRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, VRegs);
return decodeRegisterClass(Inst, RegNo, VRegs, sizeof(VRegs));
}

static DecodeStatus DecodeVSRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, VSRegs);
return decodeRegisterClass(Inst, RegNo, VSRegs, sizeof(VSRegs));
}

static DecodeStatus DecodeVSFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, VSFRegs);
return decodeRegisterClass(Inst, RegNo, VSFRegs, sizeof(VSFRegs));
}

static DecodeStatus DecodeGPRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, GPRegs);
return decodeRegisterClass(Inst, RegNo, GPRegs, sizeof(GPRegs));
}

static DecodeStatus DecodeGPRC_NOR0RegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, GP0Regs);
return decodeRegisterClass(Inst, RegNo, GP0Regs, sizeof(GP0Regs));
}

static DecodeStatus DecodeG8RCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, G8Regs);
return decodeRegisterClass(Inst, RegNo, G8Regs, sizeof(G8Regs));
}

#define DecodePointerLikeRegClass0 DecodeGPRCRegisterClass
Expand All @@ -248,7 +250,7 @@ static DecodeStatus DecodeQFRCRegisterClass(MCInst *Inst, uint64_t RegNo,
uint64_t Address,
const void *Decoder)
{
return decodeRegisterClass(Inst, RegNo, QFRegs);
return decodeRegisterClass(Inst, RegNo, QFRegs, sizeof(QFRegs));
}

#define DecodeQSRCRegisterClass DecodeQFRCRegisterClass
Expand Down