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Correct DPFPU and FPU handling for NuttX
Signed-off-by: Huang Qi <[email protected]>
1 parent 60595d7 commit b5fadf8

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  • product-mini/platforms/nuttx

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product-mini/platforms/nuttx/wamr.mk

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -74,25 +74,25 @@ else ifeq (${WAMR_BUILD_TARGET}, XTENSA)
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AOT_RELOC := aot_reloc_xtensa.c
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else ifeq (${WAMR_BUILD_TARGET}, RISCV64)
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77-
ifeq (${CONFIG_ARCH_FPU},y)
78-
$(error riscv64 lp64f is unsupported)
79-
else ifeq (${CONFIG_ARCH_DPFPU}, y)
77+
ifeq (${CONFIG_ARCH_DPFPU},y)
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CFLAGS += -DBUILD_TARGET_RISCV64_LP64D
81-
else
79+
else ifneq (${CONFIG_ARCH_FPU},y)
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CFLAGS += -DBUILD_TARGET_RISCV64_LP64
81+
else
82+
$(error riscv64 lp64f is unsupported)
8383
endif
8484
INVOKE_NATIVE += invokeNative_riscv.S
8585

8686
AOT_RELOC := aot_reloc_riscv.c
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else ifeq (${WAMR_BUILD_TARGET}, RISCV32)
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90-
ifeq (${CONFIG_ARCH_FPU}, y)
91-
$(error riscv32 ilp32f is unsupported)
92-
else ifeq (${CONFIG_ARCH_DPFPU}, y)
90+
ifeq (${CONFIG_ARCH_DPFPU},y)
9391
CFLAGS += -DBUILD_TARGET_RISCV32_ILP32D
94-
else
92+
else ifneq (${CONFIG_ARCH_FPU},y)
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CFLAGS += -DBUILD_TARGET_RISCV32_ILP32
94+
else
95+
$(error riscv32 ilp32f is unsupported)
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endif
9797

9898
INVOKE_NATIVE += invokeNative_riscv.S

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