Enable RISCV support in LLVM

Signed-off-by: Huang Qi <[email protected]>

Author: no1wudi

wamr-compiler/build_llvm.py

@@ -66,7 +66,7 @@ def main():
         cmd = 'cmake ../llvm \
                 -DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
                 -DCMAKE_BUILD_TYPE:STRING="Release" \
-                -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips" \
+                -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips;RISCV" \
                 -DLLVM_INCLUDE_GO_TESTS=OFF \
                 -DLLVM_INCLUDE_TOOLS=OFF \
                 -DLLVM_INCLUDE_UTILS=OFF \

wamr-compiler/build_llvm.sh

@@ -27,7 +27,7 @@ if [ ! -f bin/llvm-lto ]; then
   cmake ../llvm \
           -DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
           -DCMAKE_BUILD_TYPE:STRING="Release" \
-          -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips" \
+          -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips;RISCV" \
           -DLLVM_BUILD_LLVM_DYLIB:BOOL=OFF \
           -DLLVM_OPTIMIZED_TABLEGEN:BOOL=ON \
           -DLLVM_ENABLE_ZLIB:BOOL=OFF \

wamr-compiler/build_llvm_xtensa.sh

@@ -27,7 +27,7 @@ if [ ! -f bin/llvm-lto ]; then
   cmake ../llvm \
           -DCMAKE_EXPORT_COMPILE_COMMANDS=ON \
           -DCMAKE_BUILD_TYPE:STRING="Release" \
-          -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips" \
+          -DLLVM_TARGETS_TO_BUILD:STRING="X86;ARM;AArch64;Mips;RISCV" \
           -DLLVM_EXPERIMENTAL_TARGETS_TO_BUILD:STRING="Xtensa" \
           -DLLVM_BUILD_LLVM_DYLIB:BOOL=OFF \
           -DLLVM_OPTIMIZED_TABLEGEN:BOOL=ON \