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EmitMUL.cpp
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EmitMUL.cpp
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#include "basetypes.h"
#include "InstructionCache.h"
#include "InstructionDependencies.h"
#include "EmitMisc.h"
#include "NativeCodeCache.h"
#include "PatchManager.h"
#include "mpe.h"
extern bool SSE41_supported;
static constexpr uint32 shiftTable[4] = {16, 8, 0, 2};
void Emit_ADDM(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ADDMR(x86Reg::x86Reg_eax, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_ADDMImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ADDIR(nuance.fields[FIELD_MUL_SRC1],x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_SUBM(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(vars->scalarRegOutDep)
{
if(src1RegIndex == src2RegIndex)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIM(0, x86MemPtr::x86MemPtr_dword, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_SUBMR(x86Reg::x86Reg_eax, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
}
void Emit_SUBMImmediateReverse(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
if(vars->scalarRegOutDep)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIR(nuance.fields[FIELD_MUL_SRC1], x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SUBMR(x86Reg::x86Reg_eax, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_MULScalarShiftAcshift(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_pos = 0;
constexpr uint32 l_neg = 1;
constexpr uint32 l_poslt32 = 2;
constexpr uint32 l_posge32 = 3;
constexpr uint32 l_exit = 4;
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg acshiftReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_ACSHIFT);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
const int32 acshiftDisp = GetMiscRegEmitDisp(vars,REGINDEX_ACSHIFT);
/*
mov eax, [src1]
and [cc], ~CC_MV
imul [src2]
mov ecx, [acshift]
cmp ecx, 0
jnl mulscalarshiftacshift_pos
neg ecx
jmp mulscalarshiftacshift_neg
mulscalarshiftacshift_pos:
cmp ecx, 32
jnl mulscalarshiftacshift_posge32
mulscalarshiftacshift_poslt32:
shrd eax, edx, cl
if(mv flag required)
{
sar edx, cl
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_posge32:
mov eax, edx
sub ecx, 32
sar eax, ecx
if(mv flag required)
{
mov ebp, CC_MV
cmp eax, 0
cmovz ebp, eax
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_neg:
xor ebp, ebp
cmp ecx, 32
cmovz eax, ebp
cmovz ecx, ebp
shld edx, eax, cl
shl eax, cl
if(mv flag required)
{
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mulscalarshiftacshift_exit:
mov [dest], eax
*/
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ebx, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, acshiftReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, acshiftDisp);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x7F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_IMULRR(x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x40,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_Z,l_pos);
vars->mpe->nativeCodeCache.X86Emit_NEGR(x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDIR(128,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_neg);
//l_pos:
vars->mpe->nativeCodeCache.SetLabelPointer(l_pos);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NL,l_posge32);
//l_poslt32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_poslt32);
vars->mpe->nativeCodeCache.X86Emit_SHRDRRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_posge32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_posge32);
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SUBIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_neg:
vars->mpe->nativeCodeCache.SetLabelPointer(l_neg);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SHLDRRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
//l_exit:
vars->mpe->nativeCodeCache.SetLabelPointer(l_exit);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
//Patch forward branch offsets
vars->mpe->nativeCodeCache.patchMgr.ApplyPatches();
}
void Emit_MULScalarShiftRightImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
eax = src1
and [cc], ~CC_MV
imul [src2]
if(shiftCount == 32)
{
mov [dest], edx
//overflow cant occur
}
else
{
shrd eax, edx, shiftCount
if(mv flag required)
{
sar edx, shiftCount
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mov [dest], eax
}
*/
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
if(nuance.fields[FIELD_MUL_INFO] < 32)
{
vars->mpe->nativeCodeCache.X86Emit_SHRDIRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx, (uint8)nuance.fields[FIELD_MUL_INFO]);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_edx, (uint8)nuance.fields[FIELD_MUL_INFO]);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else if(nuance.fields[FIELD_MUL_INFO] == 32)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_edx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_eax, (uint8)(nuance.fields[FIELD_MUL_INFO] - 32));
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_MULScalarShiftLeftImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
mov eax, [src1]
and [cc], ~CC_MV
imul [src2]
if(shiftCount > 31)
{
mov [dest], 0
if(mv flag required)
{
shl eax, shiftCount - 32
mov ebp, CC_MV
cmovz ebp, eax
or [cc], ebp
}
}
else
{
if(shiftCount != 0)
{
shld edx, eax, shiftCount
shl eax, shiftCount
}
if(mv flag required)
{
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mov [dest], eax
}
*/
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->pInstructionEntry->miscOutputDependencies)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
if(nuance.fields[FIELD_MUL_INFO] > 31)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIM(0, x86MemPtr::x86MemPtr_dword, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_TESTRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
}
else
{
if(nuance.fields[FIELD_MUL_INFO] != 0)
{
vars->mpe->nativeCodeCache.X86Emit_SHLDIRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax, (uint8)nuance.fields[FIELD_MUL_INFO]);
vars->mpe->nativeCodeCache.X86Emit_SHLIR(x86Reg::x86Reg_eax, (uint8)nuance.fields[FIELD_MUL_INFO]);
}
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_MULImmediateShiftAcshift(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_pos = 0;
constexpr uint32 l_neg = 1;
constexpr uint32 l_poslt32 = 2;
constexpr uint32 l_posge32 = 3;
constexpr uint32 l_exit = 4;
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg acshiftReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_ACSHIFT);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
const int32 acshiftDisp = GetMiscRegEmitDisp(vars,REGINDEX_ACSHIFT);
/*
mov eax, src1
and [cc], ~CC_MV
imul [src2]
mov ecx, [acshift]
cmp ecx, 0
jnl mulscalarshiftacshift_pos
neg ecx
jmp mulscalarshiftacshift_neg
mulscalarshiftacshift_pos:
cmp ecx, 32
jnl mulscalarshiftacshift_posge32
mulscalarshiftacshift_poslt32:
shrd eax, edx, cl
if(mv flag required)
{
sar edx, cl
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_posge32:
mov eax, edx
sub ecx, 32
sar eax, ecx
if(mv flag required)
{
mov ebp, CC_MV
cmp eax, 0
cmovz ebp, eax
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_neg:
xor ebp, ebp
cmp ecx, 32
cmovz eax, edx
cmovz ecx, ebp
shld edx, eax, cl
shl eax, cl
if(mv flag required)
{
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mulscalarshiftacshift_exit:
mov [dest], eax
*/
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVIR(nuance.fields[FIELD_MUL_SRC1], x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->pInstructionEntry->miscOutputDependencies)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, acshiftReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, acshiftDisp);
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x7F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x40,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_Z,l_pos);
vars->mpe->nativeCodeCache.X86Emit_NEGR(x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDIR(128,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_neg);
//l_pos:
vars->mpe->nativeCodeCache.SetLabelPointer(l_pos);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NL,l_posge32);
//l_poslt32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_poslt32);
vars->mpe->nativeCodeCache.X86Emit_SHRDRRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_posge32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_posge32);
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SUBIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_neg:
vars->mpe->nativeCodeCache.SetLabelPointer(l_neg);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SHLDRRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
//l_exit:
vars->mpe->nativeCodeCache.SetLabelPointer(l_exit);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
//Patch forward branch offsets
vars->mpe->nativeCodeCache.patchMgr.ApplyPatches();
}
void Emit_MULScalarShiftScalar(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_pos = 0;
constexpr uint32 l_neg = 1;
constexpr uint32 l_poslt32 = 2;
constexpr uint32 l_posge32 = 3;
constexpr uint32 l_exit = 4;
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const uint32 shiftRegIndex = nuance.fields[FIELD_MUL_INFO];
const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg shiftRegReadBaseReg = GetScalarRegReadBaseReg(vars,shiftRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 shiftRegDisp = GetScalarRegEmitDisp(vars,shiftRegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
mov eax, [src1]
and [cc], ~CC_MV
imul [src2]
mov ecx, [shiftReg]
test ecx, 0x40
jz mulscalarshiftacshift_pos
neg ecx
add ecx, 128
jmp mulscalarshiftacshift_neg
mulscalarshiftacshift_pos:
cmp ecx, 32
jnl mulscalarshiftacshift_posge32
mulscalarshiftacshift_poslt32:
shrd eax, edx, cl
if(mv flag required)
{
sar edx, cl
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_posge32:
mov eax, edx
sub ecx, 32
sar eax, ecx
if(mv flag required)
{
mov ebp, CC_MV
cmp eax, 0
cmovz ebp, eax
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_neg:
xor ebp, ebp
cmp ecx, 32
cmovz eax, edx
cmovz ecx, ebp
shld edx, eax, cl
shl eax, cl
if(mv flag required)
{
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mulscalarshiftacshift_exit:
mov [dest], eax
*/
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_eax, src1RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src1RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->pInstructionEntry->miscOutputDependencies)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, shiftRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, shiftRegDisp);
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x7F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x40,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_Z,l_pos);
vars->mpe->nativeCodeCache.X86Emit_NEGR(x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDIR(128,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_neg);
//l_pos:
vars->mpe->nativeCodeCache.SetLabelPointer(l_pos);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NL,l_posge32);
//l_poslt32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_poslt32);
vars->mpe->nativeCodeCache.X86Emit_SHRDRRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_posge32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_posge32);
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SUBIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_neg:
vars->mpe->nativeCodeCache.SetLabelPointer(l_neg);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SHLDRRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
//l_exit:
vars->mpe->nativeCodeCache.SetLabelPointer(l_exit);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
//Patch forward branch offsets
vars->mpe->nativeCodeCache.patchMgr.ApplyPatches();
}
void Emit_MULImmediateShiftScalar(EmitterVariables * const vars, const Nuance &nuance)
{
constexpr uint32 l_pos = 0;
constexpr uint32 l_neg = 1;
constexpr uint32 l_poslt32 = 2;
constexpr uint32 l_posge32 = 3;
constexpr uint32 l_exit = 4;
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
//const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const uint32 shiftRegIndex = nuance.fields[FIELD_MUL_INFO];
//const x86BaseReg src1RegReadBaseReg = GetScalarRegReadBaseReg(vars,src1RegIndex);
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg shiftRegReadBaseReg = GetScalarRegReadBaseReg(vars,shiftRegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
//const int32 src1RegDisp = GetScalarRegEmitDisp(vars,src1RegIndex);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 shiftRegDisp = GetScalarRegEmitDisp(vars,shiftRegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
mov eax, src1
and [cc], ~CC_MV
imul [src2]
mov ecx, [shiftReg]
test ecx, 0x40
jz mulscalarshiftacshift_pos
neg ecx
add ecx, 128
jmp mulscalarshiftacshift_neg
mulscalarshiftacshift_pos:
cmp ecx, 32
jnl mulscalarshiftacshift_posge32
mulscalarshiftacshift_poslt32:
shrd eax, edx, cl
if(mv flag required)
{
sar edx, cl
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_posge32:
mov eax, edx
sub ecx, 32
sar eax, ecx
if(mv flag required)
{
mov ebp, CC_MV
cmp eax, 0
cmovz ebp, eax
or [cc], ebp
}
jmp mulscalarshiftacshift_exit
mulscalarshiftacshift_neg:
xor ebp, ebp
cmp ecx, 32
cmovz eax, edx
cmovz ecx, ebp
shld edx, eax, cl
shl eax, cl
if(mv flag required)
{
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mulscalarshiftacshift_exit:
mov [dest], eax
*/
vars->mpe->nativeCodeCache.patchMgr.Reset();
vars->mpe->nativeCodeCache.X86Emit_MOVIR(nuance.fields[FIELD_MUL_SRC1], x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->pInstructionEntry->miscOutputDependencies)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
vars->mpe->nativeCodeCache.X86Emit_MOVMR(x86Reg::x86Reg_ecx, shiftRegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, shiftRegDisp);
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
vars->mpe->nativeCodeCache.X86Emit_ANDIR(0x7F, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x40,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_Z,l_pos);
vars->mpe->nativeCodeCache.X86Emit_NEGR(x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDIR(128,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_neg);
//l_pos:
vars->mpe->nativeCodeCache.SetLabelPointer(l_pos);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32,x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_JCC_Label(X86_CC_NL,l_posge32);
//l_poslt32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_poslt32);
vars->mpe->nativeCodeCache.X86Emit_SHRDRRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_posge32:
vars->mpe->nativeCodeCache.SetLabelPointer(l_posge32);
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SUBIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_SARRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(0, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_JMPI_Label(l_exit);
//l_neg:
vars->mpe->nativeCodeCache.SetLabelPointer(l_neg);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMPIR(32, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_SHLDRRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_SHLRR(x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
//l_exit:
vars->mpe->nativeCodeCache.SetLabelPointer(l_exit);
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
//Patch forward branch offsets
vars->mpe->nativeCodeCache.patchMgr.ApplyPatches();
}
void Emit_MULImmediateShiftRightImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
//const uint32 src1RegIndex = nuance.fields[FIELD_MUL_SRC1];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
eax = src1
and [cc], ~CC_MV
imul [src2]
if(shiftCount == 32)
{
mov [dest], edx
//overflow cant occur
}
else
{
shrd eax, edx, shiftCount
if(mv flag required)
{
sar edx, shiftCount
xor ecx, ecx
test eax, 0x80000000
mov ebx, 1
mov ebp, CC_MV
cmovz ebx, ecx
add edx, ebx
cmovz ebp, edx
or [cc], ebp
}
mov [dest], eax
}
*/
vars->mpe->nativeCodeCache.X86Emit_MOVIR(nuance.fields[FIELD_MUL_SRC1], x86Reg::x86Reg_eax);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_ANDIM(~(FLAG_DEPENDENCIES(vars->miscRegOutDep)), x86MemPtr::x86MemPtr_dword, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_IMULMR(x86MemPtr::x86MemPtr_dword, src2RegReadBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, src2RegDisp);
if(nuance.fields[FIELD_MUL_INFO] < 32)
{
vars->mpe->nativeCodeCache.X86Emit_SHRDIRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx, (uint8)nuance.fields[FIELD_MUL_INFO]);
if(vars->miscRegOutDep & DEPENDENCY_FLAG_MV)
{
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_edx, (uint8)nuance.fields[FIELD_MUL_INFO]);
vars->mpe->nativeCodeCache.X86Emit_XORRR(x86Reg::x86Reg_ecx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_TESTIR(0x80000000, x86Reg::x86Reg_eax);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(1, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_MOVIR(CC_MUL_OVERFLOW, x86Reg::x86Reg_ebp);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebx, x86Reg::x86Reg_ecx);
vars->mpe->nativeCodeCache.X86Emit_ADDRR(x86Reg::x86Reg_edx, x86Reg::x86Reg_ebx);
vars->mpe->nativeCodeCache.X86Emit_CMOVZRR(x86Reg::x86Reg_ebp, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_ORRM(x86Reg::x86Reg_ebp, ccWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, ccDisp);
}
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else if(nuance.fields[FIELD_MUL_INFO] == 32)
{
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_edx, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
else
{
vars->mpe->nativeCodeCache.X86Emit_MOVRR(x86Reg::x86Reg_eax, x86Reg::x86Reg_edx);
vars->mpe->nativeCodeCache.X86Emit_SARIR(x86Reg::x86Reg_eax, (uint8)(nuance.fields[FIELD_MUL_INFO] - 32));
vars->mpe->nativeCodeCache.X86Emit_MOVRM(x86Reg::x86Reg_eax, destRegWriteBaseReg, x86IndexReg::x86IndexReg_none, x86ScaleVal::x86Scale_1, destRegDisp);
}
}
void Emit_MULImmediateShiftLeftImmediate(EmitterVariables * const vars, const Nuance &nuance)
{
const uint32 destRegIndex = nuance.fields[FIELD_MUL_DEST];
const uint32 src2RegIndex = nuance.fields[FIELD_MUL_SRC2];
const x86BaseReg src2RegReadBaseReg = GetScalarRegReadBaseReg(vars,src2RegIndex);
const x86BaseReg destRegWriteBaseReg = GetScalarRegWriteBaseReg(vars,destRegIndex);
//const x86BaseReg ccReadBaseReg = GetMiscRegReadBaseReg(vars,REGINDEX_CC);
const x86BaseReg ccWriteBaseReg = GetMiscRegWriteBaseReg(vars,REGINDEX_CC);
const int32 src2RegDisp = GetScalarRegEmitDisp(vars,src2RegIndex);
const int32 destRegDisp = GetScalarRegEmitDisp(vars,destRegIndex);
const int32 ccDisp = GetMiscRegEmitDisp(vars,REGINDEX_CC);
/*
mov eax, src1
and [cc], ~CC_MV
imul [src2]
if(shiftCount > 31)
{
mov [dest], 0
if(mv flag required)
{
shl eax, shiftCount - 32
mov ebp, CC_MV
cmovz ebp, eax
or [cc], ebp
}
}
else
{
if(shiftCount != 0)