Is there any possibility that the reception module (uart_rx) is not working?

[AlexPop09]

Hello! Please excuse me for disturbing you. Is there any possibility that the receive module (uart_rx) is not working? I use fpga Nexys 4 DDR Artix 7 and when I want to do a testbench for the uart module at the reception it displays 0 even though the data has been transmitted.Do you have a Verilog only testbench to see the functionality of the module uart?

[alexforencich]

I do not; everything I have is in the repo.