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agagetagaget
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feat: add sofware and hardware mask/enable for sequencer
1 parent 3b1cbe8 commit 346613c

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11 files changed

+581
-4
lines changed

11 files changed

+581
-4
lines changed

‎evgMrmApp/Db/evgInput.db

+13
Original file line numberDiff line numberDiff line change
@@ -18,3 +18,16 @@ record(bi, "$(P)EnaIrq-RB") {
1818
field( ZNAM, "Disabled")
1919
field( ONAM, "Enabled")
2020
}
21+
22+
record(ao, "$(P)FPMask-Sel") {
23+
field( DESC, "FPxMask")
24+
field( DTYP, "Obj Prop uint32")
25+
field( OUT , "@OBJ=$(OBJ), PROP=FPMASK")
26+
field( FLNK, "$(P)FPMask-RB")
27+
}
28+
record(ai, "$(P)FPMask-RB") {
29+
field( DESC, "FPxMask")
30+
field( DTYP, "Obj Prop uint32")
31+
field( INP , "@OBJ=$(OBJ), PROP=FPMASK")
32+
}
33+

‎evgMrmApp/Db/evm-mtca-300-evr.uv.substitutions

+124
Original file line numberDiff line numberDiff line change
@@ -138,6 +138,130 @@ file "evrpulsermap.db"
138138
{31,"\$(P)DlyGen$(PID)EvtTrig0-SP", "$(EVG):EVR$(T):Pul$(PID)", Trig, 0}
139139
{31,"\$(P)DlyGen$(PID)EvtTrig1-SP", "$(EVG):EVR$(T):Pul$(PID)", Trig, 0}
140140
{31,"\$(P)DlyGen$(PID)EvtTrig2-SP", "$(EVG):EVR$(T):Pul$(PID)", Trig, 0}
141+
142+
{0, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
143+
{0, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
144+
{0, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
145+
{1, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
146+
{1, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
147+
{1, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
148+
{2, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
149+
{2, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
150+
{2, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
151+
{3, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
152+
{3, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
153+
{3, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
154+
{4, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
155+
{4, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
156+
{4, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
157+
{5, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
158+
{5, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
159+
{5, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
160+
{6, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
161+
{6, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
162+
{6, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
163+
{7, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
164+
{7, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
165+
{7, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
166+
{8, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
167+
{8, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
168+
{8, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
169+
{9, "\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
170+
{9, "\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
171+
{9, "\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
172+
{10,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
173+
{10,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
174+
{10,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
175+
{11,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
176+
{11,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
177+
{11,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
178+
{12,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
179+
{12,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
180+
{12,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
181+
{13,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
182+
{13,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
183+
{13,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
184+
{14,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
185+
{14,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
186+
{14,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
187+
{15,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
188+
{15,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
189+
{15,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
190+
# gate generators mappings
191+
{28,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
192+
{28,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
193+
{28,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
194+
{29,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
195+
{29,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
196+
{29,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
197+
{30,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
198+
{30,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
199+
{30,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
200+
{31,"\$(P)DlyGen$(PID)EvtSet0-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
201+
{31,"\$(P)DlyGen$(PID)EvtSet1-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
202+
{31,"\$(P)DlyGen$(PID)EvtSet2-SP", "$(EVG):EVR$(T):Pul$(PID)", Set, 0}
203+
204+
{0, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
205+
{0, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
206+
{0, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
207+
{1, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
208+
{1, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
209+
{1, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
210+
{2, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
211+
{2, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
212+
{2, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
213+
{3, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
214+
{3, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
215+
{3, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
216+
{4, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
217+
{4, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
218+
{4, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
219+
{5, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
220+
{5, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
221+
{5, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
222+
{6, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
223+
{6, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
224+
{6, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
225+
{7, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
226+
{7, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
227+
{7, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
228+
{8, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
229+
{8, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
230+
{8, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
231+
{9, "\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
232+
{9, "\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
233+
{9, "\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
234+
{10,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
235+
{10,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
236+
{10,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
237+
{11,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
238+
{11,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
239+
{11,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
240+
{12,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
241+
{12,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
242+
{12,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
243+
{13,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
244+
{13,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
245+
{13,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
246+
{14,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
247+
{14,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
248+
{14,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
249+
{15,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
250+
{15,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
251+
{15,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
252+
# gate generators mappings
253+
{28,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
254+
{28,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
255+
{28,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
256+
{29,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
257+
{29,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
258+
{29,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
259+
{30,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
260+
{30,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
261+
{30,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
262+
{31,"\$(P)DlyGen$(PID)EvtReset0-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
263+
{31,"\$(P)DlyGen$(PID)EvtReset1-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
264+
{31,"\$(P)DlyGen$(PID)EvtReset2-SP", "$(EVG):EVR$(T):Pul$(PID)", Reset, 0}
141265
}
142266

143267
# pulser masking controls

‎evgMrmApp/src/evg.cpp

+4-1
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,10 @@ OBJECT_BEGIN(evgDbus) {
2727
} OBJECT_END(evgDbus)
2828

2929
OBJECT_BEGIN(evgInput) {
30-
OBJECT_PROP2("IRQ", &evgInput::getExtIrq, &evgInput::setExtIrq);
30+
OBJECT_PROP2("IRQ", &evgInput::getExtIrq, &evgInput::setExtIrq);
31+
OBJECT_PROP2("FPMASK", &evgInput::getHwMask, &evgInput::setHwMask);
32+
OBJECT_PROP1("FPMASK", &evgInput::stateChange);
33+
3134
} OBJECT_END(evgInput)
3235

3336
OBJECT_BEGIN(evgMxc) {

‎evgMrmApp/src/evgInput.cpp

+19-1
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,9 @@ evgInput::evgInput(const std::string& name, const epicsUInt32 num,
1616
,m_num(num)
1717
,m_type(type)
1818
,m_pInReg(pInReg)
19-
{}
19+
{
20+
scanIoInit(&changed);
21+
}
2022

2123
evgInput::~evgInput() {
2224
}
@@ -46,6 +48,22 @@ evgInput::getExtIrq() const {
4648
return (nat_ioread32(m_pInReg) & (epicsUInt32)EVG_EXT_INP_IRQ_ENA) != 0;
4749
}
4850

51+
epicsUInt32 evgInput::getHwMask() const
52+
{
53+
epicsUInt32 val;
54+
val = (nat_ioread32(m_pInReg) & EVG_INP_FP_MASK) >> EVG_INP_FP_MASK_shift;
55+
return val;
56+
}
57+
58+
void evgInput::setHwMask(epicsUInt32 src)
59+
{
60+
epicsUInt32 inReg=nat_ioread32(m_pInReg) & ~(EVG_INP_FP_MASK);
61+
nat_iowrite32(m_pInReg, inReg | (src<<EVG_INP_FP_MASK_shift));
62+
scanIoRequest(changed);
63+
}
64+
65+
66+
4967
void
5068
evgInput::setDbusMap(epicsUInt16 dbus, bool ena) {
5169
if(dbus > 7)

‎evgMrmApp/src/evgInput.h

+8
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,8 @@
77

88
#include <epicsTypes.h>
99
#include "mrf/object.h"
10+
#include <dbScan.h>
11+
1012

1113
enum InputType {
1214
NoneInp = 0,
@@ -31,6 +33,9 @@ class evgInput : public mrf::ObjectInst<evgInput> {
3133
void setExtIrq(bool);
3234
bool getExtIrq() const;
3335

36+
void setHwMask(epicsUInt32);
37+
epicsUInt32 getHwMask() const;
38+
3439
void setDbusMap(epicsUInt16, bool);
3540
bool getDbusMap(epicsUInt16) const;
3641

@@ -40,9 +45,12 @@ class evgInput : public mrf::ObjectInst<evgInput> {
4045
void setTrigEvtMap(epicsUInt16, bool);
4146
bool getTrigEvtMap(epicsUInt16) const;
4247

48+
IOSCANPVT stateChange() const { return changed; }
49+
4350
private:
4451
const epicsUInt32 m_num;
4552
const InputType m_type;
4653
volatile epicsUInt8* const m_pInReg;
54+
IOSCANPVT changed;
4755
};
4856
#endif //EVG_INPUT_H

‎evgMrmApp/src/evgRegMap.h

+10
Original file line numberDiff line numberDiff line change
@@ -259,6 +259,12 @@
259259
#define EVG_SEQ_RAM_SINGLE 0x00100000 // Single-Shot Mode: Disable on completion
260260
#define EVG_SEQ_RAM_RECYCLE 0x00080000 // Continuous Mode: Repeat on completion
261261

262+
//Mask registers
263+
#define EVG_SEQ_RAM_SWMASK 0x0000F000 // Sequence RAM Software mask
264+
#define EVG_SEQ_RAM_SWMASK_shift 12
265+
#define EVG_SEQ_RAM_SWENABLE 0x00000F00 // Sequence RAM Software enable
266+
#define EVG_SEQ_RAM_SWENABLE_shift 8
267+
262268
/**************************************************************************************************/
263269
/* Control Register flags */
264270
/**************************************************************************************************/
@@ -275,6 +281,10 @@
275281
/**************************************************************************************************/
276282

277283
#define EVG_EXT_INP_IRQ_ENA 0x01000000
284+
#define EVG_INP_FP_ENA 0x0F000000
285+
#define EVG_INP_FP_ENA_shift 24
286+
#define EVG_INP_FP_MASK 0xF0000000
287+
#define EVG_INP_FP_MASK_shift 28
278288

279289
#ifndef EVG_CONSTANTS
280290
#define EVG_CONSTANTS

‎iocBoot/iocseqmask/Makefile

+5
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
TOP = ../..
2+
include $(TOP)/configure/CONFIG
3+
ARCH = linux-x86_64
4+
TARGETS = envPaths
5+
include $(TOP)/configure/RULES.ioc

‎iocBoot/iocseqmask/st_EVM.cmd

+80
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,80 @@
1+
#!../../bin/linux-x86_64/mrf
2+
3+
< envPaths
4+
5+
## Register all support components
6+
dbLoadDatabase("../../dbd/mrf.dbd")
7+
mrf_registerRecordDeviceDriver(pdbbase)
8+
9+
epicsEnvSet("IOCSH_PS1","EVM SeqMask> ")
10+
epicsEnvSet("P","Ether-Realm:EVM")
11+
epicsEnvSet("ENGINEER","agaget")
12+
epicsEnvSet("LOCATION","Etheric Realm")
13+
14+
epicsEnvSet("EPICS_CA_MAX_ARRAY_BYTES","10000000")
15+
16+
epicsEnvSet("EVM_PCI","0000:0e:00.0")
17+
epicsEnvSet("PORT","EVM-MTCA")
18+
epicsEnvSet(FREQ, "88")
19+
20+
mrmEvgSetupPCI("$(PORT)", "$(EVM_PCI)")
21+
22+
## Load record instances
23+
cd $(TOP)
24+
dbLoadRecords("db/evm-mtca-300.uv.db","P=$(P):,s=,EVG=$(PORT),FRF=$(FREQ),FEVT=$(FREQ)")
25+
dbLoadRecords("db/evm-mtca-300-evr.uv.db","P=$(P)U:,EVG=$(PORT),T=EVRU,FRF=$(FREQ),FEVT=$(FREQ)")
26+
dbLoadRecords("db/evm-mtca-300-evr.uv.db","P=$(P)D:,EVG=$(PORT),T=EVRD,FRF=$(FREQ),FEVT=$(FREQ)")
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iocInit()
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##### Configure the EVM
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dbpf $(P):Mxc0Frequency-SP 1
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dbpf $(P):Mxc0Prescaler-SP 88000000
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## Configure the sequencer
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dbpf $(P):SoftSeq0TrigSrc0-Sel "Mxc0"
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dbpf $(P):SoftSeq0TsResolution-Sel "uSec"
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dbpf $(P):SoftSeq0RunMode-Sel "Normal"
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dbpf $(P):SoftSeq0Timestamp-SP "[100, 200]"
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#Can't dbpf waveform of UCHAR so we use this. Change architecture if needed.
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#Event 11 is just used for example
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system("$(EPICS_BASE)/bin/linux-x86_64/caput -a $(P):SoftSeq0EvtCode-SP 2 1 11")
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system("$(EPICS_BASE)/bin/linux-x86_64/caput -a $(P):SoftSeq0EvtMask-SP 2 1 0")
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# Due to this 'enable' settings, event 11 will not b triggered by default
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system("$(EPICS_BASE)/bin/linux-x86_64/caput -a $(P):SoftSeq0EvtEna-SP 2 0 3")
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# To fully understand mask and enable I suggest you to play with software mask an enable an watch counter of the EVR:
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# $(P):SoftSeq0SwMask-Sel
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# $(P):SoftSeq0SwEna-Sel
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# If you put soft mask to 1 or 3 or 5 etc... it will mask event 1 of the sequence
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# because mask of the sequencer is 1, and it's (binary) included in the software mask number
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# For enable, soft ena to 3 or 7 or 11.. will enable event 11 of the sequencer
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# because ena of the sequencer is 3 and it's (binary) included in the software ena number
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## Configure the EVRU
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dbpf $(P)U:DlyGen0EvtSet0-SP 13
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dbpf $(P)U:DlyGen0EvtReset0-SP 14
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dbpf $(P)U:OutFP0SrcPulse-SP "Pulser 0"
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# FP0 of the EVRU is the equivalent of Univ8 of the EVM
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# So this triggered the Mask 1 when FP0/Univ8 is High.
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dbpf $(P):InpUniv8FPMask-Sel "1"
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epicsThreadSleep(1)
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dbtr $(P):SoftSeq0Commit-Cmd
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epicsThreadSleep(1)
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dbpf $(P):SoftSeq0Load-Cmd 1
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dbpf $(P):SoftSeq0Enable-Cmd 1
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# dbpf $(P):TrigEvt1TrigSrc0-Sel Mxc0
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# dbpf $(P):TrigEvt0EvtCode-SP 1
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## Push event 13 just to see that upstream/downstream is working
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dbpf $(P):TrigEvt1TrigSrc1-Sel Univ8
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dbpf $(P):TrigEvt1EvtCode-SP 13
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##
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‎iocBoot/iocseqmask/st_EVR.cmd

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#!../../bin/linux-x86_64/mrf
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< envPaths
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## Register all support components
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dbLoadDatabase("../../dbd/mrf.dbd")
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mrf_registerRecordDeviceDriver(pdbbase)
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epicsEnvSet("IOCSH_PS1","EVR SeqMask> ")
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epicsEnvSet("P","Ether-Realm:EVR")
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epicsEnvSet("ENGINEER","agaget")
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epicsEnvSet("LOCATION","Etheric Realm")
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epicsEnvSet("EPICS_CA_MAX_ARRAY_BYTES","10000000")
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epicsEnvSet("EVR_PCI","0000:0c:00.0")
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mrmEvrSetupPCI("EVR-MTCA", "$(EVR_PCI)")
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cd $(TOP)
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## Load record instances
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dbLoadRecords("db/evr-mtca-300u.uv.db","P=$(P):,EVR=EVR-MTCA,PNDELAY=PNDELAY,PNWIDTH=PNWIDTH,FRF=88,FEVT=88")
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iocInit()
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## we use Backplane of the MTCA card here to upstream event through input, like that no need for any other phyical installation.
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## Events 2 and 3 will be use to mask and unmask the event 1 in the sequencer. You can send them softwarely through the EVM.
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## Indeed You can remove that part and use analogic signal in other inputs if you prefer.
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### When we receive event 2 Pulser 1-> backplane 1 is triggered
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dbpf $(P):DlyGen1Width-SP 100
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dbpf $(P):DlyGen1Width-RB
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dbpf $(P):DlyGen1EvtTrig0-SP 2
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dbpf $(P):OutBack1SrcPulse-SP "Pulser 1"
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#When we receive event 3 Pulser 2-> backplane 2 is triggered
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dbpf $(P):DlyGen2Width-SP 100
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dbpf $(P):DlyGen2Width-RB
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dbpf $(P):DlyGen2EvtTrig0-SP 3
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dbpf $(P):OutBack2SrcPulse-SP "Pulser 2"
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###Backplane channel 1 use for masking
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dbpf $(P):BPIn1TrigBack-Sel "Edge"
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dbpf $(P):BPIn1CodeBack-SP 13
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###Backplane channel 2 use for unmasking
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dbpf $(P):BPIn2TrigBack-Sel "Edge"
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dbpf $(P):BPIn2CodeBack-SP 14
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## Monitoring events. When your sequencer is running normally, counter A should increment at 1Hz.
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## When event 2 is send to this EVR, counterA will stop incrementing, counterB will increment + 1, and counterD will increment +1
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## When event 3 is send to this EVR, counterA will restart incrementing, counterC will increment + 1
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dbpf $(P):EvtA-SP.OUT "@OBJ=EVR-MTCA,Code=1"
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dbpf $(P):EvtB-SP.OUT "@OBJ=EVR-MTCA,Code=2"
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dbpf $(P):EvtC-SP.OUT "@OBJ=EVR-MTCA,Code=3"
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dbpf $(P):EvtD-SP.OUT "@OBJ=EVR-MTCA,Code=13"
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dbpf $(P):EvtE-SP.OUT "@OBJ=EVR-MTCA,Code=11"
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##
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