Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Aarch64 to Risc-V64 translation #14

Open
egdeeno opened this issue Apr 17, 2024 · 4 comments
Open

Aarch64 to Risc-V64 translation #14

egdeeno opened this issue Apr 17, 2024 · 4 comments

Comments

@egdeeno
Copy link

egdeeno commented Apr 17, 2024

Hello!
Could you, please, answer, is it possible to add Aarch64(guest) to Riscv64(host) translation in instrew?
If so, could you, please, describe steps and changes needed to implement such translation?

@aengelke
Copy link
Owner

RISC-V hosts are currently not supported, I don't have access to RISC-V hardware with reasonable performance.

Bringing RISC-V support up should be fairly easy.

  • client/main.c: set new tsc_host_arch
  • client/memory.c: implement ICache flushing in mem_write_code, this is a syscall on Linux (do not use fence.i, this is insufficient)
  • client/rtld.c: implement PLT/relocations. Basically similar to AArch64, look for the ifdefs
  • client/emulate.c: maybe something needs to be done for clone and other syscalls, I'm not sure.
  • server/codegenerator.cc: set triple for RISC-V

For performance, you also want to look at calling conventions, where things typically get a bit messy.

@egdeeno
Copy link
Author

egdeeno commented Apr 17, 2024

Thank you!
Should client/minilibc.c be modified?

@aengelke
Copy link
Owner

Yeah, forgot about that. You need to implement _start, __clone, syscall wrappers, and dynamic relocations. Should not be substantially different from AArch64, though.

@egdeeno
Copy link
Author

egdeeno commented Apr 18, 2024

Thank you!

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants