From 41903f791d16568dff06f59de673566c44923ef1 Mon Sep 17 00:00:00 2001 From: Harvey Hunt Date: Thu, 23 Jul 2015 11:57:19 +0100 Subject: [PATCH] MIPS: Ci20: Increase MMC0 max-frequency in DT node The closest clockspeed to 48Mhz that the MSC supports is 50Mhz. However, as this is greater than 48Mhz the MSC clock divider is increased - causing the clock speed to become 25Mhz. Signed-off-by: Harvey Hunt --- arch/mips/boot/dts/ci20.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/boot/dts/ci20.dts b/arch/mips/boot/dts/ci20.dts index bd23aa29e907e6..107ae6ac4c8c89 100644 --- a/arch/mips/boot/dts/ci20.dts +++ b/arch/mips/boot/dts/ci20.dts @@ -125,7 +125,7 @@ &msc0 { bus-width = <4>; - max-frequency = <48000000>; + max-frequency = <50000000>; cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; pinctrl-names = "default";