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Check all of a vector lane when converting to mask
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+16
-19
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1 file changed

+16
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src/coreclr/jit/simd.h

Lines changed: 16 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -1598,35 +1598,33 @@ void EvaluateSimdCvtVectorToMask(simdmask_t* result, TSimd arg0)
15981598
uint32_t count = sizeof(TSimd) / sizeof(TBase);
15991599
uint64_t mask = 0;
16001600

1601-
TBase significantBit = 1;
16021601
#if defined(TARGET_XARCH)
1603-
significantBit = static_cast<TBase>(1) << ((sizeof(TBase) * 8) - 1);
1602+
TBase significantBit = static_cast<TBase>(1) << ((sizeof(TBase) * 8) - 1);
16041603
#endif
16051604

16061605
for (uint32_t i = 0; i < count; i++)
16071606
{
16081607
TBase input0;
16091608
memcpy(&input0, &arg0.u8[i * sizeof(TBase)], sizeof(TBase));
16101609

1610+
#if defined(TARGET_XARCH)
1611+
// For xarch we have count sequential bits to write depending on if the
1612+
// corresponding the input element has its most significant bit set
16111613
if ((input0 & significantBit) != 0)
16121614
{
1613-
#if defined(TARGET_XARCH)
1614-
// For xarch we have count sequential bits to write
1615-
// depending on if the corresponding the input element
1616-
// has its most significant bit set
1617-
16181615
mask |= static_cast<uint64_t>(1) << i;
1616+
}
16191617
#elif defined(TARGET_ARM64)
1620-
// For Arm64 we have count total bits to write, but
1621-
// they are sizeof(TBase) bits apart. We set
1622-
// depending on if the corresponding input element
1623-
// has its least significant bit set
1624-
1618+
// For Arm64 we have count total bits to write, but they are sizeof(TBase)
1619+
// bits apart. We set depending on if the corresponding input element has
1620+
// any bit set (this matches the use of cmpne in outputted assembly).
1621+
if (input0 != 0)
1622+
{
16251623
mask |= static_cast<uint64_t>(1) << (i * sizeof(TBase));
1624+
}
16261625
#else
1627-
unreached();
1626+
unreached();
16281627
#endif
1629-
}
16301628
}
16311629

16321630
memcpy(&result->u8[0], &mask, sizeof(uint64_t));
@@ -2000,21 +1998,20 @@ SveMaskPattern EvaluateSimdVectorToPattern(TSimd arg0)
20001998
uint32_t count = sizeof(TSimd) / sizeof(TBase);
20011999
uint32_t finalOne = count;
20022000

2003-
TBase significantBit = 1;
2004-
20052001
// A mask pattern starts with zero or more 1s and then the rest of the mask is filled with 0s.
20062002
// This pattern is extracted using the least significant bits of the vector elements.
20072003

20082004
// For Arm64 we have count total bits to read, but they are sizeof(TBase) bits apart. We set
2009-
// depending on if the corresponding input element has its least significant bit set
2005+
// depending on if the corresponding input element has any bit set (this matches the use
2006+
// of cmpne in outputted assembly)
20102007

20112008
// Find an unbroken sequence of 1s.
20122009
for (uint32_t i = 0; i < count; i++)
20132010
{
20142011
TBase input0;
20152012
memcpy(&input0, &arg0.u8[i * sizeof(TBase)], sizeof(TBase));
20162013

2017-
bool isSet = (input0 & significantBit) != 0;
2014+
bool isSet = input0 != 0;
20182015
if (!isSet)
20192016
{
20202017
finalOne = i;
@@ -2028,7 +2025,7 @@ SveMaskPattern EvaluateSimdVectorToPattern(TSimd arg0)
20282025
TBase input0;
20292026
memcpy(&input0, &arg0.u8[i * sizeof(TBase)], sizeof(TBase));
20302027

2031-
bool isSet = (input0 & significantBit) != 0;
2028+
bool isSet = input0 != 0;
20322029
if (isSet)
20332030
{
20342031
// Invalid sequence

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