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Udhayanandhan-JayakumarUdhayanandhan-Jayakumar
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dspic: UART polling method (zephyrproject-rtos#31)
* dspic: UART polling method Added UART polling support for dsPIC33AK128MC106 Signed-off-by: Udhayanandhan Jayakumar <[email protected]> * dspic: Logging using UART (zephyrproject-rtos#33) * dspic: Logging using UART Added support for logging using UART Signed-off-by: Udhayanandhan Jayakumar <[email protected]> * dspic: copright headers (zephyrproject-rtos#36) dspic: copyright headers fix Added copyrights to files Signed-off-by: Udhayanandhan Jayakumar <[email protected]> --------- Signed-off-by: Udhayanandhan Jayakumar <[email protected]> --------- Signed-off-by: Udhayanandhan Jayakumar <[email protected]>
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‎boards/microchip/dspic33/dspic33a_curiosity/dspic33a_curiosity_p33ak128mc106.dts‎

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/*
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* Copyright (c) 2025, Microchip Technology Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include "p33ak128mc106.dtsi"
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@@ -8,6 +13,12 @@
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chosen {
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zephyr,flash = &flash0;
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zephyr,sram = &sram0;
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zephyr,serial = &uart1;
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zephyr,console = &uart1;
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};
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aliases {
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uart-0 = &uart1;
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};
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};
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@@ -21,3 +32,7 @@
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clock-frequency = <8000000>;
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};

‎boards/microchip/dspic33/dspic33a_curiosity/dspic33a_curiosity_p33ak128mc106_defconfig‎

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# Enables the RAM-based console backend for logging output.
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# Copyright (c) 2025, Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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CONFIG_LOG=y
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CONFIG_LOG_MODE_MINIMAL=y
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CONFIG_PRINTK=y
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CONFIG_CONSOLE=y
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CONFIG_RAM_CONSOLE=y
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CONFIG_STDOUT_CONSOLE=n
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# For LOG_MODE_MINIMAL using UART
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CONFIG_UART_CONSOLE=y
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CONFIG_LOG_PRINTK=n
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CONFIG_EARLY_CONSOLE=y
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CONFIG_SERIAL=y
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# for LOG_MODE_IMMEDIATE using UART
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# Uncomment below if using LOG_MODE_IMMEDIATE instead
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# CONFIG_UART_CONSOLE=y
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# CONFIG_LOG_ALWAYS_RUNTIME=y
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# CONFIG_EARLY_CONSOLE=y
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# CONFIG_SERIAL=y
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# Enables support for GPIO drivers on the target platform.
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# CONFIG_GPIO=y

‎drivers/serial/CMakeLists.txt‎

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@@ -31,6 +31,7 @@ zephyr_library_sources_ifdef(CONFIG_UART_CC23X0 uart_cc23x0.c)
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zephyr_library_sources_ifdef(CONFIG_UART_CC32XX uart_cc32xx.c)
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zephyr_library_sources_ifdef(CONFIG_UART_CDNS uart_cdns.c)
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zephyr_library_sources_ifdef(CONFIG_UART_CMSDK_APB uart_cmsdk_apb.c)
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zephyr_library_sources_ifdef(CONFIG_UART_DSPIC uart_dspic.c)
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zephyr_library_sources_ifdef(CONFIG_UART_EFINIX_SAPPIHIRE uart_efinix_sapphire.c)
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zephyr_library_sources_ifdef(CONFIG_UART_EMUL uart_emul.c)
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zephyr_library_sources_ifdef(CONFIG_UART_ENE_KB106X uart_ene_kb106x.c)

‎drivers/serial/Kconfig‎

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@@ -172,6 +172,7 @@ rsource "Kconfig.cc23x0"
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rsource "Kconfig.cc32xx"
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rsource "Kconfig.cdns"
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rsource "Kconfig.cmsdk_apb"
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rsource "Kconfig.dspic_uart"
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rsource "Kconfig.efinix_sapphire"
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rsource "Kconfig.emul"
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rsource "Kconfig.ene"

‎drivers/serial/Kconfig.dspic_uart‎

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# Copyright (c) 2025, Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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config UART_DSPIC
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bool "dsPIC33A UART driver"
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default y
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select SERIAL_HAS_DRIVER
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help
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Enable support for the dsPIC33A UART driver.

‎drivers/serial/uart_dspic.c‎

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/*
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* Copyright (c) 2025, Microchip Technology Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/device.h>
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#include <zephyr/drivers/uart.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util.h>
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#include <soc.h>
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#include <math.h>
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#ifndef _ASMLANGUAGE
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#include <xc.h>
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#endif
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#define DT_DRV_COMPAT microchip_dspic33_uart
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#define OFFSET_MODE 0x00U
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#define OFFSET_STA 0x04U
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#define OFFSET_TXREG 0x10U
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#define OFFSET_BRG 0x08U
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#define OFFSET_RXREG 0x0CU
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#define BIT_UTXEN 0x00000020U
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#define BIT_URXEN 0x00000010U
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#define BIT_UARTEN 0x00008000U
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#define BIT_TXBF 0x00100000U
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#define BIT_RXBE 0x00020000U
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#define FRACTIONAL_BRG 0x8000000U
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#define CALCULATE_BRG(baudrate) \
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((ceil(((double)(sys_clock_hw_cycles_per_sec())) / ((double)(2U * (baudrate))))))
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const struct device *dev = DEVICE_DT_GET(DT_NODELABEL(uart1));
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struct uart_dspic_config {
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uint32_t base;
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uint32_t baudrate;
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};
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static void uart_dspic_poll_out(const struct device *dev, unsigned char c)
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{
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const struct uart_dspic_config *cfg = dev->config;
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volatile uint32_t *UxSTA = (void *)(cfg->base + OFFSET_STA);
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volatile uint32_t *UxTXREG = (void *)(cfg->base + OFFSET_TXREG);
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/* Wait until there is space in the TX FIFO */
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while ((bool)(void *)((*UxSTA) & BIT_TXBF)) {
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;
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}
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*UxTXREG = c;
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}
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static int uart_dspic_poll_in(const struct device *dev, unsigned char *c)
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{
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const struct uart_dspic_config *cfg = dev->config;
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volatile uint32_t *UxSTA = (void *)(cfg->base + OFFSET_STA);
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volatile uint32_t *UxRXREG = (void *)(cfg->base + OFFSET_RXREG);
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int ret_val;
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/* If receiver buffer is empty, return -1 */
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if ((*UxSTA & BIT_RXBE) != 0U) {
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ret_val = -EPERM;
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}
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else {
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*c = *UxRXREG & 0xFF;
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ret_val = 0;
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}
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return ret_val;
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}
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static int uart_dspic_init(const struct device *dev)
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{
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LATB = 0x0040UL;
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TRISB = 0x0FBFUL;
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ANSELA = 0x0FFFUL;
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ANSELB = 0x033FUL;
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/* Assign U1TX to RP23 and U1RX to RP24*/
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_RP23R = 9;
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_U1RXR = 24;
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const struct uart_dspic_config *cfg = dev->config;
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volatile uint32_t *UxCON = (void *)(cfg->base + OFFSET_MODE);
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/* Setting the baudrate */
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*UxCON = FRACTIONAL_BRG;
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volatile uint32_t *UxBRG = (void *)(cfg->base + OFFSET_BRG);
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*UxBRG = (uint32_t)CALCULATE_BRG(cfg->baudrate);
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/* Enable UART */
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*UxCON |= BIT_UARTEN | BIT_UTXEN | BIT_URXEN;
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return 0;
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}
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static const struct uart_driver_api uart_dspic_api = {
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.poll_out = uart_dspic_poll_out,
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.poll_in = uart_dspic_poll_in,
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};
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#define UART_DSPIC_INIT(inst) \
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static const struct uart_dspic_config uart_dspic_config_##inst = { \
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.base = DT_REG_ADDR(DT_INST(inst, microchip_dspic33_uart)), \
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.baudrate = DT_PROP(DT_INST(inst, microchip_dspic33_uart), current_speed), \
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}; \
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DEVICE_DT_INST_DEFINE(inst, uart_dspic_init, NULL, NULL, &uart_dspic_config_##inst, \
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PRE_KERNEL_1, CONFIG_SERIAL_INIT_PRIORITY, &uart_dspic_api);
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DT_INST_FOREACH_STATUS_OKAY(UART_DSPIC_INIT)

‎drivers/timer/Kconfig.mchp_dspic33‎

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# Copyright (C) 2025 Microchip Technology Inc.
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config MCHP_DSPIC33_TIMER
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bool "Microchip DSPIC33A timer"

‎drivers/timer/mchp_dspic33_timer.c‎

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/* zephyr/arch/dspic33AK/include/arch.h */
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/*
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* Copyright (c) 2025, Microchip Technology Inc.
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_ARCH_DSPIC33AK_INCLUDE_ARCH_H_
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#define ZEPHYR_ARCH_DSPIC33AK_INCLUDE_ARCH_H_

‎dts/bindings/serial/microchip,dspic33-uart.yaml‎

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# microchip,dspic33-uart.yaml
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description: Microchip dsPIC33 UART controller
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compatible: "microchip,dspic33-uart"
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include: uart-controller.yaml
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properties:
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reg:
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required: true
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clock-frequency:
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type: int
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required: true
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status:
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type: string
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required: true

‎dts/dspic/p33ak128mc106.dtsi‎

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label = "TIMER_1";
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status = "okay";
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};
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uart1: uart@1700 {
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compatible = "microchip,dspic33-uart";
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reg = <0x1700 0x28>;
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clock-frequency = <4000000>;
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current-speed = <115200>;
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status = "okay";
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};
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};
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};
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};

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