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| 1 | +/** |
| 2 | +* @file Platform_Configuration_NucleoF0xx.h |
| 3 | +* @author AMS RF application team |
| 4 | +* @version V1.0.0 |
| 5 | +* @date December, 2018 |
| 6 | +* @brief This file contains definitions for STM32F0xx_NUCLEO Eval Platform |
| 7 | +* |
| 8 | +* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| 9 | +* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| 10 | +* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| 11 | +* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| 12 | +* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| 13 | +* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| 14 | +* |
| 15 | +* THIS SOURCE CODE IS PROTECTED BY A LICENSE. |
| 16 | +* FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED |
| 17 | +* IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE. |
| 18 | +* |
| 19 | +* <h2><center>© COPYRIGHT 2018 STMicroelectronics</center></h2> |
| 20 | +*/ |
| 21 | + |
| 22 | +/* Define to prevent recursive inclusion -------------------------------------*/ |
| 23 | +#ifndef __PLATFORM_CONFIGURATION_H |
| 24 | +#define __PLATFORM_CONFIGURATION_H |
| 25 | + |
| 26 | +/* Includes ------------------------------------------------------------------*/ |
| 27 | +#include "stm32f0xx_hal.h" |
| 28 | + |
| 29 | +#if !defined (USE_STM32F0xx_NUCLEO) |
| 30 | + #define USE_STM32F0xx_NUCLEO |
| 31 | +#endif |
| 32 | + |
| 33 | +#ifdef __cplusplus |
| 34 | +extern "C" { |
| 35 | +#endif |
| 36 | + |
| 37 | +#define SDK_EVAL_NUCLEO_VER 0x82 |
| 38 | + |
| 39 | +/*****************************************************************************/ |
| 40 | +/* BUTTON(s) SECTION */ |
| 41 | +/*****************************************************************************/ |
| 42 | + /** |
| 43 | + * @brief Buttons definitions |
| 44 | + */ |
| 45 | +#define PUSH_BUTTON1_PIN GPIO_PIN_13 |
| 46 | +#define PUSH_BUTTON1_GPIO_PORT GPIOC |
| 47 | +#define PUSH_BUTTON1_GPIO_CLK() __GPIOC_CLK_ENABLE() |
| 48 | +#define PUSH_BUTTON1_EXTI_IRQn EXTI4_15_IRQn |
| 49 | +#define PUSH_BUTTON1_EXTI_IRQ_HANDLER EXTI4_15_IRQHandler |
| 50 | +#define PUSH_BUTTON1_KEY BUTTON_1 |
| 51 | +#define PUSH_BUTTON1_IRQ_PREEMPTION_PRIORITY 0 |
| 52 | +#define PUSH_BUTTON1_IRQ_SUB_PRIORITY 0 |
| 53 | + |
| 54 | + |
| 55 | +/*****************************************************************************/ |
| 56 | +/* UART SECTION */ |
| 57 | +/*****************************************************************************/ |
| 58 | + /** |
| 59 | + * @brief UART definitions |
| 60 | + */ |
| 61 | +#define VCOM_YES 0 |
| 62 | +#define VCOM_NO 1 |
| 63 | +#define VCOM_PRESENT VCOM_NO |
| 64 | + |
| 65 | +#define SDK_EVAL_UART_BAUDRATE 115200 |
| 66 | +#define SDK_EVAL_UARTx USART2 |
| 67 | +#define SDK_EVAL_UARTx_AF GPIO_AF1_USART2 |
| 68 | +#define SDK_EVAL_UARTx_PORT GPIOA |
| 69 | +#define SDK_EVAL_UART_RX_PIN GPIO_PIN_2 |
| 70 | +#define SDK_EVAL_UART_TX_PIN GPIO_PIN_3 |
| 71 | + |
| 72 | +#define NUCLEO_UARTx USART2 |
| 73 | +#define NUCLEO_UARTx_AF GPIO_AF1_USART2 |
| 74 | +#define NUCLEO_UARTx_PORT GPIOA |
| 75 | +#define NUCLEO_UARTx_RX_PIN GPIO_PIN_2 |
| 76 | +#define NUCLEO_UARTx_TX_PIN GPIO_PIN_3 |
| 77 | + |
| 78 | +#define NUCLEO_UARTx_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() |
| 79 | +#define NUCLEO_UARTx_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE() |
| 80 | +#define NUCLEO_UARTx_CLK_ENABLE() __USART2_CLK_ENABLE() |
| 81 | +#define NUCLEO_UARTx_IRQHandler USART2_IRQHandler |
| 82 | +#define NUCLEO_UARTx_IRQn USART2_IRQn |
| 83 | +#define NUCLEO_UARTx_PRIORITY 2 |
| 84 | + |
| 85 | +#define NUCLEO_UARTx_TX_DMA_CHANNEL_IRQHandler DMA1_Channel4_5_6_7_IRQHandler |
| 86 | +#define NUCLEO_UARTx_TX_DMA_CHANNEL_IRQn DMA1_Channel4_5_6_7_IRQn |
| 87 | +#define NUCLEO_UARTx_TX_DMA_CHANNEL DMA1_Channel4 |
| 88 | + |
| 89 | +#define NUCLEO_UARTx_RX_DMA_CHANNEL_IRQHandler DMA1_Channel4_5_6_7_IRQHandler |
| 90 | +#define NUCLEO_UARTx_RX_DMA_CHANNEL_IRQn DMA1_Channel4_5_6_7_IRQn |
| 91 | +#define NUCLEO_UARTx_RX_DMA_CHANNEL DMA1_Channel5 |
| 92 | + |
| 93 | +#define NUCLEO_UARTx_DMA_CLK_ENABLE() __DMA1_CLK_ENABLE() |
| 94 | + |
| 95 | + |
| 96 | +#define NUCLEO_UARTx_RX_QUEUE_SIZE (400) |
| 97 | +#define NUCLEO_UARTx_TX_QUEUE_SIZE (400) |
| 98 | + |
| 99 | + |
| 100 | +/*****************************************************************************/ |
| 101 | +/* TIM and CK SECTION */ |
| 102 | +/*****************************************************************************/ |
| 103 | +#define NUCLEO_TIMx_PRIORITY 1 |
| 104 | + |
| 105 | +#define TIM4 TIM14 |
| 106 | +#define TIM4_IRQn TIM14_IRQn |
| 107 | +#define __HAL_RCC_TIM4_CLK_ENABLE() __TIM14_CLK_ENABLE() |
| 108 | + |
| 109 | +#define TIM5 TIM15 |
| 110 | +#define TIM5_IRQn TIM15_IRQn |
| 111 | +#define __HAL_RCC_TIM5_CLK_ENABLE() __TIM15CLK_ENABLE() |
| 112 | + |
| 113 | +#define TIM6_IRQHandler TIM6_DAC_IRQHandler |
| 114 | + |
| 115 | +#define NUCLEO_TIMx_PRIORITY 1 |
| 116 | + |
| 117 | +#define TIM4 TIM14 |
| 118 | +#define TIM4_IRQn TIM14_IRQn |
| 119 | +#define __HAL_RCC_TIM4_CLK_ENABLE() __TIM14_CLK_ENABLE() |
| 120 | + |
| 121 | +#define TIM5 TIM15 |
| 122 | +#define TIM5_IRQn TIM15_IRQn |
| 123 | +#define __HAL_RCC_TIM5_CLK_ENABLE() __TIM15CLK_ENABLE() |
| 124 | + |
| 125 | +#define TIM6_IRQHandler TIM6_DAC_IRQHandler |
| 126 | + |
| 127 | +#define STM32_EEPROM_BASE DATA_EEPROM_BASE |
| 128 | +#define STM32_TYPEPROGRAM_WORD TYPEPROGRAM_WORD |
| 129 | + |
| 130 | +#define STM32_RTC_IRQHandler RTC_IRQHandler |
| 131 | +#define STM32_RTC_IRQn RTC_IRQn |
| 132 | + |
| 133 | +#define STM32_GPIO_CLK_DISABLE() {__GPIOB_CLK_DISABLE();__GPIOC_CLK_DISABLE();__GPIOD_CLK_DISABLE();__GPIOA_CLK_DISABLE();} |
| 134 | +#define STM32_GPIO_CLK_ENABLE() {__GPIOA_CLK_ENABLE();__GPIOB_CLK_ENABLE();__GPIOC_CLK_ENABLE();__GPIOD_CLK_ENABLE();} |
| 135 | + |
| 136 | + |
| 137 | +/*****************************************************************************/ |
| 138 | +/* LED SECTION */ |
| 139 | +/*****************************************************************************/ |
| 140 | + /** |
| 141 | + * @brief LEDs definitions |
| 142 | + */ |
| 143 | +#define LEDn 1 |
| 144 | + |
| 145 | +#define SDK_EVAL_LED1_PIN GPIO_PIN_5 |
| 146 | +#define SDK_EVAL_LED1_PORT GPIOA |
| 147 | +#define SDK_EVAL_LED1_CLK __GPIOA_CLK_ENABLE |
| 148 | + |
| 149 | +#ifdef __cplusplus |
| 150 | +} |
| 151 | +#endif |
| 152 | + |
| 153 | +#endif /* __PLATFORM_CONFIGURATION_H */ |
| 154 | + |
| 155 | +/******************* (C) COPYRIGHT 2018 STMicroelectronics *****END OF FILE*****/ |
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