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th.sdia

Synopsis

Store indexed double-word, increment address after loading.

Mnemonic

th.sdia rd, (rs1), imm5, imm2

Encoding
{reg:[
    { bits:  7, name: 0xb, attr: ['custom-0, 32 bit'] },
    { bits:  5, name: 'rd' },
    { bits:  3, name: 0x5, attr: ['Mem-Store'] },
    { bits:  5, name: 'rs1' },
    { bits:  5, name: 'imm5' },
    { bits:  2, name: 'imm2' },
    { bits:  5, name: 0x0f },
]}
Description

This instruction stores an 64-bit value from the GP register rd to the address rs1. After the store, this instruction increments the value in rs1 by (sign_extend(imm5) << imm2) and writes the result back to rs1.

Operation
mem[rs1+7:rs1] := rd
rs1 := rs1 + (sign_extend(imm5) << imm2)
Permission

This instruction can be executed in all privilege levels.

Exceptions

This instruction triggers the same exceptions that a corresponding SD instruction would trigger.

Included in
Extension

XTheadMemIdx ([xtheadmemidx])