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mveqz.adoc

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th.mveqz

Synopsis

Move if equal zero.

Mnemonic

th.mveqz rd, rs1, rs2

Encoding
{reg:[
    { bits:  7, name: 0xb, attr: ['custom-0, 32 bit'] },
    { bits:  5, name: 'rd' },
    { bits:  3, name: 0x1, attr: ['Arithmetic'] },
    { bits:  5, name: 'rs1' },
    { bits:  5, name: 'rs2' },
    { bits:  2, name: 0x00 },
    { bits:  5, name: 0x08 },
]}
Description

This instruction moves the content of register rs1 into rd if the content of rs2 is 0x0. Otherwise, the value of rd does not change.

Operation
if (reg[rs2] == 0x0)
  reg[rd] := reg[rs1]
Permission

This instruction can be executed in all privilege levels.

Exceptions

This instruction does not trigger any exceptions.

Included in
Extension

XTheadCondMov ([xtheadcondmov])