diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
index 6c8adcdb2..3aa92c55c 100644
--- a/proposals/simd/BinarySIMD.md
+++ b/proposals/simd/BinarySIMD.md
@@ -205,3 +205,5 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
 | `i32x4.trunc_sat_f32x4_u`  |    `0xf9`| -                  |
 | `f32x4.convert_i32x4_s`    |    `0xfa`| -                  |
 | `f32x4.convert_i32x4_u`    |    `0xfb`| -                  |
+| `v128.load32_zero`         |    `0xfc`| -                  |
+| `v128.load64_zero`         |    `0xfd`| -                  |
diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md
index 2353ae98f..86ed327d9 100644
--- a/proposals/simd/ImplementationStatus.md
+++ b/proposals/simd/ImplementationStatus.md
@@ -178,6 +178,8 @@
 | `i32x4.trunc_sat_f32x4_u`  |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_s`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `f32x4.convert_i32x4_u`    |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `v128.load32_zero`         |                           |                    |                    |                    |                    |
+| `v128.load64_zero`         |                           |                    |                    |                    |                    |
 
 [1] Tip of tree LLVM as of May 20, 2020
 
diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
index 56940aa22..989f5dc89 100644
--- a/proposals/simd/SIMD.md
+++ b/proposals/simd/SIMD.md
@@ -766,6 +766,24 @@ def S.load(memarg):
     return S.from_bytes(memory[memarg.offset:memarg.offset + 16])
 ```
 
+### Load and Zero-Pad
+
+* `v128.load32_zero(memarg) -> v128`
+* `v128.load64_zero(memarg) -> v128`
+
+Load a single 32-bit or 64-bit element into the lowest bits of a `v128` vector,
+and initialize all other bits of the `v128` vector to zero.
+
+```python
+def S.load32_zero(memarg):
+    return S.from_bytes(memory[memarg.offset:memarg.offset + 4])
+```
+
+```python
+def S.load64_zero(memarg):
+    return S.from_bytes(memory[memarg.offset:memarg.offset + 8])
+```
+
 ### Load and Splat
 
 * `v8x16.load_splat(memarg) -> v128`